diff --git a/.github/workflows/linting.yml b/.github/workflows/linting.yml
index 2c361f6..3a464c2 100644
--- a/.github/workflows/linting.yml
+++ b/.github/workflows/linting.yml
@@ -1,27 +1,39 @@
name: Linting on Pull Request
+
on:
pull_request:
types: [opened,synchronize]
+
jobs:
- lintonPR:
+ lintonPR:
runs-on: ubuntu-latest
steps:
- name: Checkout code
uses: actions/checkout@v2
+
- name: Install Dependencies
run: |
pip install pylint
+
- name: Fetch Main
run: |
git fetch origin main
- git diff --name-only origin/main..HEAD
+ git diff --name-only origin/main..HEAD
+
- name: Run pylint on modified files
run: |
- changed_files=$(git diff --name-only origin/main..HEAD | grep ".py$")
+ set -e
+ IFS=$'\n'
+ changed_files=$(git diff --name-only origin/main..HEAD | grep ".py$" || true)
if [ "$changed_files" ]; then
- echo "Running pylint on changed files:"
- echo "$changed_files"
- echo "$changed_files" | xargs pylint
+ for file in $changed_files; do
+ if [ -e "$file" ]; then
+ echo "Linting $file"
+ pylint "$file"
+ else
+ echo "Skipping lint for deleted file: $file"
+ fi
+ done
else
echo "No Python files have been changed."
fi
diff --git a/README.md b/README.md
index fce78e5..1c23549 100644
--- a/README.md
+++ b/README.md
@@ -1,14 +1,21 @@
# Infinite-ISP
-Infinite-ISP is a full-stack ISP development platform - from algorithm development to RTL design, FPGA/ASIC implementation, and associated firmware, tools, etc. It offers a unified platform that empowers ISP developers to accelerate ISP innovation. It includes a complete collection of camera pipeline modules written in Python, an FPGA bitstream & the associated Firmware for the implementation of the pipeline on the Kria KV260 development board, and lastly, a stand-alone Python-based Tuning Tool application for the pipeline. The main components of the Infinite-ISP project are listed below:
+Infinite-ISP is a full-stack ISP development platform designed for all aspects of a hardware ISP. It includes a collection of camera pipeline modules written in Python, a fixed-point reference model, an optimized RTL design, an FPGA integration framework and its associated firmware ready for Xilinx® Kria KV260 development board. The platform features a stand-alone Python-based Tuning Tool that allows tuning of ISP parameters for different sensors and applications. Finally, it also offers a software solution for Linux by providing required drivers and a custom application development stack to bring Infinite-ISP to the Linux platforms.
-| Repository name | Description |
-| ------------- | ------------- |
-| **[Infinite-ISP_AlgorithmDesign](https://github.com/10x-Engineers/Infinite-ISP)** | Python based model of the Infinite-ISP pipeline for algorithm development |
-| **[Infinite-ISP_ReferenceModel](https://github.com/10x-Engineers/Infinite-ISP_ReferenceModel)** | Python based fixed-point model of the Infinite-ISP pipeline for hardware implementation |
-| **[Infinite-ISP_FPGABinaries](https://github.com/10x-Engineers/Infinite-ISP_FPGABinaries)** | FPGA binaries (bitstream + firmware executable) for the Xilinx® Kria KV260’s XCK26 Zynq UltraScale+ MPSoC|
-| **[Infinite-ISP_Firmware](https://github.com/10x-Engineers/Infinite-ISP_Firmware)** | Firmware for the Kria kV260’s embedded Arm® Cortex®A53 processor|
-| **[Infinite-ISP_TuningTool](https://github.com/10x-Engineers/Infinite-ISP_TuningTool)** :anchor: | Collection of calibration and analysis tools for the Infinite-ISP |
+
+
+| Sr. | Repository name | Description |
+|---------| ------------- | ------------- |
+| 1 | **[Infinite-ISP_AlgorithmDesign](https://github.com/10x-Engineers/Infinite-ISP)** | Python based model of the Infinite-ISP pipeline for algorithm development |
+| 2 | **[Infinite-ISP_ReferenceModel](https://github.com/10x-Engineers/Infinite-ISP_ReferenceModel)** | Python based fixed-point model of the Infinite-ISP pipeline for hardware implementation |
+| 3 | **[Infinite-ISP_RTL](https://github.com/10x-Engineers/Infinite-ISP_RTL)** | RTL Verilog design of the image signal processor based on the Reference Model |
+| 4 | **[Infinite-ISP_AutomatedTesting](https://github.com/10x-Engineers/Infinite-ISP_AutomatedTesting)** | A framework to enable the automated block and multi-block level testing of the image signal processor to ensure a bit accurate design |
+| 5 | **FPGA Implementation** | FPGA implementation of Infinite-ISP on