diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/CMakeLists.txt index e2f5e770381..0c7d849965e 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/CMakeLists.txt @@ -8,7 +8,6 @@ add_library(mbed-portenta-h7-m4 INTERFACE) target_sources(mbed-portenta-h7-m4 INTERFACE PeripheralPins.c - system_clock_override.c portenta_power.cpp ) @@ -25,7 +24,6 @@ add_library(mbed-portenta-h7-m7 INTERFACE) target_sources(mbed-portenta-h7-m7 INTERFACE PeripheralPins.c - system_clock_override.c portenta_power.cpp ) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/system_clock_override.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/system_clock_override.c deleted file mode 100644 index ae7821ede03..00000000000 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_PORTENTA_H7/system_clock_override.c +++ /dev/null @@ -1,309 +0,0 @@ -/* - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - *

© Copyright (c) 2020 Arduino SA. - * All rights reserved.

- * - * SPDX-License-Identifier: BSD-3-Clause - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -/** - * This file configures the system clock as follows: - *-------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) - * | 3- USE_PLL_HSI (internal 64 MHz clock) - *-------------------------------------------------------------------- - * SYSCLK(MHz) | 480 - * AHBCLK (MHz) | 240 - * APB1CLK (MHz) | 120 - * APB2CLK (MHz) | 120 - * APB3CLK (MHz) | 120 - * APB4CLK (MHz) | 120 - * USB capable (48 MHz) | YES - *-------------------------------------------------------------------- -**/ - -#include "stm32h7xx.h" -#include "nvic_addr.h" -#include "mbed_error.h" - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ - -// clock source is selected with CLOCK_SOURCE in json config -#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO) -#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) -#define USE_PLL_HSI 0x2 // Use HSI internal clock - -#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) -uint8_t SetSysClock_PLL_HSE(uint8_t bypass, bool lowspeed); -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ - -#if ((CLOCK_SOURCE) & USE_PLL_HSI) -uint8_t SetSysClock_PLL_HSI(void); -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ - -/** - * @brief Configures the System clock source, PLL Multiplier and Divider factors, - * AHB/APBx prescalers and Flash settings - * @note This function should be called only once the RCC clock configuration - * is reset to the default reset state (done in SystemInit() function). - * @param None - * @retval None - */ - -void SetSysClock(void) -{ - - bool lowspeed = false; -#if defined(LOWSPEED) && (LOWSPEED == 1) - lowspeed = true; -#endif - -#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) - /* 1- Try to start with HSE and external clock (MCO from STLink PCB part) */ - if (SetSysClock_PLL_HSE(1, lowspeed) == 0) -#endif - { -#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) - /* 2- If fail try to start with HSE and external xtal */ - if (SetSysClock_PLL_HSE(0, lowspeed) == 0) -#endif - { -#if ((CLOCK_SOURCE) & USE_PLL_HSI) - /* 3- If fail start with HSI clock */ - if (SetSysClock_PLL_HSI() == 0) -#endif - { - error("SetSysClock failed\n"); - } - } - } -} - -static const uint32_t _keep; -bool isBootloader() -{ - return ((uint32_t)&_keep < 0x8040000); -} - -bool isBetaBoard() -{ - uint8_t *bootloader_data = (uint8_t *)(0x801F000); - if (bootloader_data[0] != 0xA0 || bootloader_data[1] < 14) { - return true; - } else { - return (bootloader_data[10] == 27); - } -} - -#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) -/******************************************************************************/ -/* PLL (clocked by HSE) used as System clock source */ -/******************************************************************************/ -uint8_t SetSysClock_PLL_HSE(uint8_t bypass, bool lowspeed) -{ - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - - // If we are reconfiguring the clock, select CSI as system clock source to allow modification of the PLL configuration - if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) { - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_CSI; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { - return 0; - } - } - - /* Enable oscillator pin */ - __HAL_RCC_GPIOH_CLK_ENABLE(); - GPIO_InitTypeDef gpio_osc_init_structure; - gpio_osc_init_structure.Pin = GPIO_PIN_1; - gpio_osc_init_structure.Mode = GPIO_MODE_OUTPUT_PP; - gpio_osc_init_structure.Pull = GPIO_PULLUP; - gpio_osc_init_structure.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOH, &gpio_osc_init_structure); - HAL_Delay(10); - HAL_GPIO_WritePin(GPIOH, GPIO_PIN_1, 1); - - /* Supply configuration update enable */ -#if HSE_VALUE == 27000000 - HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_EXT); -#else - HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_LDO); -#endif - /* Configure the main internal regulator output voltage */ - - if (lowspeed) { - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); - } else { - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - } - - while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - - /* Enable HSE Oscillator and activate PLL with HSE as source */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48; - if (bypass) { - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - } else { - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - } - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 5; - if (lowspeed) { - RCC_OscInitStruct.PLL.PLLN = 40; - } else { - RCC_OscInitStruct.PLL.PLLN = 160; - } - -#if HSE_VALUE == 27000000 - RCC_OscInitStruct.PLL.PLLM = 9; - if (lowspeed) { - RCC_OscInitStruct.PLL.PLLN = 80; - } else { - RCC_OscInitStruct.PLL.PLLN = 300; - } -#endif - - RCC_OscInitStruct.PLL.PLLFRACN = 0; - RCC_OscInitStruct.PLL.PLLP = 2; - RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLQ = 10; - RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - return 0; // FAIL - } - - /* Select PLL as system clock source and configure bus clocks dividers */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | - RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | - RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; - RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (lowspeed) { - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) { - return 0; // FAIL - } - } else { - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { - return 0; // FAIL - } - } - - // HAL_RCCEx_EnableBootCore(RCC_BOOT_C2); - -#if DEVICE_USBDEVICE - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - return 0; // FAIL - } - - HAL_PWREx_EnableUSBVoltageDetector(); -#endif /* DEVICE_USBDEVICE */ - - __HAL_RCC_CSI_ENABLE() ; - - __HAL_RCC_SYSCFG_CLK_ENABLE() ; - - HAL_EnableCompensationCell(); - - return 1; // OK -} -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ - -#if ((CLOCK_SOURCE) & USE_PLL_HSI) -/******************************************************************************/ -/* PLL (clocked by HSI) used as System clock source */ -/******************************************************************************/ -uint8_t SetSysClock_PLL_HSI(void) -{ - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - - /* Supply configuration update enable */ -#if HSE_VALUE == 27000000 - HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_EXT); -#else - HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_LDO); -#endif - - /* The voltage scaling allows optimizing the power consumption when the device is - clocked below the maximum system frequency, to update the voltage scaling value - regarding system frequency refer to product datasheet. */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - - // Enable HSI oscillator and activate PLL with HSI as source - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_CSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSEState = RCC_HSE_OFF; - RCC_OscInitStruct.CSIState = RCC_CSI_OFF; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 8; - RCC_OscInitStruct.PLL.PLLN = 100; - RCC_OscInitStruct.PLL.PLLP = 2; - RCC_OscInitStruct.PLL.PLLQ = 10; - RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - return 0; // FAIL - } - - /* Select PLL as system clock source and configure bus clocks dividers */ - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \ - RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1); - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; - RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { - return 0; // FAIL - } - - return 1; // OK -} -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ - -#if defined (CORE_CM4) -void HSEM2_IRQHandler(void) -{ - HAL_HSEM_IRQHandler(); -} -#endif - -#if defined (CORE_CM7) -void HSEM1_IRQHandler(void) -{ - HAL_HSEM_IRQHandler(); -} -#endif