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vivado_30456.backup.jou
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#-----------------------------------------------------------
# Vivado v2019.1.1 (64-bit)
# SW Build 2580384 on Sat Jun 29 08:04:45 MDT 2019
# IP Build 2579722 on Sat Jun 29 11:35:40 MDT 2019
# Start of session at: Mon Nov 25 14:04:08 2019
# Process ID: 30456
# Current directory: /home/hwkim/work/pynq-bnn/BNN-PYNQ
# Command line: vivado
# Log file: /home/hwkim/work/pynq-bnn/BNN-PYNQ/vivado.log
# Journal file: /home/hwkim/work/pynq-bnn/BNN-PYNQ/vivado.jou
#-----------------------------------------------------------
start_gui
open_project /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.xpr
update_compile_order -fileset sources_1
open_run synth_1 -name synth_1
create_debug_core u_ila_0 ila
set_property C_DATA_DEPTH 1024 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
connect_debug_port u_ila_0/clk [get_nets [list design_1_i/zynq_ultra_ps_e_0/inst/pl_clk0 ]]
set_property port_width 32 [get_debug_ports u_ila_0/probe0]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe1]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe2]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe3]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe4]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe5]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 24 [get_debug_ports u_ila_0/probe6]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[23]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe7]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe8]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe9]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
connect_debug_port u_ila_0/probe12 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe13]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
connect_debug_port u_ila_0/probe13 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe14]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
connect_debug_port u_ila_0/probe14 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe15]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
connect_debug_port u_ila_0/probe15 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe16]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
connect_debug_port u_ila_0/probe16 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe17]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
connect_debug_port u_ila_0/probe17 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe18]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
connect_debug_port u_ila_0/probe18 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe19]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
connect_debug_port u_ila_0/probe19 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe20]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
connect_debug_port u_ila_0/probe20 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe21]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
connect_debug_port u_ila_0/probe21 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe22]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe22]
connect_debug_port u_ila_0/probe22 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe23]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe23]
connect_debug_port u_ila_0/probe23 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe24]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe24]
connect_debug_port u_ila_0/probe24 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe25]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe25]
connect_debug_port u_ila_0/probe25 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe26]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe26]
connect_debug_port u_ila_0/probe26 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_write ]]
save_constraints
launch_runs impl_1 -to_step write_bitstream -jobs 12
wait_on_run impl_1
open_hw
file copy -force /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.sysdef /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.sdk/design_1_wrapper.hdf
launch_sdk -workspace /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.sdk -hwspec /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.sdk/design_1_wrapper.hdf
connect_hw_server
disconnect_hw_server localhost:3121
connect_hw_server -url 121.155.128.106:3121
current_hw_target [get_hw_targets */xilinx_tcf/Xilinx/88281A]
set_property PARAM.FREQUENCY 15000000 [get_hw_targets */xilinx_tcf/Xilinx/88281A]
open_hw_target
set_property PROGRAM.FILE {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.bit} [get_hw_devices xczu7_0]
set_property PROBES.FILE {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.ltx} [get_hw_devices xczu7_0]
set_property FULL_PROBES.FILE {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.ltx} [get_hw_devices xczu7_0]
current_hw_device [get_hw_devices xczu7_0]
refresh_hw_device [lindex [get_hw_devices xczu7_0] 0]
display_hw_ila_data [ get_hw_ila_data hw_ila_data_1 -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"design_1_i/system_ila_0/inst/ila_lib"}]]
display_hw_ila_data [ get_hw_ila_data hw_ila_data_2 -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
current_hw_device [get_hw_devices arm_dap_1]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices arm_dap_1] 0]
current_hw_device [get_hw_devices xczu7_0]
add_wave -into {hw_ila_data_2.wcfg} -radix hex { {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_write} }
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
wait_on_hw_ila -timeout 0 [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
open_bd_design {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd}
ipx::edit_ip_in_project -upgrade true -name BlackBoxJam_v1_0_project -directory /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.tmp/BlackBoxJam_v1_0_project /data_drive/bnn_seg_hls_project_backup/bnn_fpga_dbg_sel_strm_191125/sol1/impl/ip/component.xml
update_compile_order -fileset sources_1
current_project project_1
current_project BlackBoxJam_v1_0_project
set_property core_revision 1911251316 [ipx::current_core]
ipx::update_source_project_archive -component [ipx::current_core]
ipx::create_xgui_files [ipx::current_core]
ipx::update_checksums [ipx::current_core]
ipx::save_core [ipx::current_core]
ipx::move_temp_component_back -component [ipx::current_core]
close_project -delete
update_ip_catalog -rebuild -repo_path /data_drive/bnn_seg_hls_project_backup/bnn_fpga_dbg_sel_strm_191125/sol1/impl/ip
close_hw
open_bd_design {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd}
report_ip_status -name ip_status
upgrade_ip -vlnv xilinx.com:hls:BlackBoxJam:1.0 [get_ips design_1_BlackBoxJam_0_0] -log ip_upgrade.log
export_ip_user_files -of_objects [get_ips design_1_BlackBoxJam_0_0] -no_script -sync -force -quiet
generate_target all [get_files /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd]
catch { config_ip_cache -export [get_ips -all design_1_BlackBoxJam_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_auto_ds_0] }
catch { config_ip_cache -export [get_ips -all design_1_auto_pc_0] }
catch { config_ip_cache -export [get_ips -all design_1_auto_ds_1] }
catch { config_ip_cache -export [get_ips -all design_1_auto_pc_1] }
export_ip_user_files -of_objects [get_files /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
create_ip_run [get_files -of_objects [get_fileset sources_1] /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd]
launch_runs -jobs 12 design_1_BlackBoxJam_0_0_synth_1
export_simulation -of_objects [get_files /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd] -directory /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.ip_user_files/sim_scripts -ip_user_files_dir /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.ip_user_files -ipstatic_source_dir /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.ip_user_files/ipstatic -lib_map_path [list {modelsim=/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.cache/compile_simlib/modelsim} {questa=/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.cache/compile_simlib/questa} {ies=/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.cache/compile_simlib/ies} {xcelium=/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.cache/compile_simlib/xcelium} {vcs=/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.cache/compile_simlib/vcs} {riviera=/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.cache/compile_simlib/riviera}] -use_ip_compiled_libs -force -quiet
report_ip_status -name ip_status
reset_run synth_1
launch_runs synth_1 -jobs 12
wait_on_run synth_1
delete_debug_core [get_debug_cores {u_ila_0 }]
create_debug_core u_ila_0 ila
set_property C_DATA_DEPTH 1024 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
connect_debug_port u_ila_0/clk [get_nets [list design_1_i/zynq_ultra_ps_e_0/inst/pl_clk0 ]]
set_property port_width 32 [get_debug_ports u_ila_0/probe0]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe1]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe2]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe3]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe4]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe5]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 24 [get_debug_ports u_ila_0/probe6]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[23]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe7]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe8]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe9]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
connect_debug_port u_ila_0/probe12 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe13]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
connect_debug_port u_ila_0/probe13 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe14]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
connect_debug_port u_ila_0/probe14 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe15]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
connect_debug_port u_ila_0/probe15 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe16]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
connect_debug_port u_ila_0/probe16 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe17]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
connect_debug_port u_ila_0/probe17 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe18]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
connect_debug_port u_ila_0/probe18 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe19]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
connect_debug_port u_ila_0/probe19 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe20]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
connect_debug_port u_ila_0/probe20 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe21]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
connect_debug_port u_ila_0/probe21 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe22]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe22]
connect_debug_port u_ila_0/probe22 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe23]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe23]
connect_debug_port u_ila_0/probe23 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe24]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe24]
connect_debug_port u_ila_0/probe24 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe25]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe25]
connect_debug_port u_ila_0/probe25 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe26]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe26]
connect_debug_port u_ila_0/probe26 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_write ]]
create_ip_run [get_files -of_objects [get_fileset sources_1] /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd]
refresh_design
launch_runs impl_1 -to_step write_bitstream -jobs 12
wait_on_run impl_1
reset_run impl_1
create_debug_core u_ila_0 ila
set_property C_DATA_DEPTH 1024 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
connect_debug_port u_ila_0/clk [get_nets [list design_1_i/zynq_ultra_ps_e_0/inst/pl_clk0 ]]
set_property port_width 3 [get_debug_ports u_ila_0/probe0]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/ap_CS_fsm[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/ap_CS_fsm[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/ap_CS_fsm[2]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe1]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe2]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_dout[0]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe3]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_out_out_din[0]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe4]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 64 [get_debug_ports u_ila_0/probe5]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[31]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[32]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[33]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[34]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[35]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[36]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[37]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[38]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[39]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[40]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[41]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[42]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[43]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[44]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[45]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[46]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[47]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[48]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[49]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[50]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[51]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[52]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[53]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[54]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[55]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[56]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[57]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[58]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[59]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[60]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[61]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[62]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din[63]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe6]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe7]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe8]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe9]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe10]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe11]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[23]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[24]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[25]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[26]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[27]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[28]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[29]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[30]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
connect_debug_port u_ila_0/probe12 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_dout[0]} ]]
create_debug_port u_ila_0 probe
set_property port_width 24 [get_debug_ports u_ila_0/probe13]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
connect_debug_port u_ila_0/probe13 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[15]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[16]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[17]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[18]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[19]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[20]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[21]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[22]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout[23]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe14]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
connect_debug_port u_ila_0/probe14 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 16 [get_debug_ports u_ila_0/probe15]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
connect_debug_port u_ila_0/probe15 [get_nets [list {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[0]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[1]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[2]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[3]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[4]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[5]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[6]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[7]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[8]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[9]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[10]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[11]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[12]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[13]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[14]} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din[15]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe16]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
connect_debug_port u_ila_0/probe16 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe17]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
connect_debug_port u_ila_0/probe17 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe18]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
connect_debug_port u_ila_0/probe18 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_fu_35_p2 ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe19]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
connect_debug_port u_ila_0/probe19 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe20]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
connect_debug_port u_ila_0/probe20 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe21]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
connect_debug_port u_ila_0/probe21 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_out_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe22]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe22]
connect_debug_port u_ila_0/probe22 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_out_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe23]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe23]
connect_debug_port u_ila_0/probe23 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe24]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe24]
connect_debug_port u_ila_0/probe24 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe25]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe25]
connect_debug_port u_ila_0/probe25 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_out_out_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe26]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe26]
connect_debug_port u_ila_0/probe26 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_out_out_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe27]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe27]
connect_debug_port u_ila_0/probe27 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe28]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe28]
connect_debug_port u_ila_0/probe28 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe29]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe29]
connect_debug_port u_ila_0/probe29 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe30]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe30]
connect_debug_port u_ila_0/probe30 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe31]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe31]
connect_debug_port u_ila_0/probe31 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe32]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe32]
connect_debug_port u_ila_0/probe32 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe33]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe33]
connect_debug_port u_ila_0/probe33 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe34]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe34]
connect_debug_port u_ila_0/probe34 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe35]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe35]
connect_debug_port u_ila_0/probe35 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe36]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe36]
connect_debug_port u_ila_0/probe36 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe37]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe37]
connect_debug_port u_ila_0/probe37 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe38]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe38]
connect_debug_port u_ila_0/probe38 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_read ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe39]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe39]
connect_debug_port u_ila_0/probe39 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe40]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe40]
connect_debug_port u_ila_0/probe40 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe41]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe41]
connect_debug_port u_ila_0/probe41 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe42]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe42]
connect_debug_port u_ila_0/probe42 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe43]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe43]
connect_debug_port u_ila_0/probe43 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe44]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe44]
connect_debug_port u_ila_0/probe44 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_full_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe45]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe45]
connect_debug_port u_ila_0/probe45 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe46]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe46]
connect_debug_port u_ila_0/probe46 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_write ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe47]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe47]
connect_debug_port u_ila_0/probe47 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_empty_n ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe48]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe48]
connect_debug_port u_ila_0/probe48 [get_nets [list design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_read ]]
save_constraints
launch_runs impl_1 -to_step write_bitstream -jobs 12
wait_on_run impl_1
open_hw
file copy -force /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.sysdef /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.sdk/design_1_wrapper.hdf
launch_sdk -workspace /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.sdk -hwspec /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.sdk/design_1_wrapper.hdf
connect_hw_server -url 121.155.128.106:3121
current_hw_target [get_hw_targets */xilinx_tcf/Xilinx/88281A]
set_property PARAM.FREQUENCY 15000000 [get_hw_targets */xilinx_tcf/Xilinx/88281A]
open_hw_target
set_property PROGRAM.FILE {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.bit} [get_hw_devices xczu7_0]
set_property PROBES.FILE {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.ltx} [get_hw_devices xczu7_0]
set_property FULL_PROBES.FILE {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.runs/impl_1/design_1_wrapper.ltx} [get_hw_devices xczu7_0]
current_hw_device [get_hw_devices xczu7_0]
refresh_hw_device [lindex [get_hw_devices xczu7_0] 0]
display_hw_ila_data [ get_hw_ila_data hw_ila_data_1 -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"design_1_i/system_ila_0/inst/ila_lib"}]]
display_hw_ila_data [ get_hw_ila_data hw_ila_data_2 -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
current_hw_device [get_hw_devices arm_dap_1]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices arm_dap_1] 0]
current_hw_device [get_hw_devices xczu7_0]
add_wave -into {hw_ila_data_2.wcfg} -radix hex { {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_fu_35_p2} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_out_out_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_out_out_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/icmp_ln666_out_out_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_1_U0/targetLayer_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/ap_CS_fsm} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/inter1_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/mvOut_m_buffer_V_V_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_log_m_buffer_V_V_1_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/mvOut_m_buffer_V_V_1_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/in_V_V_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_log_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_4_U0/out_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_out_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_out_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/icmp_ln666_loc_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_dout} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_empty_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/in_V_V_read} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_log_V_V_write} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_din} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_full_n} {design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_6_U0/out_V_V_write} }
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
set_property TRIGGER_COMPARE_VALUE eq1'bX [get_hw_probes design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/Matrix_Vector_Activa_2_U0/convInp_V_V_1_read -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
set_property TRIGGER_COMPARE_VALUE eq1'bR [get_hw_probes design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_read -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
open_bd_design {/home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.srcs/sources_1/bd/design_1/design_1.bd}
ipx::edit_ip_in_project -upgrade true -name BlackBoxJam_v1_0_project -directory /home/hwkim/work/pynq-bnn/BNN-PYNQ/bnn/src/network/output/vivado/bnn_seg_net_zcu104/project_1/project_1.tmp/BlackBoxJam_v1_0_project /data_drive/bnn_seg_hls_project_backup/bnn_fpga_dbg_sel_strm_191125/sol1/impl/ip/component.xml
update_compile_order -fileset sources_1
current_project project_1
set_property TRIGGER_COMPARE_VALUE eq1'bX [get_hw_probes design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_read -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
set_property TRIGGER_COMPARE_VALUE eq3'h4 [get_hw_probes design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/ap_CS_fsm -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
refresh_hw_device [lindex [get_hw_devices xczu7_0] 0]
display_hw_ila_data [ get_hw_ila_data hw_ila_data_1 -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"design_1_i/system_ila_0/inst/ila_lib"}]]
display_hw_ila_data [ get_hw_ila_data hw_ila_data_2 -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
wait_on_hw_ila -timeout 0 [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
set_property TRIGGER_COMPARE_VALUE eq3'hX [get_hw_probes design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/ap_CS_fsm -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
set_property TRIGGER_COMPARE_VALUE eq1'bR [get_hw_probes design_1_i/BlackBoxJam_0/inst/grp_DoCompute_fu_1130/DoCompute_Block_pro_U0/icmp_ln666_loc_dout -of_objects [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
current_project BlackBoxJam_v1_0_project
current_project project_1
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}] -trigger_now
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
run_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
wait_on_hw_ila [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]
display_hw_ila_data [upload_hw_ila_data [get_hw_ilas -of_objects [get_hw_devices xczu7_0] -filter {CELL_NAME=~"u_ila_0"}]]
current_project BlackBoxJam_v1_0_project
current_project project_1
close_project