From 94c097d6b93db4186c5f751155aeff3e36c9150e Mon Sep 17 00:00:00 2001 From: noaOrMlnx Date: Tue, 20 Jan 2026 10:25:09 +0200 Subject: [PATCH 1/2] [Mellanox] Update SPC5 SKUs buffers to disable egress_mirroring --- .../Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 | 4 ++-- .../Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 | 4 ++-- .../Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 | 4 ++-- .../Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 index b88ff8ca20..f1828bab5b 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '108270592' %} +{% set ingress_lossless_pool_size = '110656512' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '108270592' %} +{% set egress_lossy_pool_size = '110656512' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 index b88ff8ca20..f1828bab5b 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '108270592' %} +{% set ingress_lossless_pool_size = '110656512' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '108270592' %} +{% set egress_lossy_pool_size = '110656512' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 index 3488f25dd7..896a51317f 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '105419776' %} +{% set ingress_lossless_pool_size = '108051456' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '105419776' %} +{% set egress_lossy_pool_size = '108051456' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 index 3488f25dd7..896a51317f 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '105419776' %} +{% set ingress_lossless_pool_size = '108051456' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '105419776' %} +{% set egress_lossy_pool_size = '108051456' %} {% import 'buffers_defaults_objects.j2' as defs with context %} From 256fbd3fc7ddff3656d16d595bb24be989226532 Mon Sep 17 00:00:00 2001 From: noaOrMlnx Date: Tue, 20 Jan 2026 18:34:38 +0200 Subject: [PATCH 2/2] Update SPC4 SN5600-C256S1 & SN5600-C224O8 SKUs and update headers --- .../Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 | 6 +++--- .../Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 | 6 +++--- .../Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 | 6 +++--- .../Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 | 6 +++--- .../Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 | 2 +- .../Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 | 2 +- .../Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 | 2 +- .../Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 | 2 +- 8 files changed, 16 insertions(+), 16 deletions(-) diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 index 5e4be75b82..bda06c6442 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '144129024' %} +{% set ingress_lossless_pool_size = '145321984' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '144129024' %} +{% set egress_lossy_pool_size = '145321984' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 index 5e4be75b82..bda06c6442 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '144129024' %} +{% set ingress_lossless_pool_size = '145321984' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '144129024' %} +{% set egress_lossy_pool_size = '145321984' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 index a2390d7652..6bf96f786d 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '142703616' %} +{% set ingress_lossless_pool_size = '144019456' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '142703616' %} +{% set egress_lossy_pool_size = '144019456' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 index a2390d7652..6bf96f786d 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '142703616' %} +{% set ingress_lossless_pool_size = '144019456' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '142703616' %} +{% set egress_lossy_pool_size = '144019456' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 index f1828bab5b..d6e2b569be 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t0.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 index f1828bab5b..d6e2b569be 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/buffers_defaults_t1.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 index 896a51317f..6726735884 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 index 896a51317f..6726735884 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License");