forked from paulscherrerinstitute/psi_fpga_all
-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy path.gitmodules
60 lines (60 loc) · 2.56 KB
/
.gitmodules
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
[submodule "VHDL/psi_tb"]
path = VHDL/psi_tb
url = https://github.com/paulscherrerinstitute/psi_tb
[submodule "VHDL/psi_common"]
path = VHDL/psi_common
url = https://github.com/paulscherrerinstitute/psi_common
[submodule "TCL/PsiSim"]
path = TCL/PsiSim
url = https://github.com/paulscherrerinstitute/PsiSim
[submodule "Python/PsiPyUtils"]
path = Python/PsiPyUtils
url = https://github.com/paulscherrerinstitute/PsiPyUtils
[submodule "Python/TbGenerator"]
path = Python/TbGenerator
url = https://github.com/paulscherrerinstitute/TbGenerator
[submodule "Python/VivadoScripting"]
path = Python/VivadoScripting
url = https://github.com/paulscherrerinstitute/VivadoScripting
[submodule "Python/IseScripting"]
path = Python/IseScripting
url = https://github.com/paulscherrerinstitute/IseScripting
[submodule "VHDL/en_cl_fix"]
path = VHDL/en_cl_fix
url = https://github.com/paulscherrerinstitute/en_cl_fix
[submodule "VHDL/psi_fix"]
path = VHDL/psi_fix
url = https://github.com/paulscherrerinstitute/psi_fix
[submodule "TCL/PsiIpPackage"]
path = TCL/PsiIpPackage
url = https://github.com/paulscherrerinstitute/PsiIpPackage
[submodule "VivadoIp/vivadoIP_data_rec"]
path = VivadoIp/vivadoIP_data_rec
url = https://github.com/paulscherrerinstitute/vivadoIP_data_rec
[submodule "VivadoIp/vivadoIP_clock_measure"]
path = VivadoIp/vivadoIP_clock_measure
url = https://github.com/paulscherrerinstitute/vivadoIP_clock_measure
[submodule "VivadoIp/vivadoIP_spi_simple"]
path = VivadoIp/vivadoIP_spi_simple
url = https://github.com/paulscherrerinstitute/vivadoIP_spi_simple
[submodule "VivadoIp/vivadoIP_axis_data_gen"]
path = VivadoIp/vivadoIP_axis_data_gen
url = https://github.com/paulscherrerinstitute/vivadoIP_axis_data_gen
[submodule "VivadoIp/vivadoIP_mem_test"]
path = VivadoIp/vivadoIP_mem_test
url = https://github.com/paulscherrerinstitute/vivadoIP_mem_test
[submodule "VHDL/psi_multi_stream_daq"]
path = VHDL/psi_multi_stream_daq
url = https://github.com/paulscherrerinstitute/psi_multi_stream_daq
[submodule "VivadoIp/vivadoIP_psi_ms_daq"]
path = VivadoIp/vivadoIP_psi_ms_daq
url = https://github.com/paulscherrerinstitute/vivadoIP_psi_ms_daq
[submodule "Python/PsiFpgaLibDependencies"]
path = Python/PsiFpgaLibDependencies
url = https://github.com/paulscherrerinstitute/PsiFpgaLibDependencies
[submodule "VivadoIp/vivadoIP_i2c_devreg"]
path = VivadoIp/vivadoIP_i2c_devreg
url = https://github.com/paulscherrerinstitute/vivadoIP_i2c_devreg
[submodule "VivadoIp/vivadoIP_power_sink"]
path = VivadoIp/vivadoIP_power_sink
url = https://github.com/paulscherrerinstitute/vivadoIP_power_sink