diff --git a/badger/doc/Makefile b/badger/doc/Makefile index 46599cc92..88a2ae5bc 100644 --- a/badger/doc/Makefile +++ b/badger/doc/Makefile @@ -1,6 +1,7 @@ # Commentary in ../tests/Makefile XCIRCUIT = xcircuit XVFB = xvfb-run -a -s "-screen 0 1440x900x24" +PANDOC = pandoc all: svg .PHONY: svg html @@ -14,10 +15,10 @@ html: ../index.html ../status.html echo "page load $<; svg; exit" > .xcircuitrc; $(XVFB) $(XCIRCUIT); rm .xcircuitrc ../index.html: ../README.md - pandoc -t html $< | sed -e 's,status\.md,status.html,g' > $@ + $(PANDOC) -t html $< | sed -e 's,status\.md,status.html,g' > $@ ../status.html: ../status.md - pandoc -t html -o $@ $< + $(PANDOC) -t html -o $@ $< clean: rm -f *.svg *.html diff --git a/badger/tests/Makefile b/badger/tests/Makefile index 9c52d38b6..dabc92699 100644 --- a/badger/tests/Makefile +++ b/badger/tests/Makefile @@ -38,7 +38,6 @@ VLATOR_LINT_IGNORE += -Wno-UNUSED -Wno-DECLFILENAME # Configuration not covered (yet?) by Bedrock's top_rules.mk VCD_ARGS = $(VCD_ARGS_$@) VVP_FLAGS = ${VVP_FLAGS_$@} ${VCD_ARGS_$@} -PERL = perl XCIRCUIT = xcircuit # XXX consider converting this to something more compatible with Bedrock's VIVADO_SYNTH. VIVADOEXEC = vivado @@ -89,10 +88,10 @@ crc_selfcheck: crc_selfcheck.o crc32.o derive_tb: crc_genguts.vh crc_genguts.vh: crc_derive - ./$^ 16 0x1021 32 > $@ + ./$< 16 0x1021 32 > $@ crc8e_guts.vh: crc_derive - ./$^ -lsb 32 0x04C11DB7 8 > $@ + ./$< -lsb 32 0x04C11DB7 8 > $@ # New feature compared to PSPEPS: no include file (or path) needed! # crc8e_guts.v is pre-filled in. The following steps give its derivation diff --git a/board_support/bmb7_kintex/jxj_gate.mk b/board_support/bmb7_kintex/jxj_gate.mk index 243a0bff4..ffff9f83f 100644 --- a/board_support/bmb7_kintex/jxj_gate.mk +++ b/board_support/bmb7_kintex/jxj_gate.mk @@ -23,7 +23,7 @@ COMMON_HDL_DIR = submodules/common-hdl $(VVP) $< $(VFLAGS) %.dat: %_tb - vvp $< > $@ + $(VVP) $< > $@ all: jxj_gate_tb diff --git a/board_support/sp605/Makefile b/board_support/sp605/Makefile index 4d73ebb93..87960d181 100644 --- a/board_support/sp605/Makefile +++ b/board_support/sp605/Makefile @@ -1,26 +1,26 @@ ether_mc_sp605.bit: ether_mc_sp605.v $(ETH_MC_DEPS) $(FPGA_DIR)/sp60x_clocks.v config_romx_sp605.v sp605_gmii_base.ucf - PART=xc6slx45t-fgg484-3 $(SYNTH) ether_mc $^ + PART=xc6slx45t-fgg484-3 $(SYNTH) ether_mc $^ mv _xilinx/ether_mc.bit $@ ether_fllrf_sp605.bit: ether_fllrf_sp605.v $(BUILD_v_fllrf) $(FPGA_DIR)/sp60x_clocks.v config_romx_sp605.v sp605_gmii_base.ucf - PART=xc6slx45t-fgg484-3 $(SYNTH) ether_fllrf $^ + PART=xc6slx45t-fgg484-3 $(SYNTH) ether_fllrf $^ mv _xilinx/ether_fllrf.bit $@ ether_mgt_sp605_tb: ether_gtp_sp605_tb.v $(S6GTP_SUPPORT) BUFG.v IBUFDS.v $(S6GTP_XILINX_SIM_MODULE) ## mgt support on Spartan 6 ether_mgt_sp605.bit: ether_mgt_sp605.v $(S6GTP_SUPPORT) $(FPGA_DIR)/sp60x_clocks.v config_romx_sp605.v sp605_mgt_base.ucf $(ETH_MGT_DEPS) - PART=xc6slx45t-fgg484-3 $(SYNTH) ether_mgt $^ + PART=xc6slx45t-fgg484-3 $(SYNTH) ether_mgt $^ mv _xilinx/ether_mgt.bit $@ ether_both_sp605.bit: ether_both_sp605.v $(S6GTP_SUPPORT) $(ETH_MC_DEPS) $(FPGA_DIR)/sp60x_clocks.v config_romx_sp605.v $(COMMON_HDL_DIR)/data_xdomain.v $(COMMON_HDL_DIR)/flag_xdomain.v sp605_mgt_gmii_base.ucf $(ETH_MGT_DEPS) $(TXU) - PART=xc6slx45t-fgg484-3 $(SYNTH) ether_both_sp605 $^ + PART=xc6slx45t-fgg484-3 $(SYNTH) ether_both_sp605 $^ mv _xilinx/ether_both_sp605.bit $@ ether_fmc_mgt_sp605.bit: ether_fmc_mgt_sp605.v ether_fmc_mgt.vh $(S6GTP_SUPPORT) $(ETH_MC_DEPS) $(FPGA_DIR)/sp60x_clocks.v config_romx_sp605.v sp605_mgt_fmc.ucf $(FMC_SUPPORT) $(DDR_SUPPORT) - PART=xc6slx45t-fgg484-3 $(SYNTH) ether_fmc_mgt $^ + PART=xc6slx45t-fgg484-3 $(SYNTH) ether_fmc_mgt $^ mv _xilinx/ether_fmc_mgt.bit $@ ether_fmc_mc_sp605.bit: ether_fmc_mc_sp605.v ether_fmc_mc.vh $(FPGA_DIR)/sp60x_clocks.v config_romx_sp605.v sp605_gmii_fmc.ucf $(FMC_SUPPORT) $(DDR_SUPPORT) - PART=xc6slx45t-fgg484-3 $(SYNTH) ether_fmc_mc $^ + PART=xc6slx45t-fgg484-3 $(SYNTH) ether_fmc_mc $^ mv _xilinx/ether_fmc_mc.bit $@ diff --git a/build-tools/Makefile b/build-tools/Makefile index 1c319ad78..e3d5988ed 100644 --- a/build-tools/Makefile +++ b/build-tools/Makefile @@ -4,6 +4,7 @@ XCIRCUIT = xcircuit XVFB = xvfb-run -a -s "-screen 0 1440x900x24" +PANDOC = pandoc # Kind of weird to use xcircuit's rc file for this purpose, # but it does work. @@ -15,7 +16,7 @@ all: cdc_snitch.html # We can generate a quick preview with pandoc. cdc_snitch.md is also # checked compatible with sphinx, gitlab, and github. cdc_snitch.html: cdc_snitch.md cdc_BAD.svg cdc_OK1.svg cdc_OKX.svg - pandoc -t html $< > $@ + $(PANDOC) -t html $< > $@ clean: rm -f cdc_snitch.html diff --git a/build-tools/top_rules.mk b/build-tools/top_rules.mk index 96ec2b70f..9adfcecc9 100644 --- a/build-tools/top_rules.mk +++ b/build-tools/top_rules.mk @@ -18,8 +18,10 @@ VERILATOR = verilator -Wall -Wno-fatal GTKWAVE = gtkwave VPIEXT = vpi PYTHON = python3 +PERL = perl AWK = awk XCIRCUIT = xcircuit +SV2V = sv2v YOSYS = yosys YOSYS_QUIET = -q YOSYS_JSON_OPTION = -DBUGGY_FORLOOP @@ -224,4 +226,4 @@ COMMA := , dot -Tps $< -o $@ %_support.vh: $(BS_HARDWARE_DIR)/%_support.in - perl $(BUILD_DIR)/regmap_proc.pl $< > $@ + $(PERL) $(BUILD_DIR)/regmap_proc.pl $< > $@ diff --git a/cmoc/Makefile b/cmoc/Makefile index e7bb10443..2befd6445 100644 --- a/cmoc/Makefile +++ b/cmoc/Makefile @@ -38,7 +38,7 @@ fdbk_core.vcd: $(AUTOGEN_DIR)/regmap_fdbk_core_tb.json fdbk_core.vcd: fdbk_core_tb fdbk_core_test.py $(PYTHON) fdbk_core_test.py fdbk_core_check: fdbk_core.vcd - @ echo DONE + @echo DONE cryomodule_in.dat: cryomodule_test_setup.py $(AUTOGEN_DIR)/regmap_cryomodule.json $(PYTHON) cryomodule_test_setup.py | sed -e 's/ *#.*//' | grep . > $@ diff --git a/fpga_family/spartan6/rules.mk b/fpga_family/spartan6/rules.mk index 9d3e1e776..3f04f12b0 100644 --- a/fpga_family/spartan6/rules.mk +++ b/fpga_family/spartan6/rules.mk @@ -1,4 +1,4 @@ s6_gtp_params.vh: - perl $(BUILD_DIR)/ucf2par $(FPGA_FAMILY_DIR)/$(FPGA_FAMILY)/s6gtp.ucf > $@ + $(PERL) $(BUILD_DIR)/ucf2par $(FPGA_FAMILY_DIR)/$(FPGA_FAMILY)/s6gtp.ucf > $@ CLEAN += s6_gtp_params.vh diff --git a/projects/common/leep/Makefile b/projects/common/leep/Makefile index c9acd5a0b..c74922b37 100644 --- a/projects/common/leep/Makefile +++ b/projects/common/leep/Makefile @@ -2,9 +2,9 @@ THIS_DIR := $(realpath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))) include $(THIS_DIR)/../../../dir_list.mk -PYTHON=python3 +PYTHON = python3 -LEEP_CORE=base.py raw.py ca.py file.py logic.py +LEEP_CORE = base.py raw.py ca.py file.py logic.py all: test_cli test_raw @@ -20,7 +20,7 @@ test_raw: raw.py server: $(LEEP_CORE) cli.py PYTHONPATH="$(THIS_DIR)/..:$(BUILD_DIR)" $(PYTHON) -m leep.test.test_cli server -CLEANS=test.json +CLEANS = test.json clean: rm -rf $(CLEANS) diff --git a/projects/comms_top/gige_eth/Makefile b/projects/comms_top/gige_eth/Makefile index f7c187235..f49bab27c 100644 --- a/projects/comms_top/gige_eth/Makefile +++ b/projects/comms_top/gige_eth/Makefile @@ -25,7 +25,7 @@ hwload_ac701: xc3sprog -c jtaghs1_fast $(SERIAL_NUM_OPT) $(BITFILE) hwtest_ac701: - ping -c2 $(SFP_IP) && cd ../test && python3 comms_top_test.py -t $(SFP_IP) -cf mem_test.cf + ping -c 2 $(SFP_IP) && cd ../test && $(PYTHON) comms_top_test.py -t $(SFP_IP) -cf mem_test.cf ifneq (,$(findstring bit,$(MAKECMDGOALS))) ifneq (,$(findstring bits,$(MAKECMDGOALS))) diff --git a/projects/oscope/bmb7_cu/Makefile b/projects/oscope/bmb7_cu/Makefile index afd967198..28c2669f3 100644 --- a/projects/oscope/bmb7_cu/Makefile +++ b/projects/oscope/bmb7_cu/Makefile @@ -57,7 +57,7 @@ Voscope_top_leep: Voscope_top_tb $(APP_NAME)_regmap.json @echo "----- Oscope leep list self-test -----" timeout 20 ./$< & PYTHONPATH=$(PROJECTS_DIR)/common/ $(PYTHON) -m leep.cli leep://localhost:3010 list > leep_list.txt - awk -F'"' '/ {/{print $$2}' $(APP_NAME)_regmap.json | cmp leep_list.txt - + $(AWK) -F'"' '/ {/{print $$2}' $(APP_NAME)_regmap.json | cmp leep_list.txt - Voscope_top_live: Voscope_top_tb $(APP_NAME)_regmap.json @echo "----- Oscope build rom live test -----" diff --git a/projects/oscope/common/llspi.mk b/projects/oscope/common/llspi.mk index 5ebb1378d..0515843ae 100644 --- a/projects/oscope/common/llspi.mk +++ b/projects/oscope/common/llspi.mk @@ -23,7 +23,7 @@ PYTHON = python3 $(VVP) $< $(VFLAGS) %.dat: %_tb - vvp $< > $@ + $(VVP) $< > $@ all: llspi_tb diff --git a/projects/oscope/marble_family/Makefile b/projects/oscope/marble_family/Makefile index d31522b24..4ec3dab28 100644 --- a/projects/oscope/marble_family/Makefile +++ b/projects/oscope/marble_family/Makefile @@ -53,11 +53,15 @@ oscope_top.sv: $(AUTOGEN_DIR)/config_romx.v $(RTEFI_V) $(AUTOGEN_DIR)/applicatio oscope_top.bit: $(AUTOGEN_DIR)/config_romx.v # ===== -# highly experimental and still somewhat messy -# sv2v not supplied; see https://github.com/zachjs/sv2v +# Process code base with sv2v, verilator, yosys, and cdc_snitch +# Experimental and still somewhat messy +# Exposes weaknessess in our tools' handling of inout ports; see +# https://github.com/zachjs/sv2v/issues/295 +# https://github.com/YosysHQ/yosys/issues/4708 +# https://github.com/verilator/verilator/issues/2844 UPPER_SV = oscope_top.sv $(OSCOPE_COMMON_DIR)/application_top.sv $(BOARD_SUPPORT_DIR)/zest/zest_cfg_if.sv $(BOARD_SUPPORT_DIR)/zest/zest_if.sv $(BOARD_SUPPORT_DIR)/zest/zest_wrap.sv $(OSCOPE_COMMON_DIR)/digitizer_config.sv oscope_prep.v: $(AUTOGEN_DIR)/application_top_auto.vh $(AUTOGEN_DIR)/addr_map_application_top.vh oscope_marble2_features - sv2v -DSIMULATE -DVERILATOR -I $(AUTOGEN_DIR) $(UPPER_SV) > $@ + $(SV2V) -DSIMULATE -DVERILATOR -I $(AUTOGEN_DIR) $(UPPER_SV) > $@ wc -l $@ oscope_pure_v.d: oscope_prep.v $(AUTOGEN_DIR)/config_romx.v $(RTEFI_V) $(AUTOGEN_DIR)/moving_average.v $(VERILOG) -Wno-timescale -o /dev/null $< -y$(AUTOGEN_DIR) $(VFLAGS_DEP) -M$@.$$$$ && sort -u < $@.$$$$ | tr '\n' ' ' | sed -e 's/^/oscope_pure_v_check oscope_prep_yosys.json: /' -e 's/ $$//' > $@ && rm $@.$$$$ @@ -72,6 +76,10 @@ VLATOR_LINT_IGNORE += -Wno-UNUSED -Wno-VARHIDDEN -Wno-DECLFILENAME -Wno-CASEINCO VLATORFLAGS += -DSIMULATE oscope_pure_v_check: $(VERILATOR_LINT) +# exercise with make dep && make oscope_pure_v_check +# or make dep && make oscope_prep_lint +# same result, but different dependency list management +# YOSYS_JSON_OPTION += -DSIMULATE # most dependencies from oscope_pure_v.d oscope_prep_yosys.json: $(FPGA_FAMILY_DIR)/xilinx/IBUFGDS.v diff --git a/projects/test_marble_family/i2c/Makefile b/projects/test_marble_family/i2c/Makefile index e9ff48874..9616b851e 100644 --- a/projects/test_marble_family/i2c/Makefile +++ b/projects/test_marble_family/i2c/Makefile @@ -1,14 +1,14 @@ # A demo of Marble-specific I2C functionality -PYTHON=python3 +PYTHON = python3 -TARGETS=prog.dat prog.vh prog.h prog.json +TARGETS = prog.dat prog.vh prog.h prog.json .PHONY: all all: $(TARGETS) # ======= Build a program for i2c_chunk -PROG_FILE=demo_marble_i2c.py +PROG_FILE = demo_marble_i2c.py prog.dat: $(PROG_FILE) $(PYTHON) $< > $@ @@ -25,13 +25,13 @@ prog.json: $(PROG_FILE) $(PYTHON) $< j 0x800 > $@ # ======= Test a bunch of assembler violations -BAD_FILE=demo_i2c_baddy.py +BAD_FILE = demo_i2c_baddy.py .PHONY: test test: $(BAD_FILE) $(PYTHON) $< # ======= Decode a program in marble context -DECODE_FILE=marble_i2c_decoder.py +DECODE_FILE = marble_i2c_decoder.py .PHONY: decode decode: prog.dat $(PYTHON) $(DECODE_FILE) $< diff --git a/projects/trigger_capture/Makefile b/projects/trigger_capture/Makefile index 75b41c0b9..938967993 100644 --- a/projects/trigger_capture/Makefile +++ b/projects/trigger_capture/Makefile @@ -1,11 +1,12 @@ +PYTHON = python3 marble.bit: echo "dummy" > firmware/app.bin - python3 marble.py --no-compile-gateware --csr-csv csr.csv --cpu-type picorv32 --uart-name crossover + $(PYTHON) marble.py --no-compile-gateware --csr-csv csr.csv --cpu-type picorv32 --uart-name crossover make -C firmware clean all - python3 marble.py --build --csr-csv csr.csv --cpu-type picorv32 --uart-name crossover+uartbone + $(PYTHON) marble.py --build --csr-csv csr.csv --cpu-type picorv32 --uart-name crossover+uartbone load: - python3 marble.py --load --no-compile-gateware --no-compile-software + $(PYTHON) marble.py --load --no-compile-gateware --no-compile-software clean: rm -rf build diff --git a/soc/picorv32/rules.mk b/soc/picorv32/rules.mk index 20a1f4697..71ea876ae 100644 --- a/soc/picorv32/rules.mk +++ b/soc/picorv32/rules.mk @@ -41,8 +41,7 @@ LDFLAGS = $(CLFLAGS) -Wl,--strip-debug,--print-memory-usage,-Bstatic,-Map,$*.map %_load: %32.hex $(PYTHON) $(COMMON_DIR)/boot_load.py $< $(BOOTLOADER_SERIAL) --baud_rate $(BOOTLOADER_BAUDRATE) -# All testbenches use $stop, eliminating the `awk` dependency -%_check: %_tb +# All testbenches use $stop, eliminating the old `awk` dependency %_check: %_tb $(VERILOG_SIM) @@ -57,10 +56,12 @@ LDFLAGS = $(CLFLAGS) -Wl,--strip-debug,--print-memory-usage,-Bstatic,-Map,$*.map chmod -x $@ %_synth.bit: %.v - vivado -nojou -mode batch -source $(filter %.tcl, $^) -tclargs $(basename $@) $(BLOCK_RAM_SIZE) $(filter %.v, $^) + $(VIVADO_CMD) -source $(filter %.tcl, $^) -tclargs $(basename $@) $(BLOCK_RAM_SIZE) $(filter %.v, $^) -%_config: - xc3sprog -c jtaghs1_fast $(patsubst %_config,%.bit,$@) +# No serial number is provided in this rule, so it's only useful when +# a single FTDI device is plugged into your workstation +%_config: %.bit + xc3sprog -c jtaghs1_fast $< CLEAN += $(TARGET).vcd $(TARGET)_tb $(TARGET).map $(TARGET).lst $(TARGET).elf pico.trace CLEAN += $(TARGET)8.hex $(TARGET)32.hex $(TARGET)32.dat $(TARGET).o $(OBJS) diff --git a/soc/picorv32/test/badger_lwip/Makefile b/soc/picorv32/test/badger_lwip/Makefile index 7d5c5ccee..2772ca907 100644 --- a/soc/picorv32/test/badger_lwip/Makefile +++ b/soc/picorv32/test/badger_lwip/Makefile @@ -51,7 +51,7 @@ CFLAGS += -DLWIP_DEBUG # builds an hardware emulator for running / debugging lwip # -DETHERNET_MODEL_DEBUG V$(TARGET): $(SRC_V) $(TARGET)_sim.cpp ethernet_model.c tap_alloc.c crc32.c - verilator --trace -cc --exe --top-module $(TARGET)_tb \ + $(VERILATOR) --trace -cc --exe --top-module $(TARGET)_tb \ -Wno-PINMISSING -Wno-WIDTH -Wno-CASEINCOMPLETE \ -DBLOCK_RAM_SIZE=$(BLOCK_RAM_SIZE) \ -CFLAGS "-I$(BADGER_DIR)/tests" \