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| 1 | +/* |
| 2 | + * The MIT License (MIT) |
| 3 | + * |
| 4 | + * Copyright (c) 2024 CDarius |
| 5 | + * |
| 6 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | + * of this software and associated documentation files (the "Software"), to deal |
| 8 | + * in the Software without restriction, including without limitation the rights |
| 9 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | + * copies of the Software, and to permit persons to whom the Software is |
| 11 | + * furnished to do so, subject to the following conditions: |
| 12 | + * |
| 13 | + * The above copyright notice and this permission notice shall be included in |
| 14 | + * all copies or substantial portions of the Software. |
| 15 | + * |
| 16 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | + * THE SOFTWARE. |
| 23 | + */ |
| 24 | + |
| 25 | +#ifndef M5STACK_CORES3_H_ |
| 26 | +#define M5STACK_CORES3_H_ |
| 27 | + |
| 28 | +//--------------------------------------------------------------------+ |
| 29 | +// Button |
| 30 | +//--------------------------------------------------------------------+ |
| 31 | + |
| 32 | +// Enter UF2 mode if GPIO is pressed while 2nd stage bootloader indicator |
| 33 | +// is on e.g RGB = Purple. If it is GPIO0, user should not hold this while |
| 34 | +// reset since that will instead run the 1st stage ROM bootloader |
| 35 | +#define PIN_BUTTON_UF2 0 |
| 36 | + |
| 37 | +// GPIO that implement 1-bit memory with RC components which hold the |
| 38 | +// pin value long enough for double reset detection. |
| 39 | +//#define PIN_DOUBLE_RESET_RC 41 |
| 40 | + |
| 41 | +//--------------------------------------------------------------------+ |
| 42 | +// USB UF2 |
| 43 | +//--------------------------------------------------------------------+ |
| 44 | + |
| 45 | +#define USB_VID 0x303A |
| 46 | +#define USB_PID 0x811B |
| 47 | + |
| 48 | +#define USB_MANUFACTURER "M5Stack" |
| 49 | +#define USB_PRODUCT "CoreS3" |
| 50 | + |
| 51 | +#define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT |
| 52 | +#define UF2_BOARD_ID "ESP32S3-AtomS3-01" |
| 53 | +#define UF2_VOLUME_LABEL "CORES3BOOT" |
| 54 | +#define UF2_INDEX_URL "https://shop.m5stack.com/products/m5stack-cores3-esp32s3-lotdevelopment-kit" |
| 55 | + |
| 56 | +#endif |
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