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driver-avalon8.c
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driver-avalon8.c
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/*
* Copyright 2017 xuzhenxing <xuzhenxing@canaan-creative.com>
* Copyright 2016-2017 Mikeqin <Fengling.Qin@gmail.com>
* Copyright 2016 Con Kolivas <kernel@kolivas.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version. See COPYING for more details.
*/
#include <math.h>
#include "config.h"
#include "miner.h"
#include "driver-avalon8.h"
#include "crc.h"
#include "sha2.h"
#include "hexdump.c"
#define get_fan_pwm(v) (AVA8_PWM_MAX - (v) * AVA8_PWM_MAX / 100)
int opt_avalon8_temp_target = AVA8_DEFAULT_TEMP_TARGET;
int opt_avalon8_fan_min = AVA8_DEFAULT_FAN_MIN;
int opt_avalon8_fan_max = AVA8_DEFAULT_FAN_MAX;
int opt_avalon8_voltage_level = AVA8_INVALID_VOLTAGE_LEVEL;
int opt_avalon8_voltage_level_offset = AVA8_DEFAULT_VOLTAGE_LEVEL_OFFSET;
int opt_avalon8_asic_otp = AVA8_INVALID_ASIC_OTP;
static uint8_t opt_avalon8_cycle_hit_flag;
int opt_avalon8_freq[AVA8_DEFAULT_PLL_CNT] =
{
AVA8_DEFAULT_FREQUENCY,
AVA8_DEFAULT_FREQUENCY,
AVA8_DEFAULT_FREQUENCY,
AVA8_DEFAULT_FREQUENCY
};
int opt_avalon8_freq_sel = AVA8_DEFAULT_FREQUENCY_SEL;
int opt_avalon8_polling_delay = AVA8_DEFAULT_POLLING_DELAY;
int opt_avalon8_aucspeed = AVA8_AUC_SPEED;
int opt_avalon8_aucxdelay = AVA8_AUC_XDELAY;
int opt_avalon8_smart_speed = AVA8_DEFAULT_SMART_SPEED;
/*
* smart speed have 2 modes
* 1. auto speed by A3210 chips
* 2. option 1 + adjust by average frequency
*/
bool opt_avalon8_iic_detect = AVA8_DEFAULT_IIC_DETECT;
uint32_t opt_avalon8_th_pass = AVA8_INVALID_TH_PASS;
uint32_t opt_avalon8_th_fail = AVA8_INVALID_TH_FAIL;
uint32_t opt_avalon8_th_init = AVA8_DEFAULT_TH_INIT;
uint32_t opt_avalon8_th_ms = AVA8_DEFAULT_TH_MS;
uint32_t opt_avalon8_th_timeout = AVA8_INVALID_TH_TIMEOUT;
uint32_t opt_avalon8_th_add = AVA8_DEFAULT_TH_ADD;
uint32_t opt_avalon8_nonce_mask = AVA8_INVALID_NONCE_MASK;
uint32_t opt_avalon8_nonce_check = AVA8_DEFAULT_NONCE_CHECK;
uint32_t opt_avalon8_mux_l2h = AVA8_DEFAULT_MUX_L2H;
uint32_t opt_avalon8_mux_h2l = AVA8_DEFAULT_MUX_H2L;
uint32_t opt_avalon8_h2ltime0_spd = AVA8_DEFAULT_H2LTIME0_SPD;
uint32_t opt_avalon8_roll_enable = AVA8_DEFAULT_ROLL_ENABLE;
uint32_t opt_avalon8_spdlow = AVA8_INVALID_SPDLOW;
uint32_t opt_avalon8_spdhigh = AVA8_DEFAULT_SPDHIGH;
uint32_t opt_avalon8_pid_p = AVA8_DEFAULT_PID_P;
uint32_t opt_avalon8_pid_i = AVA8_DEFAULT_PID_I;
uint32_t opt_avalon8_pid_d = AVA8_DEFAULT_PID_D;
uint32_t cpm_table[] =
{
0x04400000,
0x04000000,
0x008ffbe1,
0x0097fde1,
0x009fffe1,
0x009ddf61,
0x009dcf61,
0x009f47c1,
0x009fbfe1,
0x009f37c1,
0x009daf61,
0x009b26c1,
0x009da761,
0x00999e61,
0x009b9ee1,
0x009d9f61,
0x009f9fe1,
0x00991641,
0x009a96a1,
0x009c1701,
0x009d9761,
0x009f17c1,
0x00958d61,
0x00968da1,
0x00978de1,
0x00988e21,
0x00998e61,
0x009a8ea1,
0x009b8ee1,
0x009c8f21,
0x009d8f61,
0x009e8fa1,
0x009f8fe1,
0x00900401,
0x00908421,
0x00910441,
0x00918461,
0x00920481,
0x009284a1,
0x009304c1,
0x009384e1,
0x00940501,
0x00948521,
0x00950541,
0x00958561,
0x00960581,
0x009685a1,
0x009705c1,
0x009785e1
};
struct avalon8_dev_description avalon8_dev_table[] = {
{
"821",
821,
4,
26,
AVA8_MM821_VIN_ADC_RATIO,
AVA8_MM821_VOUT_ADC_RATIO,
5,
{
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_650M
}
},
{
"831",
831,
4,
26,
AVA8_MM831_VIN_ADC_RATIO,
AVA8_MM831_VOUT_ADC_RATIO,
5,
{
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_725M
}
},
{
"841",
841,
4,
26,
AVA8_MM841_VIN_ADC_RATIO,
AVA8_MM841_VOUT_ADC_RATIO,
5,
{
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_775M
}
},
{
"851",
851,
4,
26,
AVA8_MM851_VIN_ADC_RATIO,
AVA8_MM851_VOUT_ADC_RATIO,
5,
{
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_0M,
AVA8_DEFAULT_FREQUENCY_850M
}
}
};
static uint32_t api_get_cpm(uint32_t freq)
{
return cpm_table[freq / 25];
}
static uint32_t encode_voltage(int volt_level)
{
if (volt_level > AVA8_DEFAULT_VOLTAGE_LEVEL_MAX)
volt_level = AVA8_DEFAULT_VOLTAGE_LEVEL_MAX;
else if (volt_level < AVA8_DEFAULT_VOLTAGE_LEVEL_MIN)
volt_level = AVA8_DEFAULT_VOLTAGE_LEVEL_MIN;
if (volt_level < 0)
return 0x8080 | (-volt_level);
return 0x8000 | volt_level;
}
static uint32_t decode_voltage(struct avalon8_info *info, int modular_id, uint32_t volt)
{
return (volt * info->vout_adc_ratio[modular_id] / info->asic_count[modular_id] / 100);
}
static uint16_t decode_vin(struct avalon8_info *info, int modular_id, uint16_t volt)
{
return (volt * info->vin_adc_ratio[modular_id] / 1000);
}
static double decode_pvt_temp(uint16_t pvt_code)
{
double g = 60.0;
double h = 200.0;
double cal5 = 4094.0;
double j = -0.1;
double fclkm = 6.25;
/* Mode2 temperature equation */
return g + h * (pvt_code / cal5 - 0.5) + j * fclkm;
}
static uint32_t decode_pvt_volt(uint16_t volt)
{
double vref = 1.20;
double r = 16384.0; /* 2 ** 14 */
double c;
c = vref / 5.0 * (6 * (volt - 0.5) / r - 1.0);
if (c < 0)
c = 0;
return c * 1000;
}
#define SERIESRESISTOR 10000
#define THERMISTORNOMINAL 10000
#define BCOEFFICIENT 3500
#define TEMPERATURENOMINAL 25
float decode_auc_temp(int value)
{
float ret, resistance;
if (!((value > 0) && (value < 33000)))
return -273;
resistance = (3.3 * 10000 / value) - 1;
resistance = SERIESRESISTOR / resistance;
ret = resistance / THERMISTORNOMINAL;
ret = logf(ret);
ret /= BCOEFFICIENT;
ret += 1.0 / (TEMPERATURENOMINAL + 273.15);
ret = 1.0 / ret;
ret -= 273.15;
return ret;
}
#define UNPACK32(x, str) \
{ \
*((str) + 3) = (uint8_t) ((x) ); \
*((str) + 2) = (uint8_t) ((x) >> 8); \
*((str) + 1) = (uint8_t) ((x) >> 16); \
*((str) + 0) = (uint8_t) ((x) >> 24); \
}
static inline void sha256_prehash(const unsigned char *message, unsigned int len, unsigned char *digest)
{
int i;
sha256_ctx ctx;
sha256_init(&ctx);
sha256_update(&ctx, message, len);
for (i = 0; i < 8; i++)
UNPACK32(ctx.h[i], &digest[i << 2]);
}
char *set_avalon8_fan(char *arg)
{
int val1, val2, ret;
ret = sscanf(arg, "%d-%d", &val1, &val2);
if (ret < 1)
return "No value passed to avalon8-fan";
if (ret == 1)
val2 = val1;
if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
return "Invalid value passed to avalon8-fan";
opt_avalon8_fan_min = val1;
opt_avalon8_fan_max = val2;
return NULL;
}
char *set_avalon8_freq(char *arg)
{
int val[AVA8_DEFAULT_PLL_CNT];
char *colon, *data;
int i;
if (!(*arg))
return NULL;
data = arg;
memset(val, 0, sizeof(val));
for (i = 0; i < AVA8_DEFAULT_PLL_CNT; i++) {
colon = strchr(data, ':');
if (colon)
*(colon++) = '\0';
else {
/* last value */
if (*data) {
val[i] = atoi(data);
if (val[i] > AVA8_DEFAULT_FREQUENCY_MAX)
return "Invalid value passed to avalon8-freq";
}
break;
}
if (*data) {
val[i] = atoi(data);
if (val[i] > AVA8_DEFAULT_FREQUENCY_MAX)
return "Invalid value passed to avalon8-freq";
}
data = colon;
}
for (i = 0; i < AVA8_DEFAULT_PLL_CNT; i++)
opt_avalon8_freq[i] = val[i];
return NULL;
}
char *set_avalon8_voltage_level(char *arg)
{
int val, ret;
ret = sscanf(arg, "%d", &val);
if (ret < 1)
return "No value passed to avalon8-voltage-level";
if (val < AVA8_DEFAULT_VOLTAGE_LEVEL_MIN || val > AVA8_DEFAULT_VOLTAGE_LEVEL_MAX)
return "Invalid value passed to avalon8-voltage-level";
opt_avalon8_voltage_level = val;
return NULL;
}
char *set_avalon8_voltage_level_offset(char *arg)
{
int val, ret;
ret = sscanf(arg, "%d", &val);
if (ret < 1)
return "No value passed to avalon8-voltage-level-offset";
if (val < AVA8_DEFAULT_VOLTAGE_LEVEL_OFFSET_MIN || val > AVA8_DEFAULT_VOLTAGE_LEVEL_OFFSET_MAX)
return "Invalid value passed to avalon8-voltage-level-offset";
opt_avalon8_voltage_level_offset = val;
return NULL;
}
char *set_avalon8_asic_otp(char *arg)
{
int val, ret;
ret = sscanf(arg, "%d", &val);
if (ret < 1)
return "No value passed to avalon8-cinfo-asic";
if (val < 0 || val > (AVA8_DEFAULT_ASIC_MAX - 1))
return "Invalid value passed to avalon8-cinfo-asic";
opt_avalon8_asic_otp = val;
opt_avalon8_cycle_hit_flag = 0;
return NULL;
}
static int avalon8_init_pkg(struct avalon8_pkg *pkg, uint8_t type, uint8_t idx, uint8_t cnt)
{
unsigned short crc;
pkg->head[0] = AVA8_H1;
pkg->head[1] = AVA8_H2;
pkg->type = type;
pkg->opt = 0;
pkg->idx = idx;
pkg->cnt = cnt;
crc = crc16(pkg->data, AVA8_P_DATA_LEN);
pkg->crc[0] = (crc & 0xff00) >> 8;
pkg->crc[1] = crc & 0xff;
return 0;
}
static int job_idcmp(uint8_t *job_id, char *pool_job_id)
{
int job_id_len;
unsigned short crc, crc_expect;
if (!pool_job_id)
return 1;
job_id_len = strlen(pool_job_id);
crc_expect = crc16((unsigned char *)pool_job_id, job_id_len);
crc = job_id[0] << 8 | job_id[1];
if (crc_expect == crc)
return 0;
applog(LOG_DEBUG, "avalon8: job_id doesn't match! [%04x:%04x (%s)]",
crc, crc_expect, pool_job_id);
return 1;
}
static inline int get_temp_max(struct avalon8_info *info, int addr)
{
int i, j;
int max = -273;
for (i = 0; i < info->miner_count[addr]; i++) {
for (j = 0; j < info->asic_count[addr]; j++) {
if (info->temp[addr][i][j] > max)
max = info->temp[addr][i][j];
}
}
if (max < info->temp_mm[addr])
max = info->temp_mm[addr];
return max;
}
/*
* Incremental PID controller
*
* controller input: u, output: t
*
* delta_u = P * [e(k) - e(k-1)] + I * e(k) + D * [e(k) - 2*e(k-1) + e(k-2)];
* e(k) = t(k) - t[target];
* u(k) = u(k-1) + delta_u;
*
*/
static inline uint32_t adjust_fan(struct avalon8_info *info, int id)
{
int t;
double delta_u;
double delta_p, delta_i, delta_d;
uint32_t pwm;
t = get_temp_max(info, id);
/* update target error */
info->pid_e[id][2] = info->pid_e[id][1];
info->pid_e[id][1] = info->pid_e[id][0];
info->pid_e[id][0] = t - info->temp_target[id];
if (t > AVA8_DEFAULT_PID_TEMP_MAX) {
info->pid_u[id] = opt_avalon8_fan_max;
} else if (t < AVA8_DEFAULT_PID_TEMP_MIN) {
info->pid_u[id] = opt_avalon8_fan_min;
} else if (!info->pid_0[id]) {
/* first, init u as t */
info->pid_0[id] = 1;
info->pid_u[id] = t;
} else {
delta_p = info->pid_p[id] * (info->pid_e[id][0] - info->pid_e[id][1]);
delta_i = info->pid_i[id] * info->pid_e[id][0];
delta_d = info->pid_d[id] * (info->pid_e[id][0] - 2 * info->pid_e[id][1] + info->pid_e[id][2]);
/*Parameter I is int type(1, 2, 3...), but should be used as a smaller value (such as 0.1, 0.01...)*/
delta_u = delta_p + delta_i / 100 + delta_d;
info->pid_u[id] += delta_u;
}
if(info->pid_u[id] > opt_avalon8_fan_max)
info->pid_u[id] = opt_avalon8_fan_max;
if (info->pid_u[id] < opt_avalon8_fan_min)
info->pid_u[id] = opt_avalon8_fan_min;
/* Round from float to int */
info->fan_pct[id] = (int)(info->pid_u[id] + 0.5);
pwm = get_fan_pwm(info->fan_pct[id]);
return pwm;
}
static int decode_pkg(struct cgpu_info *avalon8, struct avalon8_ret *ar, int modular_id)
{
struct avalon8_info *info = avalon8->device_data;
struct pool *pool, *real_pool;
struct pool *pool_stratum0 = &info->pool0;
struct pool *pool_stratum1 = &info->pool1;
struct pool *pool_stratum2 = &info->pool2;
struct thr_info *thr = NULL;
unsigned short expected_crc;
unsigned short actual_crc;
uint32_t nonce, nonce2, ntime, miner, chip_id, tmp;
uint8_t job_id[2];
int pool_no;
uint32_t i;
int64_t last_diff1;
uint16_t vin;
uint32_t asic_id,miner_id;
if (likely(avalon8->thr))
thr = avalon8->thr[0];
if (ar->head[0] != AVA8_H1 && ar->head[1] != AVA8_H2) {
applog(LOG_DEBUG, "%s-%d-%d: H1 %02x, H2 %02x",
avalon8->drv->name, avalon8->device_id, modular_id,
ar->head[0], ar->head[1]);
hexdump(ar->data, 32);
return 1;
}
expected_crc = crc16(ar->data, AVA8_P_DATA_LEN);
actual_crc = ((ar->crc[0] & 0xff) << 8) | (ar->crc[1] & 0xff);
if (expected_crc != actual_crc) {
applog(LOG_DEBUG, "%s-%d-%d: %02x: expected crc(%04x), actual_crc(%04x)",
avalon8->drv->name, avalon8->device_id, modular_id,
ar->type, expected_crc, actual_crc);
return 1;
}
switch(ar->type) {
case AVA8_P_NONCE:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_NONCE", avalon8->drv->name, avalon8->device_id, modular_id);
memcpy(&miner, ar->data + 0, 4);
memcpy(&nonce2, ar->data + 4, 4);
memcpy(&ntime, ar->data + 8, 4);
memcpy(&nonce, ar->data + 12, 4);
job_id[0] = ar->data[16];
job_id[1] = ar->data[17];
pool_no = (ar->data[18] | (ar->data[19] << 8));
miner = be32toh(miner);
chip_id = (miner >> 16) & 0xffff;
miner &= 0xffff;
ntime = be32toh(ntime);
if (miner >= info->miner_count[modular_id] ||
pool_no >= total_pools || pool_no < 0) {
applog(LOG_DEBUG, "%s-%d-%d: Wrong miner/pool_no %d/%d",
avalon8->drv->name, avalon8->device_id, modular_id,
miner, pool_no);
break;
}
nonce2 = be32toh(nonce2);
nonce = be32toh(nonce);
if (ntime > info->max_ntime)
info->max_ntime = ntime;
applog(LOG_NOTICE, "%s-%d-%d: Found! P:%d - N2:%08x N:%08x NR:%d/%d [M:%d, A:%d, C:%d - MW: (%"PRIu64",%"PRIu64",%"PRIu64",%"PRIu64")]",
avalon8->drv->name, avalon8->device_id, modular_id,
pool_no, nonce2, nonce, ntime, info->max_ntime,
miner, chip_id, nonce & 0x7f,
info->chip_matching_work[modular_id][miner][0],
info->chip_matching_work[modular_id][miner][1],
info->chip_matching_work[modular_id][miner][2],
info->chip_matching_work[modular_id][miner][3]);
real_pool = pool = pools[pool_no];
if (job_idcmp(job_id, pool->swork.job_id)) {
if (!job_idcmp(job_id, pool_stratum0->swork.job_id)) {
applog(LOG_DEBUG, "%s-%d-%d: Match to previous stratum0! (%s)",
avalon8->drv->name, avalon8->device_id, modular_id,
pool_stratum0->swork.job_id);
pool = pool_stratum0;
} else if (!job_idcmp(job_id, pool_stratum1->swork.job_id)) {
applog(LOG_DEBUG, "%s-%d-%d: Match to previous stratum1! (%s)",
avalon8->drv->name, avalon8->device_id, modular_id,
pool_stratum1->swork.job_id);
pool = pool_stratum1;
} else if (!job_idcmp(job_id, pool_stratum2->swork.job_id)) {
applog(LOG_DEBUG, "%s-%d-%d: Match to previous stratum2! (%s)",
avalon8->drv->name, avalon8->device_id, modular_id,
pool_stratum2->swork.job_id);
pool = pool_stratum2;
} else {
applog(LOG_ERR, "%s-%d-%d: Cannot match to any stratum! (%s)",
avalon8->drv->name, avalon8->device_id, modular_id,
pool->swork.job_id);
if (likely(thr))
inc_hw_errors(thr);
info->hw_works_i[modular_id][miner]++;
break;
}
}
/* Can happen during init sequence before add_cgpu */
if (unlikely(!thr))
break;
last_diff1 = avalon8->diff1;
if (!submit_nonce2_nonce(thr, pool, real_pool, nonce2, nonce, ntime))
info->hw_works_i[modular_id][miner]++;
else {
info->diff1[modular_id] += (avalon8->diff1 - last_diff1);
info->chip_matching_work[modular_id][miner][chip_id]++;
}
break;
case AVA8_P_STATUS:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS", avalon8->drv->name, avalon8->device_id, modular_id);
hexdump(ar->data, 32);
memcpy(&tmp, ar->data, 4);
tmp = be32toh(tmp);
info->temp_mm[modular_id] = tmp;
avalon8->temp = decode_auc_temp(info->auc_sensor);
memcpy(&tmp, ar->data + 4, 4);
tmp = be32toh(tmp);
info->fan_cpm[modular_id] = tmp;
memcpy(&tmp, ar->data + 8, 4);
info->local_works_i[modular_id][ar->idx] += be32toh(tmp);
memcpy(&tmp, ar->data + 12, 4);
info->hw_works_i[modular_id][ar->idx] += be32toh(tmp);
memcpy(&tmp, ar->data + 16, 4);
info->error_code[modular_id][ar->idx] = be32toh(tmp);
memcpy(&tmp, ar->data + 20, 4);
info->error_code[modular_id][ar->cnt] = be32toh(tmp);
memcpy(&tmp, ar->data + 24, 4);
info->error_crc[modular_id][ar->idx] += be32toh(tmp);
break;
case AVA8_P_STATUS_PMU:
/* TODO: decode ntc led from PMU */
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_PMU", avalon8->drv->name, avalon8->device_id, modular_id);
info->power_good[modular_id] = ar->data[16];
for (i = 0; i < AVA8_DEFAULT_PMU_CNT; i++) {
memcpy(&info->pmu_version[modular_id][i], ar->data + 24 + (i * 4), 4);
info->pmu_version[modular_id][i][4] = '\0';
}
for (i = 0; i < info->miner_count[modular_id]; i++) {
memcpy(&vin, ar->data + 8 + i * 2, 2);
info->get_vin[modular_id][i] = decode_vin(info, modular_id, be16toh(vin));
}
break;
case AVA8_P_STATUS_OTP:
if (opt_avalon8_cycle_hit_flag)
break;
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_OTP", avalon8->drv->name, avalon8->device_id, modular_id);
/* ASIC reading cycle limit hit */
if (ar->data[AVA8_OTP_INDEX_CYCLE_HIT]) {
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_OTP, OTP read cycle hit!", avalon8->drv->name, avalon8->device_id, modular_id);
opt_avalon8_cycle_hit_flag = 1;
break;
}
miner_id = ar->idx;
if (miner_id > AVA8_DEFAULT_MINER_CNT)
break;
/* the reading step on MM side, 0:byte 3-0, 1:byte 7-4, 2:byte 11-8, 3:byte 15-12 */
switch (ar->data[AVA8_OTP_INDEX_READ_STEP]) {
case 0:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTIDCRC_OFFSET, ar->data + AVA8_OTP_INFO_LOTIDCRC_OFFSET, 4);
break;
case 1:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTIDCRC_OFFSET + 4, ar->data + AVA8_OTP_INFO_LOTIDCRC_OFFSET + 4, 2);
break;
case 2:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTID_OFFSET, ar->data + AVA8_OTP_INFO_LOTID_OFFSET, 4);
break;
case 3:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTID_OFFSET + 4, ar->data + AVA8_OTP_INFO_LOTID_OFFSET + 4, 4);
break;
case 4:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTID_OFFSET + 8, ar->data + AVA8_OTP_INFO_LOTID_OFFSET + 8, 4);
break;
case 5:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTID_OFFSET + 12, ar->data + AVA8_OTP_INFO_LOTID_OFFSET + 12, 4);
break;
case 6:
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INFO_LOTID_OFFSET + 16, ar->data + AVA8_OTP_INFO_LOTID_OFFSET + 16, 4);
break;
default:
break;
}
/* get the data behind AVA8_OTP_INDEX_READ_STEP for later displaying use */
memcpy(info->otp_info[modular_id][miner_id] + AVA8_OTP_INDEX_READ_STEP, ar->data + AVA8_OTP_INDEX_READ_STEP, 4);
break;
case AVA8_P_STATUS_VOLT:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_VOLT", avalon8->drv->name, avalon8->device_id, modular_id);
for (i = 0; i < info->miner_count[modular_id]; i++) {
memcpy(&tmp, ar->data + i * 4, 4);
info->get_voltage[modular_id][i] = decode_voltage(info, modular_id, be32toh(tmp));
}
break;
case AVA8_P_STATUS_PLL:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_PLL", avalon8->drv->name, avalon8->device_id, modular_id);
for (i = 0; i < AVA8_DEFAULT_PLL_CNT; i++) {
memcpy(&tmp, ar->data + i * 4, 4);
info->get_pll[modular_id][ar->idx][i] = be32toh(tmp);
memcpy(&tmp, ar->data + AVA8_DEFAULT_PLL_CNT * 4 + i * 4, 4);
tmp = be32toh(tmp);
if (tmp)
info->set_frequency[modular_id][ar->idx][i] = tmp;
}
break;
case AVA8_P_STATUS_PVT:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_PVT", avalon8->drv->name, avalon8->device_id, modular_id);
if (!strncmp((char *)&(info->mm_version[modular_id]), "851", 3)) {
if (!info->asic_count[modular_id])
break;
if (ar->idx < info->asic_count[modular_id]) {
for (i = 0; i < info->miner_count[modular_id]; i++) {
memcpy(&tmp, ar->data + i * 4, 2);
tmp = be16toh(tmp);
info->temp[modular_id][i][ar->idx] = decode_pvt_temp(tmp);
memcpy(&tmp, ar->data + i * 4 + 2, 2);
tmp = be16toh(tmp);
info->core_volt[modular_id][i][ar->idx][0] = decode_pvt_volt(tmp);
}
}
} else {
uint16_t pvt_tmp;
if (!info->asic_count[modular_id])
break;
miner = ar->idx / info->asic_count[modular_id];
chip_id = ar->idx % info->asic_count[modular_id];
memcpy(&pvt_tmp, ar->data, 2);
pvt_tmp = be16toh(pvt_tmp);
info->temp[modular_id][miner][chip_id] = decode_pvt_temp(pvt_tmp);
for (i = 0; i < AVA8_DEFAULT_CORE_VOLT_CNT; i++) {
memcpy(&pvt_tmp, ar->data + 2 + 2 * i, 2);
pvt_tmp = be16toh(pvt_tmp);
info->core_volt[modular_id][miner][chip_id][i] = decode_pvt_volt(pvt_tmp);
}
}
break;
case AVA8_P_STATUS_ASIC:
{
int miner_id;
int asic_id;
uint16_t freq;
if (!info->asic_count[modular_id])
break;
miner_id = ar->idx / info->asic_count[modular_id];
asic_id = ar->idx % info->asic_count[modular_id];
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_ASIC %d-%d",
avalon8->drv->name, avalon8->device_id, modular_id,
miner_id, asic_id);
memcpy(&tmp, ar->data + 0, 4);
if (tmp)
info->get_asic[modular_id][miner_id][asic_id][0] = be32toh(tmp);
memcpy(&tmp, ar->data + 4, 4);
if (tmp)
info->get_asic[modular_id][miner_id][asic_id][1] = be32toh(tmp);
for (i = 0; i < AVA8_DEFAULT_PLL_CNT; i++)
info->get_asic[modular_id][miner_id][asic_id][2 + i] = ar->data[8 + i];
if (!strncmp((char *)&(info->mm_version[modular_id]), "851", 3)) {
for (i = 0; i < AVA8_DEFAULT_PLL_CNT; i++) {
memcpy(&freq, ar->data + 8 + AVA8_DEFAULT_PLL_CNT + i * 2, 2);
info->get_frequency[modular_id][miner_id][asic_id][i] = be16toh(freq);
}
}
}
break;
case AVA8_P_STATUS_FAC:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_FAC", avalon8->drv->name, avalon8->device_id, modular_id);
info->factory_info[0] = ar->data[0];
break;
case AVA8_P_STATUS_OC:
applog(LOG_DEBUG, "%s-%d-%d: AVA8_P_STATUS_OC", avalon8->drv->name, avalon8->device_id, modular_id);
info->overclocking_info[0] = ar->data[0];
break;
default:
applog(LOG_DEBUG, "%s-%d-%d: Unknown response %x", avalon8->drv->name, avalon8->device_id, modular_id, ar->type);
break;
}
return 0;
}
/*
# IIC packet format: length[1]+transId[1]+sesId[1]+req[1]+data[60]
# length: 4+len(data)
# transId: 0
# sesId: 0
# req: checkout the header file
# data:
# INIT: clock_rate[4] + reserved[4] + payload[52]
# XFER: txSz[1]+rxSz[1]+options[1]+slaveAddr[1] + payload[56]
*/
static int avalon8_auc_init_pkg(uint8_t *iic_pkg, struct avalon8_iic_info *iic_info, uint8_t *buf, int wlen, int rlen)
{
memset(iic_pkg, 0, AVA8_AUC_P_SIZE);
switch (iic_info->iic_op) {
case AVA8_IIC_INIT:
iic_pkg[0] = 12; /* 4 bytes IIC header + 4 bytes speed + 4 bytes xfer delay */
iic_pkg[3] = AVA8_IIC_INIT;
iic_pkg[4] = iic_info->iic_param.aucParam[0] & 0xff;
iic_pkg[5] = (iic_info->iic_param.aucParam[0] >> 8) & 0xff;
iic_pkg[6] = (iic_info->iic_param.aucParam[0] >> 16) & 0xff;
iic_pkg[7] = iic_info->iic_param.aucParam[0] >> 24;
iic_pkg[8] = iic_info->iic_param.aucParam[1] & 0xff;
iic_pkg[9] = (iic_info->iic_param.aucParam[1] >> 8) & 0xff;
iic_pkg[10] = (iic_info->iic_param.aucParam[1] >> 16) & 0xff;
iic_pkg[11] = iic_info->iic_param.aucParam[1] >> 24;
break;
case AVA8_IIC_XFER:
iic_pkg[0] = 8 + wlen;
iic_pkg[3] = AVA8_IIC_XFER;
iic_pkg[4] = wlen;
iic_pkg[5] = rlen;
iic_pkg[7] = iic_info->iic_param.slave_addr;
if (buf && wlen)
memcpy(iic_pkg + 8, buf, wlen);
break;
case AVA8_IIC_RESET:
case AVA8_IIC_DEINIT:
case AVA8_IIC_INFO:
iic_pkg[0] = 4;
iic_pkg[3] = iic_info->iic_op;
break;
default:
break;
}
return 0;
}
static int avalon8_iic_xfer(struct cgpu_info *avalon8, uint8_t slave_addr,
uint8_t *wbuf, int wlen,
uint8_t *rbuf, int rlen)
{
struct avalon8_info *info = avalon8->device_data;
struct i2c_ctx *pctx = NULL;
int err = 1;
bool ret = false;
pctx = info->i2c_slaves[slave_addr];
if (!pctx) {
applog(LOG_ERR, "%s-%d: IIC xfer i2c slaves null!", avalon8->drv->name, avalon8->device_id);
goto out;
}
if (wbuf) {
ret = pctx->write_raw(pctx, wbuf, wlen);
if (!ret) {
applog(LOG_DEBUG, "%s-%d: IIC xfer write raw failed!", avalon8->drv->name, avalon8->device_id);
goto out;
}
}
cgsleep_ms(5);
if (rbuf) {
ret = pctx->read_raw(pctx, rbuf, rlen);
if (!ret) {
applog(LOG_DEBUG, "%s-%d: IIC xfer read raw failed!", avalon8->drv->name, avalon8->device_id);
hexdump(rbuf, rlen);
goto out;
}
}
return 0;
out:
return err;
}
static int avalon8_auc_xfer(struct cgpu_info *avalon8,
uint8_t *wbuf, int wlen, int *write,
uint8_t *rbuf, int rlen, int *read)
{
int err = -1;
if (unlikely(avalon8->usbinfo.nodev))
goto out;
usb_buffer_clear(avalon8);
err = usb_write(avalon8, (char *)wbuf, wlen, write, C_AVA8_WRITE);
if (err || *write != wlen) {
applog(LOG_DEBUG, "%s-%d: AUC xfer %d, w(%d-%d)!", avalon8->drv->name, avalon8->device_id, err, wlen, *write);
usb_nodev(avalon8);
goto out;
}
cgsleep_ms(opt_avalon8_aucxdelay / 4800 + 1);
rlen += 4; /* Add 4 bytes IIC header */
err = usb_read(avalon8, (char *)rbuf, rlen, read, C_AVA8_READ);
if (err || *read != rlen || *read != rbuf[0]) {
applog(LOG_DEBUG, "%s-%d: AUC xfer %d, r(%d-%d-%d)!", avalon8->drv->name, avalon8->device_id, err, rlen - 4, *read, rbuf[0]);
hexdump(rbuf, rlen);
return -1;
}
*read = rbuf[0] - 4; /* Remove 4 bytes IIC header */
out:
return err;
}
static int avalon8_auc_init(struct cgpu_info *avalon8, char *ver)
{
struct avalon8_iic_info iic_info;
int err, wlen, rlen;
uint8_t wbuf[AVA8_AUC_P_SIZE];
uint8_t rbuf[AVA8_AUC_P_SIZE];
if (unlikely(avalon8->usbinfo.nodev))
return 1;
/* Try to clean the AUC buffer */
usb_buffer_clear(avalon8);
err = usb_read(avalon8, (char *)rbuf, AVA8_AUC_P_SIZE, &rlen, C_AVA8_READ);
applog(LOG_DEBUG, "%s-%d: AUC usb_read %d, %d!", avalon8->drv->name, avalon8->device_id, err, rlen);
hexdump(rbuf, AVA8_AUC_P_SIZE);
/* Reset */
iic_info.iic_op = AVA8_IIC_RESET;
rlen = 0;
avalon8_auc_init_pkg(wbuf, &iic_info, NULL, 0, rlen);
memset(rbuf, 0, AVA8_AUC_P_SIZE);
err = avalon8_auc_xfer(avalon8, wbuf, AVA8_AUC_P_SIZE, &wlen, rbuf, rlen, &rlen);
if (err) {
applog(LOG_ERR, "%s-%d: Failed to reset Avalon USB2IIC Converter", avalon8->drv->name, avalon8->device_id);
return 1;
}
/* Deinit */
iic_info.iic_op = AVA8_IIC_DEINIT;
rlen = 0;
avalon8_auc_init_pkg(wbuf, &iic_info, NULL, 0, rlen);
memset(rbuf, 0, AVA8_AUC_P_SIZE);
err = avalon8_auc_xfer(avalon8, wbuf, AVA8_AUC_P_SIZE, &wlen, rbuf, rlen, &rlen);
if (err) {
applog(LOG_ERR, "%s-%d: Failed to deinit Avalon USB2IIC Converter", avalon8->drv->name, avalon8->device_id);
return 1;
}
/* Init */
iic_info.iic_op = AVA8_IIC_INIT;
iic_info.iic_param.aucParam[0] = opt_avalon8_aucspeed;
iic_info.iic_param.aucParam[1] = opt_avalon8_aucxdelay;
rlen = AVA8_AUC_VER_LEN;
avalon8_auc_init_pkg(wbuf, &iic_info, NULL, 0, rlen);
memset(rbuf, 0, AVA8_AUC_P_SIZE);
err = avalon8_auc_xfer(avalon8, wbuf, AVA8_AUC_P_SIZE, &wlen, rbuf, rlen, &rlen);
if (err) {
applog(LOG_ERR, "%s-%d: Failed to init Avalon USB2IIC Converter", avalon8->drv->name, avalon8->device_id);
return 1;
}
hexdump(rbuf, AVA8_AUC_P_SIZE);
memcpy(ver, rbuf + 4, AVA8_AUC_VER_LEN);