diff --git a/src/decoder.rs b/src/decoder.rs
index 63bd9bfb..e24b2d60 100644
--- a/src/decoder.rs
+++ b/src/decoder.rs
@@ -7,8 +7,6 @@ const OPCODE_MASK: usize = 0b1111111;
 /// A RISC-V instruction.
 #[derive(Debug, PartialEq, Eq, Clone)]
 pub enum Instr {
-    Ecall,
-    Ebreak,
     Wfi,
     /// CSR Read/Write
     Csrrw {
@@ -112,8 +110,6 @@ impl MiralisContext {
         let func7 = (raw >> 25) & 0b1111111;
         if func3 == 0b000 {
             return match imm {
-                0b000000000000 => Instr::Ecall,
-                0b000000000001 => Instr::Ebreak,
                 0b000100000101 => Instr::Wfi,
                 0b001100000010 => Instr::Mret,
                 0b000100000010 => Instr::Sret,
@@ -876,10 +872,6 @@ mod tests {
     #[test]
     fn system_instructions() {
         let mctx = MiralisContext::new(unsafe { Arch::detect_hardware() }, 0x100000, 0x2000);
-        // ECALL: Environment call.
-        assert_eq!(mctx.decode_system(0x00000073), Instr::Ecall);
-        // EBREAK: Environment break.
-        assert_eq!(mctx.decode_system(0x00100073), Instr::Ebreak);
         // MRET: Return from machine mode.
         assert_eq!(mctx.decode_system(0x30200073), Instr::Mret);
         // SRET: Return from supervisor mode.