@@ -320,6 +320,65 @@ typedef enum opcode_e
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OP_STOREF_F , //1 fpu element...
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OP_STOREF_S , //1 string reference
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OP_STOREF_I , //1 non-string reference/int
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+
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+ //fteqw r5744+
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+ OP_STOREP_B ,//((char*)b)[(int)c] = (int)a
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+ OP_LOADP_B , //(int)c = *(char*)
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+
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+ //fteqw r5768+
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+ //opcodes for 32bit uints
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+ OP_LE_U , //aka GT
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+ OP_LT_U , //aka GE
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+ OP_DIV_U , //don't need mul+add+sub
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+ OP_RSHIFT_U , //lshift is the same for signed+unsigned
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+
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+ //opcodes for 64bit ints
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+ OP_ADD_I64 ,
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+ OP_SUB_I64 ,
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+ OP_MUL_I64 ,
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+ OP_DIV_I64 ,
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+ OP_BITAND_I64 ,
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+ OP_BITOR_I64 ,
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+ OP_BITXOR_I64 ,
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+ OP_LSHIFT_I64I ,
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+ OP_RSHIFT_I64I ,
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+ OP_LE_I64 , //aka GT
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+ OP_LT_I64 , //aka GE
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+ OP_EQ_I64 ,
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+ OP_NE_I64 ,
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+ //extra opcodes for 64bit uints
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+ OP_LE_U64 , //aka GT
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+ OP_LT_U64 , //aka GE
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+ OP_DIV_U64 ,
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+ OP_RSHIFT_U64I ,
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+
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+ //general 64bitness
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+ OP_STORE_I64 ,
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+ OP_STOREP_I64 ,
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+ OP_STOREF_I64 ,
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+ OP_LOAD_I64 ,
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+ OP_LOADA_I64 ,
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+ OP_LOADP_I64 ,
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+ //various conversions for our 64bit types (yay type promotion)
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+ OP_CONV_UI64 , //zero extend
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+ OP_CONV_II64 , //sign extend
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+ OP_CONV_I64I , //truncate
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+ OP_CONV_FD , //extension
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+ OP_CONV_DF , //truncation
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+ OP_CONV_I64F , //logically a promotion (always signed)
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+ OP_CONV_FI64 , //demotion (always signed)
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+ OP_CONV_I64D , //'promotion' (always signed)
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+ OP_CONV_DI64 , //demotion (always signed)
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+
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+ //opcodes for doubles.
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+ OP_ADD_D ,
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+ OP_SUB_D ,
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+ OP_MUL_D ,
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+ OP_DIV_D ,
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+ OP_LE_D ,
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+ OP_LT_D ,
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+ OP_EQ_D ,
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+ OP_NE_D ,
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}
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opcode_t ;
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