ADPLL_5_3.map.smsg

Warning (10268): Verilog HDL information at User_Input.v(61): always construct contains both blocking and non-blocking assignments File: C:/Users/pjspi/Downloads/ADPLL_7_4/ADPLL_7_4/ADPLL_7_3/ADPLL5_7/ADPLL_5_4/User_Input.v Line: 61
Warning (10268): Verilog HDL information at Divider.sv(14): always construct contains both blocking and non-blocking assignments File: C:/Users/pjspi/Downloads/ADPLL_7_4/ADPLL_7_4/ADPLL_7_3/ADPLL5_7/ADPLL_5_4/Divider.sv Line: 14