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lines changed Original file line number Diff line number Diff line change @@ -102,6 +102,25 @@ void source_block_ctrl_base::configure_flow_control_out(const bool enable_fc_out
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% buf_size_bytes % unique_id ()));
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}
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+ // Disable flow control entirely and let all upstream data flush out
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+ // We need to do this every time the window is changed because
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+ // a) We don't know what state the flow-control module was left in
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+ // in the previous run (it should still be enabled)
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+ // b) Changing the window size where data is buffered upstream may
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+ // result in stale packets entering the stream.
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+ sr_write (SR_FLOW_CTRL_EN, 0 , block_port);
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+
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+ // Wait for data to flush out.
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+ // In the FPGA we are guaranteed that all buffered packets are more-or-less
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+ // consecutive. 1ms@200MHz = 200,000 cycles of "flush time". 200k cycles = 200k * 8
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+ // bytes (64 bits) = 1.6MB of data that can be flushed. Typically in the FPGA we have
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+ // buffering in the order of kilobytes so waiting for 1MB to flush is more than enough
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+ // time.
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+ // TODO: Enhancement. We should get feedback from the FPGA about when the
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+ // source_flow_control
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+ // module is done flushing.
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+ std::this_thread::sleep_for (std::chrono::milliseconds (1 ));
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+
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// Enable source flow control module and conditionally enable byte based and/or packet
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// count based flow control
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const bool enable_byte_fc = (buf_size_bytes != 0 );
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