@@ -117,6 +117,10 @@ struct HardwareStageMetadata
117117 uint32 perfDataBufferSize;
118118 // / Number of VGPRs used.
119119 uint32 vgprCount;
120+ #if PAL_BUILD_GFX12
121+ // / Number of dynamic vgprs that need to be saved.
122+ uint32 dynamicVgprSavedCount;
123+ #endif
120124
121125 // / Number of SGPRs used.
122126 uint32 sgprCount;
@@ -125,6 +129,11 @@ struct HardwareStageMetadata
125129 uint32 vgprLimit;
126130 // / SGPR count upper limit (only set if different from HW default).
127131 uint32 sgprLimit;
132+ #if PAL_BUILD_GFX12
133+ // / Number of live VPGRs leaving the shader. Reports n+1 if V_N is the highest live outgoing VGPR. In dynamic VGPR
134+ // / mode, the pipeline-wide maximum of these values is used to lower bound dVGPR allocations in the pipeline.
135+ uint32 outgoingVgprCount;
136+ #endif
128137
129138 // / Thread-group X/Y/Z dimensions (Compute only).
130139 uint32 threadgroupDimensions[3 ];
@@ -190,7 +199,12 @@ struct HardwareStageMetadata
190199 uint16 usesAppendConsume : 1 ;
191200 // / The shader uses PrimID.
192201 uint16 usesPrimId : 1 ;
202+ #if PAL_BUILD_GFX12
203+ // / The shader uses round-robin scheduling for waves in a workgroup.
204+ uint16 wgRoundRobin : 1 ;
205+ #else
193206 uint16 placeholder0 : 1 ;
207+ #endif
194208 };
195209 uint16 uAll;
196210 } flags;
@@ -211,11 +225,19 @@ struct HardwareStageMetadata
211225 uint64 ldsSize : 1 ;
212226 uint64 perfDataBufferSize : 1 ;
213227 uint64 vgprCount : 1 ;
228+ #if PAL_BUILD_GFX12
229+ uint64 dynamicVgprSavedCount : 1 ;
230+ #else
214231 uint64 placeholder1 : 1 ;
232+ #endif
215233 uint64 sgprCount : 1 ;
216234 uint64 vgprLimit : 1 ;
217235 uint64 sgprLimit : 1 ;
236+ #if PAL_BUILD_GFX12
237+ uint64 outgoingVgprCount : 1 ;
238+ #else
218239 uint64 placeholder2 : 1 ;
240+ #endif
219241 uint64 threadgroupDimensions : 1 ;
220242 uint64 origThreadgroupDimensions : 1 ;
221243 uint64 cbConstUsage : 1 ;
@@ -244,7 +266,11 @@ struct HardwareStageMetadata
244266 uint64 writesDepth : 1 ;
245267 uint64 usesAppendConsume : 1 ;
246268 uint64 usesPrimId : 1 ;
269+ #if PAL_BUILD_GFX12
270+ uint64 wgRoundRobin : 1 ;
271+ #else
247272 uint64 placeholder3 : 1 ;
273+ #endif
248274 uint64 reserved : 22 ;
249275 };
250276 uint64 uAll;
@@ -1593,6 +1619,27 @@ struct SpiShaderColFormatMetadata
15931619 } hasEntry;
15941620};
15951621
1622+ #if PAL_BUILD_GFX12
1623+ struct SpiShaderGsMeshletCtrlMetadata
1624+ {
1625+ // / Log2 X interleave size.
1626+ uint16 interleaveBitsX;
1627+ // / Log2 Y interleave size.
1628+ uint16 interleaveBitsY;
1629+
1630+ union
1631+ {
1632+ struct
1633+ {
1634+ uint8 interleaveBitsX : 1 ;
1635+ uint8 interleaveBitsY : 1 ;
1636+ uint8 reserved : 6 ;
1637+ };
1638+ uint8 uAll;
1639+ } hasEntry;
1640+ };
1641+ #endif
1642+
15961643// / Abstracted graphics-only register values.
15971644struct GraphicsRegisterMetadata
15981645{
@@ -1692,6 +1739,9 @@ struct GraphicsRegisterMetadata
16921739 // / - 8 - SINT16 ABGR Components
16931740 // / - 9 - Can be FP32 or SINT32/UINT32 ABGR Components
16941741 uint8 spiShaderZFormat;
1742+ #if PAL_BUILD_GFX12
1743+ SpiShaderGsMeshletCtrlMetadata spiShaderGsMeshletCtrl;
1744+ #endif
16951745
16961746 union
16971747 {
@@ -1800,7 +1850,11 @@ struct GraphicsRegisterMetadata
18001850 uint64 spiPsInputAddr : 1 ;
18011851 uint64 spiShaderColFormat : 1 ;
18021852 uint64 spiShaderZFormat : 1 ;
1853+ #if PAL_BUILD_GFX12
1854+ uint64 spiShaderGsMeshletCtrl : 1 ;
1855+ #else
18031856 uint64 placeholder0 : 1 ;
1857+ #endif
18041858 uint64 reserved : 63 ;
18051859 };
18061860 uint64 uAll[2 ];
@@ -1810,6 +1864,15 @@ struct GraphicsRegisterMetadata
18101864// / Abstracted compute-only register values.
18111865struct ComputeRegisterMetadata
18121866{
1867+ #if PAL_BUILD_GFX12
1868+ // / Log2 X interleave size.
1869+ uint32 xInterleave;
1870+ #endif
1871+
1872+ #if PAL_BUILD_GFX12
1873+ // / Log2 Y interleave size.
1874+ uint32 yInterleave;
1875+ #endif
18131876
18141877 // / Specifies how many thread_id_in_group terms to write into VGPR.
18151878 // / 0 = X, 1 = XY, 2 = XYZ
@@ -1827,7 +1890,12 @@ struct ComputeRegisterMetadata
18271890 uint8 tgidZEn : 1 ;
18281891 // / Enables loading of threadgroup related info into SGPR.
18291892 uint8 tgSizeEn : 1 ;
1893+ #if PAL_BUILD_GFX12
1894+ // / Enables dynamic vgpr mode.
1895+ uint8 dynamicVgprEn : 1 ;
1896+ #else
18301897 uint8 placeholder0 : 1 ;
1898+ #endif
18311899 uint8 reserved : 3 ;
18321900 };
18331901 uint8 uAll;
@@ -1841,9 +1909,15 @@ struct ComputeRegisterMetadata
18411909 uint8 tgidYEn : 1 ;
18421910 uint8 tgidZEn : 1 ;
18431911 uint8 tgSizeEn : 1 ;
1912+ #if PAL_BUILD_GFX12
1913+ uint8 dynamicVgprEn : 1 ;
1914+ uint8 xInterleave : 1 ;
1915+ uint8 yInterleave : 1 ;
1916+ #else
18441917 uint8 placeholder0 : 1 ;
18451918 uint8 placeholder1 : 1 ;
18461919 uint8 placeholder2 : 1 ;
1920+ #endif
18471921 uint8 tidigCompCnt : 1 ;
18481922 };
18491923 uint8 uAll;
@@ -2040,6 +2114,17 @@ namespace ComputeRegisterMetadataKey
20402114 static constexpr char TgidYEn[] = " .tgid_y_en" ;
20412115 static constexpr char TgidZEn[] = " .tgid_z_en" ;
20422116 static constexpr char TgSizeEn[] = " .tg_size_en" ;
2117+ #if PAL_BUILD_GFX12
2118+ static constexpr char DynamicVgprEn[] = " .dynamic_vgpr_en" ;
2119+ #endif
2120+
2121+ #if PAL_BUILD_GFX12
2122+ static constexpr char XInterleave[] = " .x_interleave" ;
2123+ #endif
2124+
2125+ #if PAL_BUILD_GFX12
2126+ static constexpr char YInterleave[] = " .y_interleave" ;
2127+ #endif
20432128
20442129 static constexpr char TidigCompCnt[] = " .tidig_comp_cnt" ;
20452130};
@@ -2110,9 +2195,20 @@ namespace GraphicsRegisterMetadataKey
21102195 static constexpr char SpiPsInputAddr[] = " .spi_ps_input_addr" ;
21112196 static constexpr char SpiShaderColFormat[] = " .spi_shader_col_format" ;
21122197 static constexpr char SpiShaderZFormat[] = " .spi_shader_z_format" ;
2198+ #if PAL_BUILD_GFX12
2199+ static constexpr char SpiShaderGsMeshletCtrl[] = " .spi_shader_gs_meshlet_ctrl" ;
2200+ #endif
21132201
21142202};
21152203
2204+ #if PAL_BUILD_GFX12
2205+ namespace SpiShaderGsMeshletCtrlMetadataKey
2206+ {
2207+ static constexpr char InterleaveBitsX[] = " .interleave_bits_x" ;
2208+ static constexpr char InterleaveBitsY[] = " .interleave_bits_y" ;
2209+ };
2210+ #endif
2211+
21162212namespace SpiShaderColFormatMetadataKey
21172213{
21182214 static constexpr char Col_0ExportFormat[] = " .col_0_export_format" ;
@@ -2457,10 +2553,16 @@ namespace HardwareStageMetadataKey
24572553 static constexpr char LdsSize[] = " .lds_size" ;
24582554 static constexpr char PerfDataBufferSize[] = " .perf_data_buffer_size" ;
24592555 static constexpr char VgprCount[] = " .vgpr_count" ;
2556+ #if PAL_BUILD_GFX12
2557+ static constexpr char DynamicVgprSavedCount[] = " .dynamic_vgpr_saved_count" ;
2558+ #endif
24602559
24612560 static constexpr char SgprCount[] = " .sgpr_count" ;
24622561 static constexpr char VgprLimit[] = " .vgpr_limit" ;
24632562 static constexpr char SgprLimit[] = " .sgpr_limit" ;
2563+ #if PAL_BUILD_GFX12
2564+ static constexpr char OutgoingVgprCount[] = " .outgoing_vgpr_count" ;
2565+ #endif
24642566
24652567 static constexpr char ThreadgroupDimensions[] = " .threadgroup_dimensions" ;
24662568 static constexpr char OrigThreadgroupDimensions[] = " .orig_threadgroup_dimensions" ;
@@ -2490,6 +2592,9 @@ namespace HardwareStageMetadataKey
24902592 static constexpr char WritesDepth[] = " .writes_depth" ;
24912593 static constexpr char UsesAppendConsume[] = " .uses_append_consume" ;
24922594 static constexpr char UsesPrimId[] = " .uses_prim_id" ;
2595+ #if PAL_BUILD_GFX12
2596+ static constexpr char WgRoundRobin[] = " .wg_round_robin" ;
2597+ #endif
24932598
24942599};
24952600
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