From 9c13a6d36859c7a16086ba4857d6debd4c34042c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=A0imon=20Tup=C3=BD?= Date: Fri, 2 Feb 2024 18:49:58 +0100 Subject: [PATCH] Fixed a bug that was causing functions with 5 or more parameters to cause a crash. --- source/compiler/test/main.s | 6 ++--- .../transformation/live_range_analysis.cpp | 9 ++++---- .../target/arch/x64/x64.h | 2 +- .../arch/x64/x64_instruction_selection.cpp | 23 +++++++++++++------ tests/functions/7_parameters.s | 4 ++++ tests/functions/7_parameters_expected.txt | 1 + 6 files changed, 30 insertions(+), 15 deletions(-) create mode 100644 tests/functions/7_parameters.s create mode 100644 tests/functions/7_parameters_expected.txt diff --git a/source/compiler/test/main.s b/source/compiler/test/main.s index 0a4cd7ee..2f4aadef 100644 --- a/source/compiler/test/main.s +++ b/source/compiler/test/main.s @@ -10,14 +10,14 @@ // - better messages // - more info related to numerical errors (hex etc) // - add namespaces to messages, whenever applicable (ie. x::y::test) -// - BUGS: -// - set crashes with more than 4(?) parameters // - TESTS: // - add more test cases // - figure out why the array3D test case wasnt working // - convert ir bool types to sigma types correctly for TB stuff // - implicit returns for non-void functions should not be a thing + i32 main() { - a + printf("%d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7); + ret 0; } diff --git a/source/intermediate_representation/codegen/transformation/live_range_analysis.cpp b/source/intermediate_representation/codegen/transformation/live_range_analysis.cpp index d6cbc490..21f7ac9d 100644 --- a/source/intermediate_representation/codegen/transformation/live_range_analysis.cpp +++ b/source/intermediate_representation/codegen/transformation/live_range_analysis.cpp @@ -82,11 +82,12 @@ namespace sigma::ir { const u64 item_base = context.work.items.size(); // add all our nodes into the work list - for (const u64 block_order : context.basic_block_order) { - auto target = context.work.items[block_order]; - context.work.items.push_back(target); + for (u64 i = context.basic_block_order.size(); i-- > 0;) { + const u64 block_order = context.basic_block_order[i]; + auto n = context.work.items[block_order]; + context.work.items.push_back(n); - const auto machine_block = &context.machine_blocks.at(target); + const auto machine_block = &context.machine_blocks.at(n); machine_block->live_in.copy(machine_block->gen); } diff --git a/source/intermediate_representation/target/arch/x64/x64.h b/source/intermediate_representation/target/arch/x64/x64.h index abf37f5b..e9781564 100644 --- a/source/intermediate_representation/target/arch/x64/x64.h +++ b/source/intermediate_representation/target/arch/x64/x64.h @@ -139,7 +139,7 @@ namespace sigma::ir { // other instructions static auto create_r(codegen_context& context, instruction::type type, const data_type& data_type, reg dst) -> handle; - static auto create_mr(codegen_context& context, instruction::type type, const data_type& data_type, reg base, i32 index, memory_scale scale, i32 disp, i32 source) -> handle; + static auto create_mr(codegen_context& context, instruction::type type, const data_type& data_type, reg base, reg index, memory_scale scale, i32 disp, i32 source) -> handle; static auto create_rm(codegen_context& context, instruction::type type, const data_type& data_type, reg destination, reg base, i32 index, memory_scale scale, i32 disp) -> handle; static auto create_rr(codegen_context& context, instruction::type type, const data_type& data_type, reg destination, reg source) -> handle; static auto create_rrd(codegen_context& context, instruction::type type,const data_type& data_type, reg destination, reg source) -> handle; diff --git a/source/intermediate_representation/target/arch/x64/x64_instruction_selection.cpp b/source/intermediate_representation/target/arch/x64/x64_instruction_selection.cpp index cb0dba47..7981fae2 100644 --- a/source/intermediate_representation/target/arch/x64/x64_instruction_selection.cpp +++ b/source/intermediate_representation/target/arch/x64/x64_instruction_selection.cpp @@ -1239,7 +1239,16 @@ namespace sigma::ir { return create_rm(context, instruction::type::LEA, n->dt, dst, base, index, scale, offset); } - return create_mr(context, static_cast(store_op), n->dt, base, index, scale, offset, src); + return create_mr( + context, + static_cast(store_op), + n->dt, + base, + static_cast(index), + scale, + offset, + src + ); } auto x64_architecture::select_array_access_instruction(codegen_context& context, handle n, reg dst, i32 store_op, i32 src) -> handle { @@ -1256,7 +1265,7 @@ namespace sigma::ir { return create_rm(context, instruction::type::LEA, PTR_TYPE, dst, base, -1, memory_scale::x1, 0); } - return create_mr(context, static_cast(store_op), PTR_TYPE, base, -1, memory_scale::x1, 0, src); + return create_mr(context, static_cast(store_op), PTR_TYPE, base, reg::invalid_id, memory_scale::x1, 0, src); } } @@ -1617,16 +1626,16 @@ namespace sigma::ir { return inst; } - auto x64_architecture::create_mr(codegen_context& context, instruction::type type, const data_type& data_type, reg base, i32 index, memory_scale scale, i32 disp, i32 source) -> handle { - const handle inst = create_instruction(context, type, data_type, 0, index >= 0 ? 3 : 2, 0); + auto x64_architecture::create_mr(codegen_context& context, instruction::type type, const data_type& data_type, reg base, reg index, memory_scale scale, i32 disp, i32 source) -> handle { + const handle inst = create_instruction(context, type, data_type, 0, index.is_valid() ? 3 : 2, 0); - inst->flags = instruction::MEM | (index >= 0 ? instruction::INDEXED : instruction::NONE); + inst->flags = instruction::MEM | (index.is_valid() ? instruction::INDEXED : instruction::NONE); inst->memory.index = 0; inst->operands[0] = base.id; - if (index >= 0) { - inst->operands[1] = index; + if (index.is_valid()) { + inst->operands[1] = index.id; inst->operands[2] = source; } else { diff --git a/tests/functions/7_parameters.s b/tests/functions/7_parameters.s new file mode 100644 index 00000000..ee332071 --- /dev/null +++ b/tests/functions/7_parameters.s @@ -0,0 +1,4 @@ +i32 main() { + printf("%d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7); + ret 0; +} diff --git a/tests/functions/7_parameters_expected.txt b/tests/functions/7_parameters_expected.txt new file mode 100644 index 00000000..b4457aae --- /dev/null +++ b/tests/functions/7_parameters_expected.txt @@ -0,0 +1 @@ +1 2 3 4 5 6 7