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README.md

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Essential enviorment requirements:

project_initial

project_initial is a example chisel working project , it has features include(2022-11-23 update)

  • 1.Scala src enviorment for designing

  • 2.Basic simulation and waveform generator feature

  • 3.Veroilog genaration by using Chisel's emit feature

working cmds:

  • make test / make wave : Simulation and waveform generation(VCD)

  • make hdl : verilog source file generation