-
Notifications
You must be signed in to change notification settings - Fork 63
/
smtc_hal_gpio.h
180 lines (158 loc) · 5.73 KB
/
smtc_hal_gpio.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
/*!
* \file smtc_hal_gpio.h
*
* \brief GPIO Hardware Abstraction Layer definition
*
* The Clear BSD License
* Copyright Semtech Corporation 2021. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted (subject to the limitations in the disclaimer
* below) provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the Semtech corporation nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY
* THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL SEMTECH CORPORATION BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __SMTC_HAL_GPIO_H__
#define __SMTC_HAL_GPIO_H__
#ifdef __cplusplus
extern "C" {
#endif
/*
* -----------------------------------------------------------------------------
* --- DEPENDENCIES ------------------------------------------------------------
*/
#include "smtc_hal_gpio_pin_names.h"
/*
* -----------------------------------------------------------------------------
* --- PUBLIC MACROS -----------------------------------------------------------
*/
/*
* -----------------------------------------------------------------------------
* --- PUBLIC CONSTANTS --------------------------------------------------------
*/
/*
* -----------------------------------------------------------------------------
* --- PUBLIC TYPES ------------------------------------------------------------
*/
/*!
* GPIO IRQ data context
*/
typedef struct gpio_irq_s
{
hal_gpio_pin_names_t pin;
void* context;
void ( *callback )( void* context );
} hal_gpio_irq_t;
/*!
* GPIO Pull modes
*/
typedef enum gpio_pull_mode_e
{
BSP_GPIO_PULL_MODE_NONE = 0,
BSP_GPIO_PULL_MODE_UP = 1,
BSP_GPIO_PULL_MODE_DOWN = 2,
} hal_gpio_pull_mode_t;
/*!
* GPIO IRQ modes
*/
typedef enum gpio_irq_mode_e
{
BSP_GPIO_IRQ_MODE_OFF = 0,
BSP_GPIO_IRQ_MODE_RISING = 1,
BSP_GPIO_IRQ_MODE_FALLING = 2,
BSP_GPIO_IRQ_MODE_RISING_FALLING = 3,
} hal_gpio_irq_mode_t;
/*
* -----------------------------------------------------------------------------
* --- PUBLIC FUNCTIONS PROTOTYPES ---------------------------------------------
*/
/*!
* Initializes given pin as output with given initial value
*
* \param [in] pin MCU pin to be initialized
* \param [in] value MCU initial pit state
*
*/
void hal_gpio_init_out( const hal_gpio_pin_names_t pin, const uint32_t value );
/*!
* Initializes given pin as input
*
* \param [in] pin MCU pin to be initialized
* \param [in] pull_mode MCU pin pull mode [BSP_GPIO_PULL_MODE_NONE,
* BSP_GPIO_PULL_MODE_UP,
* BSP_GPIO_PULL_MODE_DOWN]
* \param [in] irq_mode MCU IRQ mode [BSP_GPIO_IRQ_MODE_OFF,
* BSP_GPIO_IRQ_MODE_RISING,
* BSP_GPIO_IRQ_MODE_FALLING,
* BSP_GPIO_IRQ_MODE_RISING_FALLING]
* \param [in/out] irq Pointer to IRQ data context.
* NULL when BSP_GPIO_IRQ_MODE_OFF
* pin parameter is initialized
*/
void hal_gpio_init_in( const hal_gpio_pin_names_t pin, const hal_gpio_pull_mode_t pull_mode,
const hal_gpio_irq_mode_t irq_mode, hal_gpio_irq_t* irq );
/*!
* Attaches given callback to the MCU IRQ handler
*
* \param [in] irq Pointer to IRQ data context
*/
void hal_gpio_irq_attach( const hal_gpio_irq_t* irq );
/*!
* Detattaches callback from the MCU IRQ handler
*
* \param [in] irq Pointer to IRQ data context
*/
void hal_gpio_irq_deatach( const hal_gpio_irq_t* irq );
/*!
* Enables all GPIO MCU interrupts
*/
void hal_gpio_irq_enable( void );
/*!
* Disables all GPIO MCU interrupts
*/
void hal_gpio_irq_disable( void );
/*!
* Sets MCU pin to given value
*
* \param [in] pin MCU pin to be set
* \param [in] value MCU pin state to be set
*/
void hal_gpio_set_value( const hal_gpio_pin_names_t pin, const uint32_t value );
/*!
* Gets MCU pin state value
*
* \param [in] pin MCU pin to be read
*
* \retval value Current MCU pin state
*/
uint32_t hal_gpio_get_value( const hal_gpio_pin_names_t pin );
/*
* Clears a pending irq on a pin
*
* \param [in] pin pin for which pending state is to be cleared
*/
void hal_gpio_clear_pending_irq( const hal_gpio_pin_names_t pin );
#ifdef __cplusplus
}
#endif
#endif // __SMTC_HAL_GPIO_H__
/* --- EOF ------------------------------------------------------------------ */