|
| 1 | +.. SPDX-License-Identifier: Marvell-MIT |
| 2 | + Copyright (c) 2024 Marvell. |
| 3 | +
|
| 4 | +Installing firmware image on target platform |
| 5 | +******************************************** |
| 6 | + |
| 7 | +This document describes the procedure to install firmware image on target platform. |
| 8 | + |
| 9 | +Downloading the firmware image |
| 10 | +============================== |
| 11 | + |
| 12 | +The firmware image can be download from Marvell's website: |
| 13 | + |
| 14 | +`marvell portal <https://www.marvell.com/support/downloads.html>`_. |
| 15 | + |
| 16 | +Select the following options to download the firmware image: |
| 17 | + |
| 18 | +* ``Category``: Infrastructure Processors |
| 19 | +* ``Platform/OS``: Linux |
| 20 | +* ``Part Number``: CN106XX or CN103XX (based on target platform) |
| 21 | + |
| 22 | +.. figure:: ./img/fw_dnld.png |
| 23 | + |
| 24 | +The firmware image is available in the form of an archive file. Extract the archive to get the |
| 25 | +firmware image. |
| 26 | + |
| 27 | +Two types of firmware images are available and both have different ways of loading: |
| 28 | + |
| 29 | +* ``fw-update-<plat>-<version>.bin`` is loaded using bootimgup command, |
| 30 | + eg fw-update-cn10ka-SDK12.24.08.bin |
| 31 | +* ``flash-<plat>-<version>.img`` is loaded using direct flashing to SPI/eMMC device via u-boot |
| 32 | + eg flash-cn10ka-SDK12.24.08.img |
| 33 | + |
| 34 | +commands. |
| 35 | + |
| 36 | +Verifying Boot Source |
| 37 | +===================== |
| 38 | + |
| 39 | +Power on the target platform and observe bootup logs. During the initial booting sequence, |
| 40 | +lookout for prints such as ``SCP: Booting from`` and ``Boot:`` to determine boot source |
| 41 | +``SPI or MMC`` used for flashing the firmware image and to identify the partition image being |
| 42 | +loaded. |
| 43 | + |
| 44 | +From below output, it is clear that the boot source is ``SPI``, it has two partitions as per |
| 45 | +log ``Boot: SPI0_CS0,SPI1_CS0, using SPI0_CS0`` and image has been loaded from primary |
| 46 | +partition as per log ``Booting from SPI0.CS0 (Primary image0)``. |
| 47 | + |
| 48 | +If the boot source was ``MMC``, then the prints would be |
| 49 | +``Boot: EMMC_CS0,EMMC_CS0, using EMMC_CS0`` and ``Booting from EMMC0.CS0 (Primary image0)``. |
| 50 | + |
| 51 | +From the print ``Boot: SPI0_CS0,SPI1_CS0, using SPI0_CS0``, SPI0_CS0 corresponds to bus:cs |
| 52 | +where primary partition is 0:0 and secondary partition is 1:0.i |
| 53 | + |
| 54 | + |
| 55 | +From the output below, it is clear that the boot source is ``SPI``, with two partitions as |
| 56 | +indicated by the log ``Boot: SPI0_CS0,SPI1_CS0, using SPI0_CS0``. The image has been loaded |
| 57 | +from the primary partition, as shown by the log ``Booting from SPI0.CS0 (Primary image0`` |
| 58 | + |
| 59 | +If the boot source was ``MMC``, the logs would display ``Boot: EMMC_CS0,EMMC_CS0, using EMMC_CS0`` |
| 60 | +and ``Booting from EMMC0.CS0 (Primary image0)`` |
| 61 | + |
| 62 | +The log ``Boot: SPI0_CS0,SPI1_CS0, using SPI0_CS0`` indicates that ``SPI0_CS0`` corresponds to |
| 63 | +<bus:cs>, where the primary partition is 0:0 and the secondary partition is 1:0. |
| 64 | + |
| 65 | + |
| 66 | +.. code-block:: console |
| 67 | +
|
| 68 | + SCP: SCP BL1 is Alive! |
| 69 | + SCP: 12.23.11.ge98e933e ge98e933e Wed, 01 Nov 2023 22:46:21 +0000 |
| 70 | + SCP: Detected chip b9, platform 0 |
| 71 | + SCP: Boot security state: new chip |
| 72 | + SCP: RST_LBOOT=0x8: CHIP_SOFT |
| 73 | + SCP: Previous RST_LBOOT=0x8: CHIP_SOFT |
| 74 | + SCP: Number of AP cores present::24 TAD's present::24 |
| 75 | + SCP: Starting Firmware Loading (AP, MCP and ECP) |
| 76 | + SCP: Booting from SPI0.CS0 (Primary image0) |
| 77 | + SCP: SCP BL0 used: 12.5MHz(x1) |
| 78 | + SCP: SCP BL1: xSPI0.CS0 will use 25MHz x4 |
| 79 | + SCP: Enabling CMD extensions, val = 0 |
| 80 | + SCP: Loading ECP BL1... |
| 81 | + SCP: LDR: Invalid TIMH block at offset 0xd0000 |
| 82 | + SCP: image loading failed [3] |
| 83 | + SCP: Trying SPI safe mode |
| 84 | + SCP: SCP BL1: xSPI0.CS0 will use 12.5MHz x1 |
| 85 | + SCP: Re-loading image |
| 86 | + SCP: Loading MCP BL1... |
| 87 | + SCP: Loading AP BL1... |
| 88 | + SCP: copying AP_BL1 to 0 in LLC |
| 89 | + SCP: Starting up AP BL1 |
| 90 | + SCP: Releasing Core0 out of reset |
| 91 | +
|
| 92 | +
|
| 93 | +
|
| 94 | + Marvell CN10K SOC |
| 95 | + PASS: CRC32 verification |
| 96 | + Transferring to thread scheduler |
| 97 | + ======================= |
| 98 | + Marvell CN10k Boot Stub |
| 99 | + ======================= |
| 100 | + Firmware Version: 2023-11-28 13:43:26 |
| 101 | + EBF Version: 11.23.11-5c465a98-dirty, Branch: ebf-release, Built: Tue, 28 Nov 2023 13:42:23 +0000 |
| 102 | +
|
| 103 | + Board Model: crb106-pcie |
| 104 | + Board Revision: r1p1 |
| 105 | + Board Serial: WA-CN106-A1-PCIE-2P100-R2-151 |
| 106 | +
|
| 107 | + Chip: 0xb9 Pass B0 |
| 108 | + SKU: MV-CN10624-B0-AAP |
| 109 | + LLC: 49152 KB |
| 110 | + Boot: SPI0_CS0,SPI1_CS0, using SPI0_CS0 |
| 111 | + AVS: Enabled |
| 112 | +
|
| 113 | +.. note:: |
| 114 | + |
| 115 | + It is highly recommended to preserve the factory image in the secondary partition and always flash |
| 116 | + the primary partition. This allows for a fallback to the default factory image by booting from the |
| 117 | + secondary partition in case of any flashing issues |
| 118 | + |
| 119 | +Flashing firmware image |
| 120 | +======================= |
| 121 | + |
| 122 | +The firmware image can be flashed using the following two methods: |
| 123 | + |
| 124 | +Loading using ``bootimgup`` command |
| 125 | +------------------------------------ |
| 126 | + |
| 127 | +Only ``.bin`` firmware image can be loaded using bootimgup command. |
| 128 | + |
| 129 | +* Boot the target platform and stop at u-boot prompt. |
| 130 | + |
| 131 | +.. _sf_probe: |
| 132 | + |
| 133 | +* Detect SPI flash using ``sf probe`` command. |
| 134 | + |
| 135 | +.. code-block:: console |
| 136 | +
|
| 137 | + crb106-pcie> sf probe 0:0 |
| 138 | + SF: Detected mx25um51245g with page size 256 Bytes, erase size 4 KiB, total 64 MiB |
| 139 | +
|
| 140 | +If partition 0 (primary) is to be flashed, use ``sf probe 0:0``, while if partition 1 (secondary) |
| 141 | +is to be flashed, use ``sf probe 0:1`` |
| 142 | + |
| 143 | +.. _setting_up_env: |
| 144 | + |
| 145 | +* Setting up board environment and TFTP server: |
| 146 | + |
| 147 | +.. code-block:: console |
| 148 | +
|
| 149 | + # Set ethernet adaptor, some common adaptors are ax88179_eth or r8152_eth or e1000#0 or rvu_pf#4 |
| 150 | + # set ethact <ethernet adaptor> |
| 151 | + Eg. |
| 152 | + crb106-pcie> set ethact e1000#0 |
| 153 | +
|
| 154 | + # Obtain dynamic IP using dhcp for the board or assign static IP |
| 155 | + # setenv ipaddr <board IP> |
| 156 | + Eg |
| 157 | + crb106-pcie> dhcp |
| 158 | + or |
| 159 | + crb106-pcie> setenv ipaddr 10.28.35.116 |
| 160 | +
|
| 161 | + # Set TFTP server IP |
| 162 | + # setenv serverip <TFTP server IP> |
| 163 | + Eg. |
| 164 | + crb106-pcie> setenv serverip 10.28.35.121 |
| 165 | +
|
| 166 | + # Verify the tftp server is reachable from the board. |
| 167 | + # ping $serverip |
| 168 | + Eg. |
| 169 | + crb106-pcie> ping 10.28.35.121 |
| 170 | + Waiting for RPM1 LMAC0 link status... 10G_R [10G] |
| 171 | + Using rvu_pf#1 device |
| 172 | + host 10.28.35.121 is alive |
| 173 | +
|
| 174 | +* Load firmware to DDR from the tftp server: |
| 175 | + |
| 176 | +.. code-block:: console |
| 177 | +
|
| 178 | + # tftpboot $loadaddr <Path to firmware image in TFTP server> |
| 179 | +
|
| 180 | + Eg. |
| 181 | + crb106-pcie> tftpboot $loadaddr fw-update-cn10ka-SDK12.24.08.bin |
| 182 | + Waiting for RPM1 LMAC0 link status... 10G_R [10G] |
| 183 | + Using rvu_pf#1 device |
| 184 | + TFTP from server 10.28.35.121; our IP address is 10.28.35.116 |
| 185 | + Filename 'fw-update-cn10ka-SDK12.24.08.bin'. |
| 186 | + Load address: 0x20080000 |
| 187 | + Loading: ################################################## 6.5 MiB |
| 188 | + 8.2 MiB/s |
| 189 | + done |
| 190 | + Bytes transferred = 6821888 (681800 hex) |
| 191 | +
|
| 192 | +.. _fw_integrity: |
| 193 | + |
| 194 | +* Check downloaded firmware image integrity |
| 195 | + |
| 196 | +.. code-block:: console |
| 197 | +
|
| 198 | + # md5sum $loadaddr $filesize |
| 199 | + # sha1sum $loadaddr $filesize |
| 200 | +
|
| 201 | + Eg. |
| 202 | + crb106-pcie> md5sum $loadaddr $filesize |
| 203 | + md5 for 20080000 ... 207017ff ==> cd842a6d319e39b2a73daca8fddc14f5 |
| 204 | + crb106-pcie> sha1sum $loadaddr $filesize |
| 205 | + sha1 for 20080000 ... 207017ff ==> e5608368e737e3eb138e09033d5a5de0c61aec82 |
| 206 | +
|
| 207 | +* Flash the firmware image using bootimgup command: |
| 208 | + |
| 209 | +- When boot source is SPI: |
| 210 | + |
| 211 | +.. code-block:: console |
| 212 | +
|
| 213 | + Command: bootimgup -s spi bus:cs image_address image_size |
| 214 | + Where: |
| 215 | + -s - Overwrite SCP ROM area |
| 216 | + spi - SPI device |
| 217 | + bus:cs - Bus:Chip Select |
| 218 | + image_address - Image address |
| 219 | + image_size - Image Size |
| 220 | +
|
| 221 | + From the boot reset logs, ensure you select the correct SPI boot source (bus:cs) in |
| 222 | + the bootimgup command. |
| 223 | +
|
| 224 | + Example command if for spi 0:0 is as below |
| 225 | + crb106-pcie> bootimgup spi 1:0 $loadaddr $filesize |
| 226 | + Bootloader update SPI: 6821888 bytes |
| 227 | +
|
| 228 | +- When boot source is MMC: |
| 229 | + |
| 230 | +On CN10K, bootimgup mmc command is not supported. Use mmc write/update operations to update firmware. |
| 231 | + |
| 232 | +* Reboot the board and verify the board boots and the firmware version is correctly updated. |
| 233 | + |
| 234 | +Loading using direct flashing to SPI/eMMC device via u-boot commands |
| 235 | +-------------------------------------------------------------------- |
| 236 | + |
| 237 | +Only .img files can be loaded using direct flashing to SPI/eMMC device via u-boot commands. |
| 238 | + |
| 239 | +* Boot the target platform and stop at u-boot prompt. |
| 240 | + |
| 241 | +* Detect SPI flash. |
| 242 | + |
| 243 | +Refer :ref:`sf probe command<sf_probe>` from the previous section. |
| 244 | + |
| 245 | +* Setting up board environment |
| 246 | + |
| 247 | +Refer :ref:`Setup board environment<setting_up_env>` for detailed steps. |
| 248 | + |
| 249 | +* Check downloaded firmware image integrity |
| 250 | + |
| 251 | +Refer :ref:`fw_integrity<fw_integrity>` from the previous section. |
| 252 | + |
| 253 | +* Load firmware to DDR from the tftp server: |
| 254 | + |
| 255 | +.. code-block:: console |
| 256 | +
|
| 257 | + # tftpboot $loadaddr <Path to firmware image in TFTP server> |
| 258 | +
|
| 259 | + Eg. |
| 260 | + crb106-pcie> tftpboot $loadaddr flash-cn10ka-SDK12.24.08.img |
| 261 | + Waiting for RPM1 LMAC0 link status... 10G_R [10G] |
| 262 | + Using rvu_pf#1 device |
| 263 | + TFTP from server 10.28.35.121; our IP address is 10.28.35.116 |
| 264 | + Filename 'flash-cn10ka-SDK12.24.08.img'. |
| 265 | + Load address: 0x20080000 |
| 266 | + Loading: #################################################### 12 MiB |
| 267 | + 1.9 MiB/s |
| 268 | + done |
| 269 | + Bytes transferred = 12619593 (c08f49 hex) |
| 270 | +
|
| 271 | +* Update the firmware image using ``sf update`` command: |
| 272 | + |
| 273 | +.. code-block:: console |
| 274 | +
|
| 275 | + # sf update $loadaddr 0x0 $filesize |
| 276 | +
|
| 277 | + Eg. |
| 278 | + crb106-pcie> sf update $loadaddr 0x0 $filesize |
| 279 | + device 0 offset 0x0, size 0xc08f49 |
| 280 | + 28672 bytes written, 12590921 bytes skipped in 1.629s, speed 12619593 B/s |
| 281 | +
|
| 282 | +* Alternative to ``sf update`` command, use ``sf erase`` and ``sf write`` commands: |
| 283 | + |
| 284 | +.. code-block:: console |
| 285 | +
|
| 286 | + # sf erase 0x0 $filesize |
| 287 | + # sf write $loadaddr 0x0 $filesize |
| 288 | +
|
| 289 | + Eg. |
| 290 | + crb106-pcie> sf erase 0x0 $filesize |
| 291 | + SF: 12619593 bytes @ 0x0 Erased: OK |
| 292 | +
|
| 293 | + crb106-pcie> sf write $loadaddr 0x0 $filesize |
| 294 | + device 0 offset 0x0, size 0xc08f49 |
| 295 | + SF: 12619593 bytes @ 0x0 Written: OK |
| 296 | +
|
| 297 | +* Reboot the board and verify the board boots and the firmware version is correctly updated. |
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