From c879689ce7e8bba2f8fb8fefedeb923837c87a48 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Mon, 21 Oct 2024 16:48:02 -0700 Subject: [PATCH 01/21] add 2t line --- src/descriptors/power_system_structs.json | 101 ++++++++++++ .../generated/TwoTerminalHVDCDetailedLine.jl | 146 ++++++++++++++++++ src/models/generated/includes.jl | 3 + 3 files changed, 250 insertions(+) create mode 100644 src/models/generated/TwoTerminalHVDCDetailedLine.jl diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index bcc7ca38f0..1ebba995a3 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1099,6 +1099,107 @@ ], "supertype": "ACBranch" }, + { + "struct_name": "TwoTerminalHVDCDetailedLine", + "docstring": "A High Voltage DC line, which must be connected to an [`ACBus`](@ref) on each end.\n\nThis model is appropriate for operational simulations with a linearized DC power flow approximation with losses using a voltage-current model. For modeling a DC network, see [`TModelHVDCLine`](@ref)", + "fields": [ + { + "null_value": "init", + "name": "name", + "comment": "Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name", + "exclude_setter": true, + "data_type": "String" + }, + { + "null_value": "false", + "name": "available", + "comment": "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations", + "data_type": "Bool" + }, + { + "name": "active_power_flow", + "comment": "Initial condition of active power flowing from the from-bus to the to-bus in DC.", + "null_value": "0.0", + "data_type": "Float64", + "needs_conversion": true + }, + { + "name": "rating", + "comment": "Maximum output power rating of the converter (MVA)", + "null_value": "0.0", + "data_type": "Float64", + "valid_range": { + "min": 0, + "max": null + }, + "validation_action": "error", + "needs_conversion": true + }, + { + "name": "active_power_limits", + "comment": "Minimum and maximum stable active power levels (MW)", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "needs_conversion": true + }, + { + "null_value": "Arc(ACBus(nothing), ACBus(nothing))", + "name": "arc", + "comment": "An [`Arc`](@ref) defining this line `from` a bus `to` another bus", + "data_type": "Arc" + }, + { + "name": "converter_loss", + "comment": "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends.", + "null_value": "LinearCurve(0.0)", + "data_type": "Union{LinearCurve, PiecewiseIncrementalCurve}", + "default": "LinearCurve(0.0)" + }, + { + "name": "dc_current", + "comment": "DC current (A) on the converter on the from-bus DC side.", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.0" + }, + { + "name": "max_dc_current", + "comment": "Maximum stable dc current limits (A). Includes converter and DC line.", + "null_value": "0.0", + "data_type": "Float64", + "default": "1e8" + }, + { + "null_value": "0.0", + "name": "g", + "data_type": "Float64", + "comment": "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))", + "default": "0.0" + }, + { + "name": "services", + "data_type": "Vector{Service}", + "comment": "Services that this device contributes to", + "null_value": "Device[]", + "default": "Device[]" + }, + { + "name": "ext", + "comment": "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude.", + "data_type": "Dict{String, Any}", + "null_value": "Dict{String, Any}()", + "default": "Dict{String, Any}()" + }, + { + "name": "internal", + "comment": "(**Do not modify.**) PowerSystems.jl internal reference", + "data_type": "InfrastructureSystemsInternal", + "internal_default": "InfrastructureSystemsInternal()", + "exclude_setter": true + } + ], + "supertype": "ACBranch" + }, { "struct_name": "TwoTerminalVSCDCLine", "docstring": "A Voltage Sourced Converter (VSC)-HVDC transmission line.\n\nAs implemented in [\"Power System Modelling and Scripting\"](https://link.springer.com/book/10.1007/978-3-642-13669-6) by Federico Milano, Chapter 18, Page 397. This model is suitable for dynamic simulations", diff --git a/src/models/generated/TwoTerminalHVDCDetailedLine.jl b/src/models/generated/TwoTerminalHVDCDetailedLine.jl new file mode 100644 index 0000000000..a235b955e8 --- /dev/null +++ b/src/models/generated/TwoTerminalHVDCDetailedLine.jl @@ -0,0 +1,146 @@ +#= +This file is auto-generated. Do not edit. +=# + +#! format: off + +""" + mutable struct TwoTerminalHVDCDetailedLine <: ACBranch + name::String + available::Bool + active_power_flow::Float64 + rating::Float64 + active_power_limits::MinMax + arc::Arc + converter_loss::Union{LinearCurve, PiecewiseIncrementalCurve} + dc_current::Float64 + max_dc_current::Float64 + g::Float64 + services::Vector{Service} + ext::Dict{String, Any} + internal::InfrastructureSystemsInternal + end + +A High Voltage DC line, which must be connected to an [`ACBus`](@ref) on each end. + +This model is appropriate for operational simulations with a linearized DC power flow approximation with losses using a voltage-current model. For modeling a DC network, see [`TModelHVDCLine`](@ref) + +# Arguments +- `name::String`: Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name +- `available::Bool`: Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations +- `active_power_flow::Float64`: Initial condition of active power flowing from the from-bus to the to-bus in DC. +- `rating::Float64`: Maximum output power rating of the converter (MVA), validation range: `(0, nothing)` +- `active_power_limits::MinMax`: Minimum and maximum stable active power levels (MW) +- `arc::Arc`: An [`Arc`](@ref) defining this line `from` a bus `to` another bus +- `converter_loss::Union{LinearCurve, PiecewiseIncrementalCurve}`: (default: `LinearCurve(0.0)`) Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends. +- `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. +- `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. +- `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) +- `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to +- `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. +- `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference +""" +mutable struct TwoTerminalHVDCDetailedLine <: ACBranch + "Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name" + name::String + "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations" + available::Bool + "Initial condition of active power flowing from the from-bus to the to-bus in DC." + active_power_flow::Float64 + "Maximum output power rating of the converter (MVA)" + rating::Float64 + "Minimum and maximum stable active power levels (MW)" + active_power_limits::MinMax + "An [`Arc`](@ref) defining this line `from` a bus `to` another bus" + arc::Arc + "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends." + converter_loss::Union{LinearCurve, PiecewiseIncrementalCurve} + "DC current (A) on the converter on the from-bus DC side." + dc_current::Float64 + "Maximum stable dc current limits (A). Includes converter and DC line." + max_dc_current::Float64 + "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))" + g::Float64 + "Services that this device contributes to" + services::Vector{Service} + "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." + ext::Dict{String, Any} + "(**Do not modify.**) PowerSystems.jl internal reference" + internal::InfrastructureSystemsInternal +end + +function TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, services, ext, InfrastructureSystemsInternal(), ) +end + +function TwoTerminalHVDCDetailedLine(; name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, services, ext, internal, ) +end + +# Constructor for demo purposes; non-functional. +function TwoTerminalHVDCDetailedLine(::Nothing) + TwoTerminalHVDCDetailedLine(; + name="init", + available=false, + active_power_flow=0.0, + rating=0.0, + active_power_limits=(min=0.0, max=0.0), + arc=Arc(ACBus(nothing), ACBus(nothing)), + converter_loss=LinearCurve(0.0), + dc_current=0.0, + max_dc_current=0.0, + g=0.0, + services=Device[], + ext=Dict{String, Any}(), + ) +end + +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `name`.""" +get_name(value::TwoTerminalHVDCDetailedLine) = value.name +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `available`.""" +get_available(value::TwoTerminalHVDCDetailedLine) = value.available +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_flow`.""" +get_active_power_flow(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_flow) +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `rating`.""" +get_rating(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.rating) +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits`.""" +get_active_power_limits(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_limits) +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `arc`.""" +get_arc(value::TwoTerminalHVDCDetailedLine) = value.arc +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `converter_loss`.""" +get_converter_loss(value::TwoTerminalHVDCDetailedLine) = value.converter_loss +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `dc_current`.""" +get_dc_current(value::TwoTerminalHVDCDetailedLine) = value.dc_current +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `max_dc_current`.""" +get_max_dc_current(value::TwoTerminalHVDCDetailedLine) = value.max_dc_current +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `g`.""" +get_g(value::TwoTerminalHVDCDetailedLine) = value.g +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `services`.""" +get_services(value::TwoTerminalHVDCDetailedLine) = value.services +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `ext`.""" +get_ext(value::TwoTerminalHVDCDetailedLine) = value.ext +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `internal`.""" +get_internal(value::TwoTerminalHVDCDetailedLine) = value.internal + +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `available`.""" +set_available!(value::TwoTerminalHVDCDetailedLine, val) = value.available = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_flow`.""" +set_active_power_flow!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_flow = set_value(value, val) +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `rating`.""" +set_rating!(value::TwoTerminalHVDCDetailedLine, val) = value.rating = set_value(value, val) +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits`.""" +set_active_power_limits!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_limits = set_value(value, val) +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `arc`.""" +set_arc!(value::TwoTerminalHVDCDetailedLine, val) = value.arc = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `converter_loss`.""" +set_converter_loss!(value::TwoTerminalHVDCDetailedLine, val) = value.converter_loss = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `dc_current`.""" +set_dc_current!(value::TwoTerminalHVDCDetailedLine, val) = value.dc_current = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `max_dc_current`.""" +set_max_dc_current!(value::TwoTerminalHVDCDetailedLine, val) = value.max_dc_current = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `g`.""" +set_g!(value::TwoTerminalHVDCDetailedLine, val) = value.g = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `services`.""" +set_services!(value::TwoTerminalHVDCDetailedLine, val) = value.services = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `ext`.""" +set_ext!(value::TwoTerminalHVDCDetailedLine, val) = value.ext = val diff --git a/src/models/generated/includes.jl b/src/models/generated/includes.jl index 298ae42649..653bf47b9b 100644 --- a/src/models/generated/includes.jl +++ b/src/models/generated/includes.jl @@ -11,6 +11,7 @@ include("PhaseShiftingTransformer.jl") include("TapTransformer.jl") include("Transformer2W.jl") include("TwoTerminalHVDCLine.jl") +include("TwoTerminalHVDCDetailedLine.jl") include("TwoTerminalVSCDCLine.jl") include("TModelHVDCLine.jl") include("InterruptiblePowerLoad.jl") @@ -497,6 +498,7 @@ export get_constant_active_power export get_constant_reactive_power export get_contributing_services export get_conversion_factor +export get_converter_loss export get_current_active_power export get_current_reactive_power export get_cycle_limits @@ -1067,6 +1069,7 @@ export set_constant_active_power! export set_constant_reactive_power! export set_contributing_services! export set_conversion_factor! +export set_converter_loss! export set_current_active_power! export set_current_reactive_power! export set_cycle_limits! From da53cb93c6364c6663e6649fce57c32e24a00f0f Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 22 Oct 2024 11:45:03 -0700 Subject: [PATCH 02/21] add export --- src/PowerSystems.jl | 1 + 1 file changed, 1 insertion(+) diff --git a/src/PowerSystems.jl b/src/PowerSystems.jl index 103d62df3a..9bbbb14276 100644 --- a/src/PowerSystems.jl +++ b/src/PowerSystems.jl @@ -35,6 +35,7 @@ export MonitoredLine export DCBranch export TwoTerminalHVDCLine export TwoTerminalVSCDCLine +export TwoTerminalHVDCDetailedLine export TModelHVDCLine export Transformer2W export TapTransformer From b73c7a05403b574505e02fed4876e55b028b4e5e Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 22 Oct 2024 12:19:58 -0700 Subject: [PATCH 03/21] add voltage limits --- src/descriptors/power_system_structs.json | 7 +++++++ .../generated/TwoTerminalHVDCDetailedLine.jl | 17 +++++++++++++---- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 1ebba995a3..d73cea8999 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1176,6 +1176,13 @@ "comment": "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))", "default": "0.0" }, + { + "name": "voltage_limits", + "comment": "Limits on the Voltage at the DC Bus.", + "null_value": "(min=0.0, max=0.0)", + "data_type": "Float64", + "default": "(min=0.0, max=999.9)" + }, { "name": "services", "data_type": "Vector{Service}", diff --git a/src/models/generated/TwoTerminalHVDCDetailedLine.jl b/src/models/generated/TwoTerminalHVDCDetailedLine.jl index a235b955e8..f80f89f1e8 100644 --- a/src/models/generated/TwoTerminalHVDCDetailedLine.jl +++ b/src/models/generated/TwoTerminalHVDCDetailedLine.jl @@ -16,6 +16,7 @@ This file is auto-generated. Do not edit. dc_current::Float64 max_dc_current::Float64 g::Float64 + voltage_limits::Float64 services::Vector{Service} ext::Dict{String, Any} internal::InfrastructureSystemsInternal @@ -36,6 +37,7 @@ This model is appropriate for operational simulations with a linearized DC power - `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. - `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. - `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) +- `voltage_limits::Float64`: (default: `(min=0.0, max=999.9)`) Limits on the Voltage at the DC Bus. - `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to - `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. - `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference @@ -61,6 +63,8 @@ mutable struct TwoTerminalHVDCDetailedLine <: ACBranch max_dc_current::Float64 "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))" g::Float64 + "Limits on the Voltage at the DC Bus." + voltage_limits::Float64 "Services that this device contributes to" services::Vector{Service} "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." @@ -69,12 +73,12 @@ mutable struct TwoTerminalHVDCDetailedLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalHVDCDetailedLine(; name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, services, ext, internal, ) +function TwoTerminalHVDCDetailedLine(; name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -90,6 +94,7 @@ function TwoTerminalHVDCDetailedLine(::Nothing) dc_current=0.0, max_dc_current=0.0, g=0.0, + voltage_limits=(min=0.0, max=0.0), services=Device[], ext=Dict{String, Any}(), ) @@ -115,6 +120,8 @@ get_dc_current(value::TwoTerminalHVDCDetailedLine) = value.dc_current get_max_dc_current(value::TwoTerminalHVDCDetailedLine) = value.max_dc_current """Get [`TwoTerminalHVDCDetailedLine`](@ref) `g`.""" get_g(value::TwoTerminalHVDCDetailedLine) = value.g +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `voltage_limits`.""" +get_voltage_limits(value::TwoTerminalHVDCDetailedLine) = value.voltage_limits """Get [`TwoTerminalHVDCDetailedLine`](@ref) `services`.""" get_services(value::TwoTerminalHVDCDetailedLine) = value.services """Get [`TwoTerminalHVDCDetailedLine`](@ref) `ext`.""" @@ -140,6 +147,8 @@ set_dc_current!(value::TwoTerminalHVDCDetailedLine, val) = value.dc_current = va set_max_dc_current!(value::TwoTerminalHVDCDetailedLine, val) = value.max_dc_current = val """Set [`TwoTerminalHVDCDetailedLine`](@ref) `g`.""" set_g!(value::TwoTerminalHVDCDetailedLine, val) = value.g = val +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `voltage_limits`.""" +set_voltage_limits!(value::TwoTerminalHVDCDetailedLine, val) = value.voltage_limits = val """Set [`TwoTerminalHVDCDetailedLine`](@ref) `services`.""" set_services!(value::TwoTerminalHVDCDetailedLine, val) = value.services = val """Set [`TwoTerminalHVDCDetailedLine`](@ref) `ext`.""" From 5fb82df8f8d08d7cc45c10365e7227a88642d330 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 22 Oct 2024 12:45:00 -0700 Subject: [PATCH 04/21] update type to minmax --- src/descriptors/power_system_structs.json | 2 +- src/models/generated/TwoTerminalHVDCDetailedLine.jl | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index d73cea8999..07035dd55d 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1180,7 +1180,7 @@ "name": "voltage_limits", "comment": "Limits on the Voltage at the DC Bus.", "null_value": "(min=0.0, max=0.0)", - "data_type": "Float64", + "data_type": "MinMax", "default": "(min=0.0, max=999.9)" }, { diff --git a/src/models/generated/TwoTerminalHVDCDetailedLine.jl b/src/models/generated/TwoTerminalHVDCDetailedLine.jl index f80f89f1e8..41be53c144 100644 --- a/src/models/generated/TwoTerminalHVDCDetailedLine.jl +++ b/src/models/generated/TwoTerminalHVDCDetailedLine.jl @@ -16,7 +16,7 @@ This file is auto-generated. Do not edit. dc_current::Float64 max_dc_current::Float64 g::Float64 - voltage_limits::Float64 + voltage_limits::MinMax services::Vector{Service} ext::Dict{String, Any} internal::InfrastructureSystemsInternal @@ -37,7 +37,7 @@ This model is appropriate for operational simulations with a linearized DC power - `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. - `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. - `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) -- `voltage_limits::Float64`: (default: `(min=0.0, max=999.9)`) Limits on the Voltage at the DC Bus. +- `voltage_limits::MinMax`: (default: `(min=0.0, max=999.9)`) Limits on the Voltage at the DC Bus. - `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to - `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. - `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference @@ -64,7 +64,7 @@ mutable struct TwoTerminalHVDCDetailedLine <: ACBranch "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))" g::Float64 "Limits on the Voltage at the DC Bus." - voltage_limits::Float64 + voltage_limits::MinMax "Services that this device contributes to" services::Vector{Service} "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." From 3f7943150015392a8e4080118d79ce43d2697e8f Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 22 Oct 2024 14:54:47 -0700 Subject: [PATCH 05/21] update to quadraticcurve --- src/descriptors/power_system_structs.json | 2 +- src/models/generated/TwoTerminalHVDCDetailedLine.jl | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 07035dd55d..fd3a7426bc 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1152,7 +1152,7 @@ "name": "converter_loss", "comment": "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends.", "null_value": "LinearCurve(0.0)", - "data_type": "Union{LinearCurve, PiecewiseIncrementalCurve}", + "data_type": "Union{LinearCurve, QuadraticCurve}", "default": "LinearCurve(0.0)" }, { diff --git a/src/models/generated/TwoTerminalHVDCDetailedLine.jl b/src/models/generated/TwoTerminalHVDCDetailedLine.jl index 41be53c144..869c8bb13a 100644 --- a/src/models/generated/TwoTerminalHVDCDetailedLine.jl +++ b/src/models/generated/TwoTerminalHVDCDetailedLine.jl @@ -12,7 +12,7 @@ This file is auto-generated. Do not edit. rating::Float64 active_power_limits::MinMax arc::Arc - converter_loss::Union{LinearCurve, PiecewiseIncrementalCurve} + converter_loss::Union{LinearCurve, QuadraticCurve} dc_current::Float64 max_dc_current::Float64 g::Float64 @@ -33,7 +33,7 @@ This model is appropriate for operational simulations with a linearized DC power - `rating::Float64`: Maximum output power rating of the converter (MVA), validation range: `(0, nothing)` - `active_power_limits::MinMax`: Minimum and maximum stable active power levels (MW) - `arc::Arc`: An [`Arc`](@ref) defining this line `from` a bus `to` another bus -- `converter_loss::Union{LinearCurve, PiecewiseIncrementalCurve}`: (default: `LinearCurve(0.0)`) Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends. +- `converter_loss::Union{LinearCurve, QuadraticCurve}`: (default: `LinearCurve(0.0)`) Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends. - `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. - `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. - `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) @@ -56,7 +56,7 @@ mutable struct TwoTerminalHVDCDetailedLine <: ACBranch "An [`Arc`](@ref) defining this line `from` a bus `to` another bus" arc::Arc "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends." - converter_loss::Union{LinearCurve, PiecewiseIncrementalCurve} + converter_loss::Union{LinearCurve, QuadraticCurve} "DC current (A) on the converter on the from-bus DC side." dc_current::Float64 "Maximum stable dc current limits (A). Includes converter and DC line." From 071b8931a0cf7c208d6597dac4bf159d5a7261b9 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 24 Oct 2024 11:05:03 -0700 Subject: [PATCH 06/21] add from and to limits --- src/descriptors/power_system_structs.json | 11 ++++-- .../generated/TwoTerminalHVDCDetailedLine.jl | 35 ++++++++++++------- 2 files changed, 31 insertions(+), 15 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index fd3a7426bc..534a762e5b 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1136,8 +1136,15 @@ "needs_conversion": true }, { - "name": "active_power_limits", - "comment": "Minimum and maximum stable active power levels (MW)", + "name": "active_power_limits_from", + "comment": "Minimum and maximum active power flows to the FROM node (MW)", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "needs_conversion": true + }, + { + "name": "active_power_limits_to", + "comment": "Minimum and maximum active power flows to the TO node (MW)", "null_value": "(min=0.0, max=0.0)", "data_type": "MinMax", "needs_conversion": true diff --git a/src/models/generated/TwoTerminalHVDCDetailedLine.jl b/src/models/generated/TwoTerminalHVDCDetailedLine.jl index 869c8bb13a..5e2040c091 100644 --- a/src/models/generated/TwoTerminalHVDCDetailedLine.jl +++ b/src/models/generated/TwoTerminalHVDCDetailedLine.jl @@ -10,7 +10,8 @@ This file is auto-generated. Do not edit. available::Bool active_power_flow::Float64 rating::Float64 - active_power_limits::MinMax + active_power_limits_from::MinMax + active_power_limits_to::MinMax arc::Arc converter_loss::Union{LinearCurve, QuadraticCurve} dc_current::Float64 @@ -31,7 +32,8 @@ This model is appropriate for operational simulations with a linearized DC power - `available::Bool`: Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations - `active_power_flow::Float64`: Initial condition of active power flowing from the from-bus to the to-bus in DC. - `rating::Float64`: Maximum output power rating of the converter (MVA), validation range: `(0, nothing)` -- `active_power_limits::MinMax`: Minimum and maximum stable active power levels (MW) +- `active_power_limits_from::MinMax`: Minimum and maximum active power flows to the FROM node (MW) +- `active_power_limits_to::MinMax`: Minimum and maximum active power flows to the TO node (MW) - `arc::Arc`: An [`Arc`](@ref) defining this line `from` a bus `to` another bus - `converter_loss::Union{LinearCurve, QuadraticCurve}`: (default: `LinearCurve(0.0)`) Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends. - `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. @@ -51,8 +53,10 @@ mutable struct TwoTerminalHVDCDetailedLine <: ACBranch active_power_flow::Float64 "Maximum output power rating of the converter (MVA)" rating::Float64 - "Minimum and maximum stable active power levels (MW)" - active_power_limits::MinMax + "Minimum and maximum active power flows to the FROM node (MW)" + active_power_limits_from::MinMax + "Minimum and maximum active power flows to the TO node (MW)" + active_power_limits_to::MinMax "An [`Arc`](@ref) defining this line `from` a bus `to` another bus" arc::Arc "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends." @@ -73,12 +77,12 @@ mutable struct TwoTerminalHVDCDetailedLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalHVDCDetailedLine(; name, available, active_power_flow, rating, active_power_limits, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, internal, ) +function TwoTerminalHVDCDetailedLine(; name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -88,7 +92,8 @@ function TwoTerminalHVDCDetailedLine(::Nothing) available=false, active_power_flow=0.0, rating=0.0, - active_power_limits=(min=0.0, max=0.0), + active_power_limits_from=(min=0.0, max=0.0), + active_power_limits_to=(min=0.0, max=0.0), arc=Arc(ACBus(nothing), ACBus(nothing)), converter_loss=LinearCurve(0.0), dc_current=0.0, @@ -108,8 +113,10 @@ get_available(value::TwoTerminalHVDCDetailedLine) = value.available get_active_power_flow(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_flow) """Get [`TwoTerminalHVDCDetailedLine`](@ref) `rating`.""" get_rating(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.rating) -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits`.""" -get_active_power_limits(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_limits) +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_from`.""" +get_active_power_limits_from(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_limits_from) +"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_to`.""" +get_active_power_limits_to(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_limits_to) """Get [`TwoTerminalHVDCDetailedLine`](@ref) `arc`.""" get_arc(value::TwoTerminalHVDCDetailedLine) = value.arc """Get [`TwoTerminalHVDCDetailedLine`](@ref) `converter_loss`.""" @@ -135,8 +142,10 @@ set_available!(value::TwoTerminalHVDCDetailedLine, val) = value.available = val set_active_power_flow!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_flow = set_value(value, val) """Set [`TwoTerminalHVDCDetailedLine`](@ref) `rating`.""" set_rating!(value::TwoTerminalHVDCDetailedLine, val) = value.rating = set_value(value, val) -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits`.""" -set_active_power_limits!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_limits = set_value(value, val) +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_from`.""" +set_active_power_limits_from!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_limits_from = set_value(value, val) +"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_to`.""" +set_active_power_limits_to!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_limits_to = set_value(value, val) """Set [`TwoTerminalHVDCDetailedLine`](@ref) `arc`.""" set_arc!(value::TwoTerminalHVDCDetailedLine, val) = value.arc = val """Set [`TwoTerminalHVDCDetailedLine`](@ref) `converter_loss`.""" From cd4500d0c16bda0df84da6e0841014adec819428 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 5 Nov 2024 13:03:46 -0800 Subject: [PATCH 07/21] update name to VSC line --- src/PowerSystems.jl | 2 +- src/descriptors/power_system_structs.json | 2 +- .../generated/TwoTerminalHVDCDetailedLine.jl | 164 ------------------ src/models/generated/TwoTerminalVSCLine.jl | 164 ++++++++++++++++++ src/models/generated/includes.jl | 2 +- 5 files changed, 167 insertions(+), 167 deletions(-) delete mode 100644 src/models/generated/TwoTerminalHVDCDetailedLine.jl create mode 100644 src/models/generated/TwoTerminalVSCLine.jl diff --git a/src/PowerSystems.jl b/src/PowerSystems.jl index 9bbbb14276..5c762cf1fd 100644 --- a/src/PowerSystems.jl +++ b/src/PowerSystems.jl @@ -35,7 +35,7 @@ export MonitoredLine export DCBranch export TwoTerminalHVDCLine export TwoTerminalVSCDCLine -export TwoTerminalHVDCDetailedLine +export TwoTerminalVSCLine export TModelHVDCLine export Transformer2W export TapTransformer diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 534a762e5b..d607513c74 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1100,7 +1100,7 @@ "supertype": "ACBranch" }, { - "struct_name": "TwoTerminalHVDCDetailedLine", + "struct_name": "TwoTerminalVSCLine", "docstring": "A High Voltage DC line, which must be connected to an [`ACBus`](@ref) on each end.\n\nThis model is appropriate for operational simulations with a linearized DC power flow approximation with losses using a voltage-current model. For modeling a DC network, see [`TModelHVDCLine`](@ref)", "fields": [ { diff --git a/src/models/generated/TwoTerminalHVDCDetailedLine.jl b/src/models/generated/TwoTerminalHVDCDetailedLine.jl deleted file mode 100644 index 5e2040c091..0000000000 --- a/src/models/generated/TwoTerminalHVDCDetailedLine.jl +++ /dev/null @@ -1,164 +0,0 @@ -#= -This file is auto-generated. Do not edit. -=# - -#! format: off - -""" - mutable struct TwoTerminalHVDCDetailedLine <: ACBranch - name::String - available::Bool - active_power_flow::Float64 - rating::Float64 - active_power_limits_from::MinMax - active_power_limits_to::MinMax - arc::Arc - converter_loss::Union{LinearCurve, QuadraticCurve} - dc_current::Float64 - max_dc_current::Float64 - g::Float64 - voltage_limits::MinMax - services::Vector{Service} - ext::Dict{String, Any} - internal::InfrastructureSystemsInternal - end - -A High Voltage DC line, which must be connected to an [`ACBus`](@ref) on each end. - -This model is appropriate for operational simulations with a linearized DC power flow approximation with losses using a voltage-current model. For modeling a DC network, see [`TModelHVDCLine`](@ref) - -# Arguments -- `name::String`: Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name -- `available::Bool`: Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations -- `active_power_flow::Float64`: Initial condition of active power flowing from the from-bus to the to-bus in DC. -- `rating::Float64`: Maximum output power rating of the converter (MVA), validation range: `(0, nothing)` -- `active_power_limits_from::MinMax`: Minimum and maximum active power flows to the FROM node (MW) -- `active_power_limits_to::MinMax`: Minimum and maximum active power flows to the TO node (MW) -- `arc::Arc`: An [`Arc`](@ref) defining this line `from` a bus `to` another bus -- `converter_loss::Union{LinearCurve, QuadraticCurve}`: (default: `LinearCurve(0.0)`) Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends. -- `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. -- `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. -- `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) -- `voltage_limits::MinMax`: (default: `(min=0.0, max=999.9)`) Limits on the Voltage at the DC Bus. -- `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to -- `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. -- `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference -""" -mutable struct TwoTerminalHVDCDetailedLine <: ACBranch - "Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name" - name::String - "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations" - available::Bool - "Initial condition of active power flowing from the from-bus to the to-bus in DC." - active_power_flow::Float64 - "Maximum output power rating of the converter (MVA)" - rating::Float64 - "Minimum and maximum active power flows to the FROM node (MW)" - active_power_limits_from::MinMax - "Minimum and maximum active power flows to the TO node (MW)" - active_power_limits_to::MinMax - "An [`Arc`](@ref) defining this line `from` a bus `to` another bus" - arc::Arc - "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends." - converter_loss::Union{LinearCurve, QuadraticCurve} - "DC current (A) on the converter on the from-bus DC side." - dc_current::Float64 - "Maximum stable dc current limits (A). Includes converter and DC line." - max_dc_current::Float64 - "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))" - g::Float64 - "Limits on the Voltage at the DC Bus." - voltage_limits::MinMax - "Services that this device contributes to" - services::Vector{Service} - "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." - ext::Dict{String, Any} - "(**Do not modify.**) PowerSystems.jl internal reference" - internal::InfrastructureSystemsInternal -end - -function TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, InfrastructureSystemsInternal(), ) -end - -function TwoTerminalHVDCDetailedLine(; name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalHVDCDetailedLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, internal, ) -end - -# Constructor for demo purposes; non-functional. -function TwoTerminalHVDCDetailedLine(::Nothing) - TwoTerminalHVDCDetailedLine(; - name="init", - available=false, - active_power_flow=0.0, - rating=0.0, - active_power_limits_from=(min=0.0, max=0.0), - active_power_limits_to=(min=0.0, max=0.0), - arc=Arc(ACBus(nothing), ACBus(nothing)), - converter_loss=LinearCurve(0.0), - dc_current=0.0, - max_dc_current=0.0, - g=0.0, - voltage_limits=(min=0.0, max=0.0), - services=Device[], - ext=Dict{String, Any}(), - ) -end - -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `name`.""" -get_name(value::TwoTerminalHVDCDetailedLine) = value.name -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `available`.""" -get_available(value::TwoTerminalHVDCDetailedLine) = value.available -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_flow`.""" -get_active_power_flow(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_flow) -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `rating`.""" -get_rating(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.rating) -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_from`.""" -get_active_power_limits_from(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_limits_from) -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_to`.""" -get_active_power_limits_to(value::TwoTerminalHVDCDetailedLine) = get_value(value, value.active_power_limits_to) -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `arc`.""" -get_arc(value::TwoTerminalHVDCDetailedLine) = value.arc -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `converter_loss`.""" -get_converter_loss(value::TwoTerminalHVDCDetailedLine) = value.converter_loss -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `dc_current`.""" -get_dc_current(value::TwoTerminalHVDCDetailedLine) = value.dc_current -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `max_dc_current`.""" -get_max_dc_current(value::TwoTerminalHVDCDetailedLine) = value.max_dc_current -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `g`.""" -get_g(value::TwoTerminalHVDCDetailedLine) = value.g -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `voltage_limits`.""" -get_voltage_limits(value::TwoTerminalHVDCDetailedLine) = value.voltage_limits -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `services`.""" -get_services(value::TwoTerminalHVDCDetailedLine) = value.services -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `ext`.""" -get_ext(value::TwoTerminalHVDCDetailedLine) = value.ext -"""Get [`TwoTerminalHVDCDetailedLine`](@ref) `internal`.""" -get_internal(value::TwoTerminalHVDCDetailedLine) = value.internal - -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `available`.""" -set_available!(value::TwoTerminalHVDCDetailedLine, val) = value.available = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_flow`.""" -set_active_power_flow!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_flow = set_value(value, val) -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `rating`.""" -set_rating!(value::TwoTerminalHVDCDetailedLine, val) = value.rating = set_value(value, val) -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_from`.""" -set_active_power_limits_from!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_limits_from = set_value(value, val) -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `active_power_limits_to`.""" -set_active_power_limits_to!(value::TwoTerminalHVDCDetailedLine, val) = value.active_power_limits_to = set_value(value, val) -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `arc`.""" -set_arc!(value::TwoTerminalHVDCDetailedLine, val) = value.arc = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `converter_loss`.""" -set_converter_loss!(value::TwoTerminalHVDCDetailedLine, val) = value.converter_loss = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `dc_current`.""" -set_dc_current!(value::TwoTerminalHVDCDetailedLine, val) = value.dc_current = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `max_dc_current`.""" -set_max_dc_current!(value::TwoTerminalHVDCDetailedLine, val) = value.max_dc_current = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `g`.""" -set_g!(value::TwoTerminalHVDCDetailedLine, val) = value.g = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `voltage_limits`.""" -set_voltage_limits!(value::TwoTerminalHVDCDetailedLine, val) = value.voltage_limits = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `services`.""" -set_services!(value::TwoTerminalHVDCDetailedLine, val) = value.services = val -"""Set [`TwoTerminalHVDCDetailedLine`](@ref) `ext`.""" -set_ext!(value::TwoTerminalHVDCDetailedLine, val) = value.ext = val diff --git a/src/models/generated/TwoTerminalVSCLine.jl b/src/models/generated/TwoTerminalVSCLine.jl new file mode 100644 index 0000000000..2a77736dd3 --- /dev/null +++ b/src/models/generated/TwoTerminalVSCLine.jl @@ -0,0 +1,164 @@ +#= +This file is auto-generated. Do not edit. +=# + +#! format: off + +""" + mutable struct TwoTerminalVSCLine <: ACBranch + name::String + available::Bool + active_power_flow::Float64 + rating::Float64 + active_power_limits_from::MinMax + active_power_limits_to::MinMax + arc::Arc + converter_loss::Union{LinearCurve, QuadraticCurve} + dc_current::Float64 + max_dc_current::Float64 + g::Float64 + voltage_limits::MinMax + services::Vector{Service} + ext::Dict{String, Any} + internal::InfrastructureSystemsInternal + end + +A High Voltage DC line, which must be connected to an [`ACBus`](@ref) on each end. + +This model is appropriate for operational simulations with a linearized DC power flow approximation with losses using a voltage-current model. For modeling a DC network, see [`TModelHVDCLine`](@ref) + +# Arguments +- `name::String`: Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name +- `available::Bool`: Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations +- `active_power_flow::Float64`: Initial condition of active power flowing from the from-bus to the to-bus in DC. +- `rating::Float64`: Maximum output power rating of the converter (MVA), validation range: `(0, nothing)` +- `active_power_limits_from::MinMax`: Minimum and maximum active power flows to the FROM node (MW) +- `active_power_limits_to::MinMax`: Minimum and maximum active power flows to the TO node (MW) +- `arc::Arc`: An [`Arc`](@ref) defining this line `from` a bus `to` another bus +- `converter_loss::Union{LinearCurve, QuadraticCurve}`: (default: `LinearCurve(0.0)`) Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends. +- `dc_current::Float64`: (default: `0.0`) DC current (A) on the converter on the from-bus DC side. +- `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. +- `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) +- `voltage_limits::MinMax`: (default: `(min=0.0, max=999.9)`) Limits on the Voltage at the DC Bus. +- `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to +- `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. +- `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference +""" +mutable struct TwoTerminalVSCLine <: ACBranch + "Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name" + name::String + "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations" + available::Bool + "Initial condition of active power flowing from the from-bus to the to-bus in DC." + active_power_flow::Float64 + "Maximum output power rating of the converter (MVA)" + rating::Float64 + "Minimum and maximum active power flows to the FROM node (MW)" + active_power_limits_from::MinMax + "Minimum and maximum active power flows to the TO node (MW)" + active_power_limits_to::MinMax + "An [`Arc`](@ref) defining this line `from` a bus `to` another bus" + arc::Arc + "Loss model coefficients. It accepts a linear model or quadratic. Same converter data is used in both ends." + converter_loss::Union{LinearCurve, QuadraticCurve} + "DC current (A) on the converter on the from-bus DC side." + dc_current::Float64 + "Maximum stable dc current limits (A). Includes converter and DC line." + max_dc_current::Float64 + "Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit))" + g::Float64 + "Limits on the Voltage at the DC Bus." + voltage_limits::MinMax + "Services that this device contributes to" + services::Vector{Service} + "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." + ext::Dict{String, Any} + "(**Do not modify.**) PowerSystems.jl internal reference" + internal::InfrastructureSystemsInternal +end + +function TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, InfrastructureSystemsInternal(), ) +end + +function TwoTerminalVSCLine(; name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, internal, ) +end + +# Constructor for demo purposes; non-functional. +function TwoTerminalVSCLine(::Nothing) + TwoTerminalVSCLine(; + name="init", + available=false, + active_power_flow=0.0, + rating=0.0, + active_power_limits_from=(min=0.0, max=0.0), + active_power_limits_to=(min=0.0, max=0.0), + arc=Arc(ACBus(nothing), ACBus(nothing)), + converter_loss=LinearCurve(0.0), + dc_current=0.0, + max_dc_current=0.0, + g=0.0, + voltage_limits=(min=0.0, max=0.0), + services=Device[], + ext=Dict{String, Any}(), + ) +end + +"""Get [`TwoTerminalVSCLine`](@ref) `name`.""" +get_name(value::TwoTerminalVSCLine) = value.name +"""Get [`TwoTerminalVSCLine`](@ref) `available`.""" +get_available(value::TwoTerminalVSCLine) = value.available +"""Get [`TwoTerminalVSCLine`](@ref) `active_power_flow`.""" +get_active_power_flow(value::TwoTerminalVSCLine) = get_value(value, value.active_power_flow) +"""Get [`TwoTerminalVSCLine`](@ref) `rating`.""" +get_rating(value::TwoTerminalVSCLine) = get_value(value, value.rating) +"""Get [`TwoTerminalVSCLine`](@ref) `active_power_limits_from`.""" +get_active_power_limits_from(value::TwoTerminalVSCLine) = get_value(value, value.active_power_limits_from) +"""Get [`TwoTerminalVSCLine`](@ref) `active_power_limits_to`.""" +get_active_power_limits_to(value::TwoTerminalVSCLine) = get_value(value, value.active_power_limits_to) +"""Get [`TwoTerminalVSCLine`](@ref) `arc`.""" +get_arc(value::TwoTerminalVSCLine) = value.arc +"""Get [`TwoTerminalVSCLine`](@ref) `converter_loss`.""" +get_converter_loss(value::TwoTerminalVSCLine) = value.converter_loss +"""Get [`TwoTerminalVSCLine`](@ref) `dc_current`.""" +get_dc_current(value::TwoTerminalVSCLine) = value.dc_current +"""Get [`TwoTerminalVSCLine`](@ref) `max_dc_current`.""" +get_max_dc_current(value::TwoTerminalVSCLine) = value.max_dc_current +"""Get [`TwoTerminalVSCLine`](@ref) `g`.""" +get_g(value::TwoTerminalVSCLine) = value.g +"""Get [`TwoTerminalVSCLine`](@ref) `voltage_limits`.""" +get_voltage_limits(value::TwoTerminalVSCLine) = value.voltage_limits +"""Get [`TwoTerminalVSCLine`](@ref) `services`.""" +get_services(value::TwoTerminalVSCLine) = value.services +"""Get [`TwoTerminalVSCLine`](@ref) `ext`.""" +get_ext(value::TwoTerminalVSCLine) = value.ext +"""Get [`TwoTerminalVSCLine`](@ref) `internal`.""" +get_internal(value::TwoTerminalVSCLine) = value.internal + +"""Set [`TwoTerminalVSCLine`](@ref) `available`.""" +set_available!(value::TwoTerminalVSCLine, val) = value.available = val +"""Set [`TwoTerminalVSCLine`](@ref) `active_power_flow`.""" +set_active_power_flow!(value::TwoTerminalVSCLine, val) = value.active_power_flow = set_value(value, val) +"""Set [`TwoTerminalVSCLine`](@ref) `rating`.""" +set_rating!(value::TwoTerminalVSCLine, val) = value.rating = set_value(value, val) +"""Set [`TwoTerminalVSCLine`](@ref) `active_power_limits_from`.""" +set_active_power_limits_from!(value::TwoTerminalVSCLine, val) = value.active_power_limits_from = set_value(value, val) +"""Set [`TwoTerminalVSCLine`](@ref) `active_power_limits_to`.""" +set_active_power_limits_to!(value::TwoTerminalVSCLine, val) = value.active_power_limits_to = set_value(value, val) +"""Set [`TwoTerminalVSCLine`](@ref) `arc`.""" +set_arc!(value::TwoTerminalVSCLine, val) = value.arc = val +"""Set [`TwoTerminalVSCLine`](@ref) `converter_loss`.""" +set_converter_loss!(value::TwoTerminalVSCLine, val) = value.converter_loss = val +"""Set [`TwoTerminalVSCLine`](@ref) `dc_current`.""" +set_dc_current!(value::TwoTerminalVSCLine, val) = value.dc_current = val +"""Set [`TwoTerminalVSCLine`](@ref) `max_dc_current`.""" +set_max_dc_current!(value::TwoTerminalVSCLine, val) = value.max_dc_current = val +"""Set [`TwoTerminalVSCLine`](@ref) `g`.""" +set_g!(value::TwoTerminalVSCLine, val) = value.g = val +"""Set [`TwoTerminalVSCLine`](@ref) `voltage_limits`.""" +set_voltage_limits!(value::TwoTerminalVSCLine, val) = value.voltage_limits = val +"""Set [`TwoTerminalVSCLine`](@ref) `services`.""" +set_services!(value::TwoTerminalVSCLine, val) = value.services = val +"""Set [`TwoTerminalVSCLine`](@ref) `ext`.""" +set_ext!(value::TwoTerminalVSCLine, val) = value.ext = val diff --git a/src/models/generated/includes.jl b/src/models/generated/includes.jl index 653bf47b9b..642a970f26 100644 --- a/src/models/generated/includes.jl +++ b/src/models/generated/includes.jl @@ -11,7 +11,7 @@ include("PhaseShiftingTransformer.jl") include("TapTransformer.jl") include("Transformer2W.jl") include("TwoTerminalHVDCLine.jl") -include("TwoTerminalHVDCDetailedLine.jl") +include("TwoTerminalVSCLine.jl") include("TwoTerminalVSCDCLine.jl") include("TModelHVDCLine.jl") include("InterruptiblePowerLoad.jl") From 3fc6b33aaa082db9dc658e36bb61c581ac38328c Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Wed, 11 Dec 2024 10:48:49 -0800 Subject: [PATCH 08/21] add reactive power limits --- src/PowerSystems.jl | 1 + src/descriptors/power_system_structs.json | 14 ++++++++++++ src/models/generated/TwoTerminalVSCLine.jl | 26 ++++++++++++++++++---- 3 files changed, 37 insertions(+), 4 deletions(-) diff --git a/src/PowerSystems.jl b/src/PowerSystems.jl index 5c762cf1fd..e57e448ff1 100644 --- a/src/PowerSystems.jl +++ b/src/PowerSystems.jl @@ -34,6 +34,7 @@ export Line export MonitoredLine export DCBranch export TwoTerminalHVDCLine +# TODO: Remove VSCDC Line for PSY 5.0 export TwoTerminalVSCDCLine export TwoTerminalVSCLine export TModelHVDCLine diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index d607513c74..93eaf1e000 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1190,6 +1190,20 @@ "data_type": "MinMax", "default": "(min=0.0, max=999.9)" }, + { + "name": "reactive_power_limits_from", + "comment": "Limits on the Reactive Power at the from side.", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "default": "(min=0.0, max=0.0)" + }, + { + "name": "reactive_power_limits_to", + "comment": "Limits on the Reactive Power at the from side.", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "default": "(min=0.0, max=0.0)" + }, { "name": "services", "data_type": "Vector{Service}", diff --git a/src/models/generated/TwoTerminalVSCLine.jl b/src/models/generated/TwoTerminalVSCLine.jl index 2a77736dd3..d20fa58982 100644 --- a/src/models/generated/TwoTerminalVSCLine.jl +++ b/src/models/generated/TwoTerminalVSCLine.jl @@ -18,6 +18,8 @@ This file is auto-generated. Do not edit. max_dc_current::Float64 g::Float64 voltage_limits::MinMax + reactive_power_limits_from::MinMax + reactive_power_limits_to::MinMax services::Vector{Service} ext::Dict{String, Any} internal::InfrastructureSystemsInternal @@ -40,6 +42,8 @@ This model is appropriate for operational simulations with a linearized DC power - `max_dc_current::Float64`: (default: `1e8`) Maximum stable dc current limits (A). Includes converter and DC line. - `g::Float64`: (default: `0.0`) Series conductance of the DC line in pu ([`SYSTEM_BASE`](@ref per_unit)) - `voltage_limits::MinMax`: (default: `(min=0.0, max=999.9)`) Limits on the Voltage at the DC Bus. +- `reactive_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Limits on the Reactive Power at the from side. +- `reactive_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Limits on the Reactive Power at the from side. - `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to - `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. - `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference @@ -69,6 +73,10 @@ mutable struct TwoTerminalVSCLine <: ACBranch g::Float64 "Limits on the Voltage at the DC Bus." voltage_limits::MinMax + "Limits on the Reactive Power at the from side." + reactive_power_limits_from::MinMax + "Limits on the Reactive Power at the from side." + reactive_power_limits_to::MinMax "Services that this device contributes to" services::Vector{Service} "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." @@ -77,12 +85,12 @@ mutable struct TwoTerminalVSCLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, reactive_power_limits_from, reactive_power_limits_to, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalVSCLine(; name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, services, ext, internal, ) +function TwoTerminalVSCLine(; name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss=LinearCurve(0.0), dc_current=0.0, max_dc_current=1e8, g=0.0, voltage_limits=(min=0.0, max=999.9), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalVSCLine(name, available, active_power_flow, rating, active_power_limits_from, active_power_limits_to, arc, converter_loss, dc_current, max_dc_current, g, voltage_limits, reactive_power_limits_from, reactive_power_limits_to, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -100,6 +108,8 @@ function TwoTerminalVSCLine(::Nothing) max_dc_current=0.0, g=0.0, voltage_limits=(min=0.0, max=0.0), + reactive_power_limits_from=(min=0.0, max=0.0), + reactive_power_limits_to=(min=0.0, max=0.0), services=Device[], ext=Dict{String, Any}(), ) @@ -129,6 +139,10 @@ get_max_dc_current(value::TwoTerminalVSCLine) = value.max_dc_current get_g(value::TwoTerminalVSCLine) = value.g """Get [`TwoTerminalVSCLine`](@ref) `voltage_limits`.""" get_voltage_limits(value::TwoTerminalVSCLine) = value.voltage_limits +"""Get [`TwoTerminalVSCLine`](@ref) `reactive_power_limits_from`.""" +get_reactive_power_limits_from(value::TwoTerminalVSCLine) = value.reactive_power_limits_from +"""Get [`TwoTerminalVSCLine`](@ref) `reactive_power_limits_to`.""" +get_reactive_power_limits_to(value::TwoTerminalVSCLine) = value.reactive_power_limits_to """Get [`TwoTerminalVSCLine`](@ref) `services`.""" get_services(value::TwoTerminalVSCLine) = value.services """Get [`TwoTerminalVSCLine`](@ref) `ext`.""" @@ -158,6 +172,10 @@ set_max_dc_current!(value::TwoTerminalVSCLine, val) = value.max_dc_current = val set_g!(value::TwoTerminalVSCLine, val) = value.g = val """Set [`TwoTerminalVSCLine`](@ref) `voltage_limits`.""" set_voltage_limits!(value::TwoTerminalVSCLine, val) = value.voltage_limits = val +"""Set [`TwoTerminalVSCLine`](@ref) `reactive_power_limits_from`.""" +set_reactive_power_limits_from!(value::TwoTerminalVSCLine, val) = value.reactive_power_limits_from = val +"""Set [`TwoTerminalVSCLine`](@ref) `reactive_power_limits_to`.""" +set_reactive_power_limits_to!(value::TwoTerminalVSCLine, val) = value.reactive_power_limits_to = val """Set [`TwoTerminalVSCLine`](@ref) `services`.""" set_services!(value::TwoTerminalVSCLine, val) = value.services = val """Set [`TwoTerminalVSCLine`](@ref) `ext`.""" From 95f1bf56fe9a2d58c79778c8316a5475b3745669 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 21 Jan 2025 17:00:14 -0800 Subject: [PATCH 09/21] remove VSCDC struct --- src/models/generated/TwoTerminalVSCDCLine.jl | 146 ------------------- 1 file changed, 146 deletions(-) delete mode 100644 src/models/generated/TwoTerminalVSCDCLine.jl diff --git a/src/models/generated/TwoTerminalVSCDCLine.jl b/src/models/generated/TwoTerminalVSCDCLine.jl deleted file mode 100644 index af12241ac5..0000000000 --- a/src/models/generated/TwoTerminalVSCDCLine.jl +++ /dev/null @@ -1,146 +0,0 @@ -#= -This file is auto-generated. Do not edit. -=# - -#! format: off - -""" - mutable struct TwoTerminalVSCDCLine <: ACBranch - name::String - available::Bool - active_power_flow::Float64 - arc::Arc - rectifier_tap_limits::MinMax - rectifier_xrc::Float64 - rectifier_firing_angle::MinMax - inverter_tap_limits::MinMax - inverter_xrc::Float64 - inverter_extinction_angle::MinMax - services::Vector{Service} - ext::Dict{String, Any} - internal::InfrastructureSystemsInternal - end - -A Voltage Sourced Converter (VSC)-HVDC transmission line. - -As implemented in ["Power System Modelling and Scripting"](https://link.springer.com/book/10.1007/978-3-642-13669-6) by Federico Milano, Chapter 18, Page 397. This model is suitable for dynamic simulations - -# Arguments -- `name::String`: Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name -- `available::Bool`: Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations -- `active_power_flow::Float64`: Initial condition of active power flow on the line (MW) -- `arc::Arc`: An [`Arc`](@ref) defining this line `from` a bus `to` another bus -- `rectifier_tap_limits::MinMax`: Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side voltages -- `rectifier_xrc::Float64`: Rectifier commutation reactance in p.u. ([`DEVICE_BASE`](@ref per_unit)) -- `rectifier_firing_angle::MinMax`: Minimum and maximum rectifier firing angle (α) (radians) -- `inverter_tap_limits::MinMax`: Minimum and maximum inverter tap limits as a ratio between the primary and secondary side voltages -- `inverter_xrc::Float64`: Inverter commutation reactance in p.u. ([`DEVICE_BASE`](@ref per_unit)) -- `inverter_extinction_angle::MinMax`: Minimum and maximum inverter extinction angle (γ) (radians) -- `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to -- `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. -- `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference -""" -mutable struct TwoTerminalVSCDCLine <: ACBranch - "Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name" - name::String - "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations" - available::Bool - "Initial condition of active power flow on the line (MW)" - active_power_flow::Float64 - "An [`Arc`](@ref) defining this line `from` a bus `to` another bus" - arc::Arc - "Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side voltages" - rectifier_tap_limits::MinMax - "Rectifier commutation reactance in p.u. ([`DEVICE_BASE`](@ref per_unit))" - rectifier_xrc::Float64 - "Minimum and maximum rectifier firing angle (α) (radians)" - rectifier_firing_angle::MinMax - "Minimum and maximum inverter tap limits as a ratio between the primary and secondary side voltages" - inverter_tap_limits::MinMax - "Inverter commutation reactance in p.u. ([`DEVICE_BASE`](@ref per_unit))" - inverter_xrc::Float64 - "Minimum and maximum inverter extinction angle (γ) (radians)" - inverter_extinction_angle::MinMax - "Services that this device contributes to" - services::Vector{Service} - "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." - ext::Dict{String, Any} - "(**Do not modify.**) PowerSystems.jl internal reference" - internal::InfrastructureSystemsInternal -end - -function TwoTerminalVSCDCLine(name, available, active_power_flow, arc, rectifier_tap_limits, rectifier_xrc, rectifier_firing_angle, inverter_tap_limits, inverter_xrc, inverter_extinction_angle, services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalVSCDCLine(name, available, active_power_flow, arc, rectifier_tap_limits, rectifier_xrc, rectifier_firing_angle, inverter_tap_limits, inverter_xrc, inverter_extinction_angle, services, ext, InfrastructureSystemsInternal(), ) -end - -function TwoTerminalVSCDCLine(; name, available, active_power_flow, arc, rectifier_tap_limits, rectifier_xrc, rectifier_firing_angle, inverter_tap_limits, inverter_xrc, inverter_extinction_angle, services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalVSCDCLine(name, available, active_power_flow, arc, rectifier_tap_limits, rectifier_xrc, rectifier_firing_angle, inverter_tap_limits, inverter_xrc, inverter_extinction_angle, services, ext, internal, ) -end - -# Constructor for demo purposes; non-functional. -function TwoTerminalVSCDCLine(::Nothing) - TwoTerminalVSCDCLine(; - name="init", - available=false, - active_power_flow=0.0, - arc=Arc(ACBus(nothing), ACBus(nothing)), - rectifier_tap_limits=(min=0.0, max=0.0), - rectifier_xrc=0.0, - rectifier_firing_angle=(min=0.0, max=0.0), - inverter_tap_limits=(min=0.0, max=0.0), - inverter_xrc=0.0, - inverter_extinction_angle=(min=0.0, max=0.0), - services=Device[], - ext=Dict{String, Any}(), - ) -end - -"""Get [`TwoTerminalVSCDCLine`](@ref) `name`.""" -get_name(value::TwoTerminalVSCDCLine) = value.name -"""Get [`TwoTerminalVSCDCLine`](@ref) `available`.""" -get_available(value::TwoTerminalVSCDCLine) = value.available -"""Get [`TwoTerminalVSCDCLine`](@ref) `active_power_flow`.""" -get_active_power_flow(value::TwoTerminalVSCDCLine) = get_value(value, value.active_power_flow) -"""Get [`TwoTerminalVSCDCLine`](@ref) `arc`.""" -get_arc(value::TwoTerminalVSCDCLine) = value.arc -"""Get [`TwoTerminalVSCDCLine`](@ref) `rectifier_tap_limits`.""" -get_rectifier_tap_limits(value::TwoTerminalVSCDCLine) = value.rectifier_tap_limits -"""Get [`TwoTerminalVSCDCLine`](@ref) `rectifier_xrc`.""" -get_rectifier_xrc(value::TwoTerminalVSCDCLine) = value.rectifier_xrc -"""Get [`TwoTerminalVSCDCLine`](@ref) `rectifier_firing_angle`.""" -get_rectifier_firing_angle(value::TwoTerminalVSCDCLine) = value.rectifier_firing_angle -"""Get [`TwoTerminalVSCDCLine`](@ref) `inverter_tap_limits`.""" -get_inverter_tap_limits(value::TwoTerminalVSCDCLine) = value.inverter_tap_limits -"""Get [`TwoTerminalVSCDCLine`](@ref) `inverter_xrc`.""" -get_inverter_xrc(value::TwoTerminalVSCDCLine) = value.inverter_xrc -"""Get [`TwoTerminalVSCDCLine`](@ref) `inverter_extinction_angle`.""" -get_inverter_extinction_angle(value::TwoTerminalVSCDCLine) = value.inverter_extinction_angle -"""Get [`TwoTerminalVSCDCLine`](@ref) `services`.""" -get_services(value::TwoTerminalVSCDCLine) = value.services -"""Get [`TwoTerminalVSCDCLine`](@ref) `ext`.""" -get_ext(value::TwoTerminalVSCDCLine) = value.ext -"""Get [`TwoTerminalVSCDCLine`](@ref) `internal`.""" -get_internal(value::TwoTerminalVSCDCLine) = value.internal - -"""Set [`TwoTerminalVSCDCLine`](@ref) `available`.""" -set_available!(value::TwoTerminalVSCDCLine, val) = value.available = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `active_power_flow`.""" -set_active_power_flow!(value::TwoTerminalVSCDCLine, val) = value.active_power_flow = set_value(value, val) -"""Set [`TwoTerminalVSCDCLine`](@ref) `arc`.""" -set_arc!(value::TwoTerminalVSCDCLine, val) = value.arc = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `rectifier_tap_limits`.""" -set_rectifier_tap_limits!(value::TwoTerminalVSCDCLine, val) = value.rectifier_tap_limits = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `rectifier_xrc`.""" -set_rectifier_xrc!(value::TwoTerminalVSCDCLine, val) = value.rectifier_xrc = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `rectifier_firing_angle`.""" -set_rectifier_firing_angle!(value::TwoTerminalVSCDCLine, val) = value.rectifier_firing_angle = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `inverter_tap_limits`.""" -set_inverter_tap_limits!(value::TwoTerminalVSCDCLine, val) = value.inverter_tap_limits = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `inverter_xrc`.""" -set_inverter_xrc!(value::TwoTerminalVSCDCLine, val) = value.inverter_xrc = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `inverter_extinction_angle`.""" -set_inverter_extinction_angle!(value::TwoTerminalVSCDCLine, val) = value.inverter_extinction_angle = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `services`.""" -set_services!(value::TwoTerminalVSCDCLine, val) = value.services = val -"""Set [`TwoTerminalVSCDCLine`](@ref) `ext`.""" -set_ext!(value::TwoTerminalVSCDCLine, val) = value.ext = val From f13f6e82632e4d4d706047944ed0e9720b6b56c8 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 21 Jan 2025 17:00:28 -0800 Subject: [PATCH 10/21] update LCC struct --- src/PowerSystems.jl | 3 +- src/descriptors/power_system_structs.json | 213 ++++++++++-- src/models/generated/TwoTerminalLCCLine.jl | 371 +++++++++++++++++++++ src/models/generated/includes.jl | 58 +++- 4 files changed, 614 insertions(+), 31 deletions(-) create mode 100644 src/models/generated/TwoTerminalLCCLine.jl diff --git a/src/PowerSystems.jl b/src/PowerSystems.jl index e57e448ff1..0693ce38fe 100644 --- a/src/PowerSystems.jl +++ b/src/PowerSystems.jl @@ -34,9 +34,8 @@ export Line export MonitoredLine export DCBranch export TwoTerminalHVDCLine -# TODO: Remove VSCDC Line for PSY 5.0 -export TwoTerminalVSCDCLine export TwoTerminalVSCLine +export TwoTerminalLCCLine export TModelHVDCLine export Transformer2W export TapTransformer diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 93eaf1e000..1a65a9e36c 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1229,8 +1229,8 @@ "supertype": "ACBranch" }, { - "struct_name": "TwoTerminalVSCDCLine", - "docstring": "A Voltage Sourced Converter (VSC)-HVDC transmission line.\n\nAs implemented in [\"Power System Modelling and Scripting\"](https://link.springer.com/book/10.1007/978-3-642-13669-6) by Federico Milano, Chapter 18, Page 397. This model is suitable for dynamic simulations", + "struct_name": "TwoTerminalLCCLine", + "docstring": "A Non-Capacitor Line Commutated Converter (LCC)-HVDC transmission line.\n\nAs implemented in PSS/E.", "fields": [ { "null_value": "init", @@ -1245,6 +1245,12 @@ "comment": "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations", "data_type": "Bool" }, + { + "null_value": "Arc(ACBus(nothing), ACBus(nothing))", + "name": "arc", + "comment": "An [`Arc`](@ref) defining this line `from` a rectifier bus `to` an inverter bus. The rectifier bus must be specified in the `from` bus and inverter bus in the `to` bus.", + "data_type": "Arc" + }, { "name": "active_power_flow", "comment": "Initial condition of active power flow on the line (MW)", @@ -1253,46 +1259,213 @@ "needs_conversion": true }, { - "null_value": "Arc(ACBus(nothing), ACBus(nothing))", - "name": "arc", - "comment": "An [`Arc`](@ref) defining this line `from` a bus `to` another bus", - "data_type": "Arc" + "name": "transfer_setpoint", + "comment": "Desired set-point of power. If `power_mode = true` this value is in MW units, and if `power_mode = false` is in Amperes units. This parameter must not be specified in per-unit. A positive value represents the desired consumed power at the rectifier bus, while a negative value represents the desired power at the inverter bus (i.e. the absolute value of `transfer_setpoint` is the generated power at the inverter bus).", + "null_value": "0.0", + "data_type": "Float64" }, { - "name": "rectifier_tap_limits", - "comment": "Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side voltages", + "name": "scheduled_dc_voltage", + "comment": "Scheduled compounded DC voltage in kV. By default this parameter is the scheduled DC voltage in the inverter bus This parameter must not be specified in per-unit.", + "null_value": "0.0", + "data_type": "Float64" + }, + { + "name": "rectifier_bridges", + "comment": "Number of bridges in series in the rectifier side.", + "null_value": "0", + "data_type": "Int" + }, + { + "name": "rectifier_delay_angle_limits", + "comment": "Minimum and maximum rectifier firing delay angle (α) (radians)", "null_value": "(min=0.0, max=0.0)", "data_type": "MinMax" }, { - "name": "rectifier_xrc", - "comment": "Rectifier commutation reactance in p.u. ([`DEVICE_BASE`](@ref per_unit))", + "name": "rectifier_rc", + "comment": "Rectifier commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))", + "null_value": "0.0", + "data_type": "Float64" + }, + { + "name": "rectifier_xc", + "comment": "Rectifier commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))", + "null_value": "0.0", + "data_type": "Float64" + }, + { + "name": "rectifier_base_voltage", + "comment": "Rectifier primary base AC voltage in kV, entered in kV.", "null_value": "0.0", "data_type": "Float64" }, { - "name": "rectifier_firing_angle", - "comment": "Minimum and maximum rectifier firing angle (α) (radians)", + "name": "inverter_bridges", + "comment": "Number of bridges in series in the inverter side.", + "null_value": "0", + "data_type": "Int" + }, + { + "name": "inverter_margin_angle_limits", + "comment": "Minimum and maximum inverter margin angle (γ) (radians)", "null_value": "(min=0.0, max=0.0)", "data_type": "MinMax" }, + { + "name": "inverter_rc", + "comment": "Inverter commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))", + "null_value": "0.0", + "data_type": "Float64" + }, + { + "name": "inverter_xc", + "comment": "Inverter commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))", + "null_value": "0.0", + "data_type": "Float64" + }, + { + "name": "inverter_base_voltage", + "comment": "Inverter primary base AC voltage in kV, entered in kV.", + "null_value": "0.0", + "data_type": "Float64" + }, + { + "name": "power_mode", + "data_type": "Bool", + "comment": "Boolean flag to identify if the LCC line is in power mode or current mode. If `power_mode = true`, setpoint values must be specified in MW, and if `power_mode = false` setpoint values must be specified in Amperes.", + "null_value": "false", + "default": "true" + }, + { + "name": "switch_mode_voltage", + "data_type": "Float64", + "comment": "Mode switch DC voltage, in kV. This parameter must not be added in per-unit. If LCC line is in power mode control, and DC voltage falls below this value, the line switch to current mode control.", + "null_value": "0.0", + "default": "0.0" + }, + { + "name": "compounding_resistance", + "data_type": "Float64", + "comment": "Compounding Resistance Mode switch DC voltage, in kV. This parameter must not be added in per-unit. If LCC line is in power mode control, and DC voltage falls below this value, the line switch to current mode control.", + "null_value": "0.0", + "default": "0.0" + }, + { + "name": "min_compounding_voltage", + "data_type": "Float64", + "comment": "Minimum compounded voltage, in kV. This parameter must not be added in per-unit. Only used in constant gamma operation (γ_min = γ_max), and the AC transformer is used to control the DC voltage.", + "null_value": "0.0", + "default": "0.0" + }, + { + "name": "rectifier_transformer_ratio", + "comment": "Rectifier transformer ratio between the primary and secondary side AC voltages.", + "null_value": "0.0", + "data_type": "Float64", + "default": "1.0" + }, + { + "name": "rectifier_tap_setting", + "comment": "Rectifier transformer tap setting.", + "null_value": "0.0", + "data_type": "Float64", + "default": "1.0" + }, + { + "name": "rectifier_tap_limits", + "comment": "Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side AC voltages.", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "default": "(min=0.51, max=1.5)" + }, + { + "name": "rectifier_tap_step", + "comment": "Rectifier transformer tap setting.", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.00625" + }, + { + "name": "rectifier_delay_angle", + "comment": "Rectifier firing delay angle (α).", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.0" + }, + { + "name": "inverter_transformer_ratio", + "comment": "Inverter transformer ratio between the primary and secondary side AC voltages.", + "null_value": "0.0", + "data_type": "Float64", + "default": "1.0" + }, + { + "name": "inverter_tap_setting", + "comment": "Inverter transformer tap setting.", + "null_value": "0.0", + "data_type": "Float64", + "default": "1.0" + }, { "name": "inverter_tap_limits", - "comment": "Minimum and maximum inverter tap limits as a ratio between the primary and secondary side voltages", + "comment": "Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages.", "null_value": "(min=0.0, max=0.0)", - "data_type": "MinMax" + "data_type": "MinMax", + "default": "(min=0.51, max=1.5)" }, { - "name": "inverter_xrc", - "comment": "Inverter commutation reactance in p.u. ([`DEVICE_BASE`](@ref per_unit))", + "name": "inverter_tap_step", + "comment": "Inverter transformer tap setting.", "null_value": "0.0", - "data_type": "Float64" + "data_type": "Float64", + "default": "0.00625" }, { - "name": "inverter_extinction_angle", - "comment": "Minimum and maximum inverter extinction angle (γ) (radians)", + "name": "inverter_margin_angle", + "comment": "Rectifier margin angle (γ).", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.0" + }, + { + "name": "active_power_limits_from", + "comment": "Minimum and maximum active power flows to the FROM node (MW)", "null_value": "(min=0.0, max=0.0)", - "data_type": "MinMax" + "data_type": "MinMax", + "needs_conversion": true, + "default": "(min=0.0, max=0.0)" + }, + { + "name": "active_power_limits_to", + "comment": "Minimum and maximum active power flows to the TO node (MW)", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "needs_conversion": true, + "default": "(min=0.0, max=0.0)" + }, + { + "name": "reactive_power_limits_from", + "comment": "Minimum and maximum reactive power limits to the FROM node (MVAR)", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "needs_conversion": true, + "default": "(min=0.0, max=0.0)" + }, + { + "name": "reactive_power_limits_to", + "comment": "Minimum and maximum reactive power limits to the TO node (MVAR)", + "null_value": "(min=0.0, max=0.0)", + "data_type": "MinMax", + "needs_conversion": true, + "default": "(min=0.0, max=0.0)" + }, + { + "name": "loss", + "comment": "A generic loss model coefficients. It accepts a linear model with a constant loss (MW) and a proportional loss rate (MW of loss per MW of flow). It also accepts a Piecewise loss, with N segments to specify different proportional losses for different segments.", + "null_value": "LinearCurve(0.0)", + "data_type": "Union{LinearCurve, PiecewiseIncrementalCurve}", + "default": "LinearCurve(0.0)" }, { "name": "services", diff --git a/src/models/generated/TwoTerminalLCCLine.jl b/src/models/generated/TwoTerminalLCCLine.jl new file mode 100644 index 0000000000..cdef2e2a54 --- /dev/null +++ b/src/models/generated/TwoTerminalLCCLine.jl @@ -0,0 +1,371 @@ +#= +This file is auto-generated. Do not edit. +=# + +#! format: off + +""" + mutable struct TwoTerminalLCCLine <: ACBranch + name::String + available::Bool + arc::Arc + active_power_flow::Float64 + transfer_setpoint::Float64 + scheduled_dc_voltage::Float64 + rectifier_bridges::Int + rectifier_delay_angle_limits::MinMax + rectifier_rc::Float64 + rectifier_xc::Float64 + rectifier_base_voltage::Float64 + inverter_bridges::Int + inverter_margin_angle_limits::MinMax + inverter_rc::Float64 + inverter_xc::Float64 + inverter_base_voltage::Float64 + power_mode::Bool + switch_mode_voltage::Float64 + compounding_resistance::Float64 + min_compounding_voltage::Float64 + rectifier_transformer_ratio::Float64 + rectifier_tap_setting::Float64 + rectifier_tap_limits::MinMax + rectifier_tap_step::Float64 + rectifier_delay_angle::Float64 + inverter_transformer_ratio::Float64 + inverter_tap_setting::Float64 + inverter_tap_limits::MinMax + inverter_tap_step::Float64 + inverter_margin_angle::Float64 + active_power_limits_from::MinMax + active_power_limits_to::MinMax + reactive_power_limits_from::MinMax + reactive_power_limits_to::MinMax + loss::Union{LinearCurve, PiecewiseIncrementalCurve} + services::Vector{Service} + ext::Dict{String, Any} + internal::InfrastructureSystemsInternal + end + +A Non-Capacitor Line Commutated Converter (LCC)-HVDC transmission line. + +As implemented in PSS/E. + +# Arguments +- `name::String`: Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name +- `available::Bool`: Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations +- `arc::Arc`: An [`Arc`](@ref) defining this line `from` a rectifier bus `to` an inverter bus. The rectifier bus must be specified in the `from` bus and inverter bus in the `to` bus. +- `active_power_flow::Float64`: Initial condition of active power flow on the line (MW) +- `transfer_setpoint::Float64`: Desired set-point of power. If `power_mode = true` this value is in MW units, and if `power_mode = false` is in Amperes units. This parameter must not be specified in per-unit. A positive value represents the desired consumed power at the rectifier bus, while a negative value represents the desired power at the inverter bus (i.e. the absolute value of `transfer_setpoint` is the generated power at the inverter bus). +- `scheduled_dc_voltage::Float64`: Scheduled compounded DC voltage in kV. By default this parameter is the scheduled DC voltage in the inverter bus This parameter must not be specified in per-unit. +- `rectifier_bridges::Int`: Number of bridges in series in the rectifier side. +- `rectifier_delay_angle_limits::MinMax`: Minimum and maximum rectifier firing delay angle (α) (radians) +- `rectifier_rc::Float64`: Rectifier commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) +- `rectifier_xc::Float64`: Rectifier commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) +- `rectifier_base_voltage::Float64`: Rectifier primary base AC voltage in kV, entered in kV. +- `inverter_bridges::Int`: Number of bridges in series in the inverter side. +- `inverter_margin_angle_limits::MinMax`: Minimum and maximum inverter margin angle (γ) (radians) +- `inverter_rc::Float64`: Inverter commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) +- `inverter_xc::Float64`: Inverter commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) +- `inverter_base_voltage::Float64`: Inverter primary base AC voltage in kV, entered in kV. +- `power_mode::Bool`: (default: `true`) Boolean flag to identify if the LCC line is in power mode or current mode. If `power_mode = true`, setpoint values must be specified in MW, and if `power_mode = false` setpoint values must be specified in Amperes. +- `switch_mode_voltage::Float64`: (default: `0.0`) Mode switch DC voltage, in kV. This parameter must not be added in per-unit. If LCC line is in power mode control, and DC voltage falls below this value, the line switch to current mode control. +- `compounding_resistance::Float64`: (default: `0.0`) Compounding Resistance Mode switch DC voltage, in kV. This parameter must not be added in per-unit. If LCC line is in power mode control, and DC voltage falls below this value, the line switch to current mode control. +- `min_compounding_voltage::Float64`: (default: `0.0`) Minimum compounded voltage, in kV. This parameter must not be added in per-unit. Only used in constant gamma operation (γ_min = γ_max), and the AC transformer is used to control the DC voltage. +- `rectifier_transformer_ratio::Float64`: (default: `1.0`) Rectifier transformer ratio between the primary and secondary side AC voltages. +- `rectifier_tap_setting::Float64`: (default: `1.0`) Rectifier transformer tap setting. +- `rectifier_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side AC voltages. +- `rectifier_tap_step::Float64`: (default: `0.00625`) Rectifier transformer tap setting. +- `rectifier_delay_angle::Float64`: (default: `0.0`) Rectifier firing delay angle (α). +- `inverter_transformer_ratio::Float64`: (default: `1.0`) Inverter transformer ratio between the primary and secondary side AC voltages. +- `inverter_tap_setting::Float64`: (default: `1.0`) Inverter transformer tap setting. +- `inverter_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages. +- `inverter_tap_step::Float64`: (default: `0.00625`) Inverter transformer tap setting. +- `inverter_margin_angle::Float64`: (default: `0.0`) Rectifier margin angle (γ). +- `active_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the FROM node (MW) +- `active_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the TO node (MW) +- `reactive_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum reactive power limits to the FROM node (MVAR) +- `reactive_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum reactive power limits to the TO node (MVAR) +- `loss::Union{LinearCurve, PiecewiseIncrementalCurve}`: (default: `LinearCurve(0.0)`) A generic loss model coefficients. It accepts a linear model with a constant loss (MW) and a proportional loss rate (MW of loss per MW of flow). It also accepts a Piecewise loss, with N segments to specify different proportional losses for different segments. +- `services::Vector{Service}`: (default: `Device[]`) Services that this device contributes to +- `ext::Dict{String, Any}`: (default: `Dict{String, Any}()`) An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude. +- `internal::InfrastructureSystemsInternal`: (**Do not modify.**) PowerSystems.jl internal reference +""" +mutable struct TwoTerminalLCCLine <: ACBranch + "Name of the component. Components of the same type (e.g., `PowerLoad`) must have unique names, but components of different types (e.g., `PowerLoad` and `ACBus`) can have the same name" + name::String + "Indicator of whether the component is connected and online (`true`) or disconnected, offline, or down (`false`). Unavailable components are excluded during simulations" + available::Bool + "An [`Arc`](@ref) defining this line `from` a rectifier bus `to` an inverter bus. The rectifier bus must be specified in the `from` bus and inverter bus in the `to` bus." + arc::Arc + "Initial condition of active power flow on the line (MW)" + active_power_flow::Float64 + "Desired set-point of power. If `power_mode = true` this value is in MW units, and if `power_mode = false` is in Amperes units. This parameter must not be specified in per-unit. A positive value represents the desired consumed power at the rectifier bus, while a negative value represents the desired power at the inverter bus (i.e. the absolute value of `transfer_setpoint` is the generated power at the inverter bus)." + transfer_setpoint::Float64 + "Scheduled compounded DC voltage in kV. By default this parameter is the scheduled DC voltage in the inverter bus This parameter must not be specified in per-unit." + scheduled_dc_voltage::Float64 + "Number of bridges in series in the rectifier side." + rectifier_bridges::Int + "Minimum and maximum rectifier firing delay angle (α) (radians)" + rectifier_delay_angle_limits::MinMax + "Rectifier commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))" + rectifier_rc::Float64 + "Rectifier commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))" + rectifier_xc::Float64 + "Rectifier primary base AC voltage in kV, entered in kV." + rectifier_base_voltage::Float64 + "Number of bridges in series in the inverter side." + inverter_bridges::Int + "Minimum and maximum inverter margin angle (γ) (radians)" + inverter_margin_angle_limits::MinMax + "Inverter commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))" + inverter_rc::Float64 + "Inverter commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))" + inverter_xc::Float64 + "Inverter primary base AC voltage in kV, entered in kV." + inverter_base_voltage::Float64 + "Boolean flag to identify if the LCC line is in power mode or current mode. If `power_mode = true`, setpoint values must be specified in MW, and if `power_mode = false` setpoint values must be specified in Amperes." + power_mode::Bool + "Mode switch DC voltage, in kV. This parameter must not be added in per-unit. If LCC line is in power mode control, and DC voltage falls below this value, the line switch to current mode control." + switch_mode_voltage::Float64 + "Compounding Resistance Mode switch DC voltage, in kV. This parameter must not be added in per-unit. If LCC line is in power mode control, and DC voltage falls below this value, the line switch to current mode control." + compounding_resistance::Float64 + "Minimum compounded voltage, in kV. This parameter must not be added in per-unit. Only used in constant gamma operation (γ_min = γ_max), and the AC transformer is used to control the DC voltage." + min_compounding_voltage::Float64 + "Rectifier transformer ratio between the primary and secondary side AC voltages." + rectifier_transformer_ratio::Float64 + "Rectifier transformer tap setting." + rectifier_tap_setting::Float64 + "Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side AC voltages." + rectifier_tap_limits::MinMax + "Rectifier transformer tap setting." + rectifier_tap_step::Float64 + "Rectifier firing delay angle (α)." + rectifier_delay_angle::Float64 + "Inverter transformer ratio between the primary and secondary side AC voltages." + inverter_transformer_ratio::Float64 + "Inverter transformer tap setting." + inverter_tap_setting::Float64 + "Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages." + inverter_tap_limits::MinMax + "Inverter transformer tap setting." + inverter_tap_step::Float64 + "Rectifier margin angle (γ)." + inverter_margin_angle::Float64 + "Minimum and maximum active power flows to the FROM node (MW)" + active_power_limits_from::MinMax + "Minimum and maximum active power flows to the TO node (MW)" + active_power_limits_to::MinMax + "Minimum and maximum reactive power limits to the FROM node (MVAR)" + reactive_power_limits_from::MinMax + "Minimum and maximum reactive power limits to the TO node (MVAR)" + reactive_power_limits_to::MinMax + "A generic loss model coefficients. It accepts a linear model with a constant loss (MW) and a proportional loss rate (MW of loss per MW of flow). It also accepts a Piecewise loss, with N segments to specify different proportional losses for different segments." + loss::Union{LinearCurve, PiecewiseIncrementalCurve} + "Services that this device contributes to" + services::Vector{Service} + "An [*ext*ra dictionary](@ref additional_fields) for users to add metadata that are not used in simulation, such as latitude and longitude." + ext::Dict{String, Any} + "(**Do not modify.**) PowerSystems.jl internal reference" + internal::InfrastructureSystemsInternal +end + +function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_margin_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_margin_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) +end + +function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_margin_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_margin_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) +end + +# Constructor for demo purposes; non-functional. +function TwoTerminalLCCLine(::Nothing) + TwoTerminalLCCLine(; + name="init", + available=false, + arc=Arc(ACBus(nothing), ACBus(nothing)), + active_power_flow=0.0, + transfer_setpoint=0.0, + scheduled_dc_voltage=0.0, + rectifier_bridges=0, + rectifier_delay_angle_limits=(min=0.0, max=0.0), + rectifier_rc=0.0, + rectifier_xc=0.0, + rectifier_base_voltage=0.0, + inverter_bridges=0, + inverter_margin_angle_limits=(min=0.0, max=0.0), + inverter_rc=0.0, + inverter_xc=0.0, + inverter_base_voltage=0.0, + power_mode=false, + switch_mode_voltage=0.0, + compounding_resistance=0.0, + min_compounding_voltage=0.0, + rectifier_transformer_ratio=0.0, + rectifier_tap_setting=0.0, + rectifier_tap_limits=(min=0.0, max=0.0), + rectifier_tap_step=0.0, + rectifier_delay_angle=0.0, + inverter_transformer_ratio=0.0, + inverter_tap_setting=0.0, + inverter_tap_limits=(min=0.0, max=0.0), + inverter_tap_step=0.0, + inverter_margin_angle=0.0, + active_power_limits_from=(min=0.0, max=0.0), + active_power_limits_to=(min=0.0, max=0.0), + reactive_power_limits_from=(min=0.0, max=0.0), + reactive_power_limits_to=(min=0.0, max=0.0), + loss=LinearCurve(0.0), + services=Device[], + ext=Dict{String, Any}(), + ) +end + +"""Get [`TwoTerminalLCCLine`](@ref) `name`.""" +get_name(value::TwoTerminalLCCLine) = value.name +"""Get [`TwoTerminalLCCLine`](@ref) `available`.""" +get_available(value::TwoTerminalLCCLine) = value.available +"""Get [`TwoTerminalLCCLine`](@ref) `arc`.""" +get_arc(value::TwoTerminalLCCLine) = value.arc +"""Get [`TwoTerminalLCCLine`](@ref) `active_power_flow`.""" +get_active_power_flow(value::TwoTerminalLCCLine) = get_value(value, value.active_power_flow) +"""Get [`TwoTerminalLCCLine`](@ref) `transfer_setpoint`.""" +get_transfer_setpoint(value::TwoTerminalLCCLine) = value.transfer_setpoint +"""Get [`TwoTerminalLCCLine`](@ref) `scheduled_dc_voltage`.""" +get_scheduled_dc_voltage(value::TwoTerminalLCCLine) = value.scheduled_dc_voltage +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_bridges`.""" +get_rectifier_bridges(value::TwoTerminalLCCLine) = value.rectifier_bridges +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_delay_angle_limits`.""" +get_rectifier_delay_angle_limits(value::TwoTerminalLCCLine) = value.rectifier_delay_angle_limits +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_rc`.""" +get_rectifier_rc(value::TwoTerminalLCCLine) = value.rectifier_rc +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_xc`.""" +get_rectifier_xc(value::TwoTerminalLCCLine) = value.rectifier_xc +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_base_voltage`.""" +get_rectifier_base_voltage(value::TwoTerminalLCCLine) = value.rectifier_base_voltage +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_bridges`.""" +get_inverter_bridges(value::TwoTerminalLCCLine) = value.inverter_bridges +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle_limits`.""" +get_inverter_margin_angle_limits(value::TwoTerminalLCCLine) = value.inverter_margin_angle_limits +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_rc`.""" +get_inverter_rc(value::TwoTerminalLCCLine) = value.inverter_rc +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_xc`.""" +get_inverter_xc(value::TwoTerminalLCCLine) = value.inverter_xc +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_base_voltage`.""" +get_inverter_base_voltage(value::TwoTerminalLCCLine) = value.inverter_base_voltage +"""Get [`TwoTerminalLCCLine`](@ref) `power_mode`.""" +get_power_mode(value::TwoTerminalLCCLine) = value.power_mode +"""Get [`TwoTerminalLCCLine`](@ref) `switch_mode_voltage`.""" +get_switch_mode_voltage(value::TwoTerminalLCCLine) = value.switch_mode_voltage +"""Get [`TwoTerminalLCCLine`](@ref) `compounding_resistance`.""" +get_compounding_resistance(value::TwoTerminalLCCLine) = value.compounding_resistance +"""Get [`TwoTerminalLCCLine`](@ref) `min_compounding_voltage`.""" +get_min_compounding_voltage(value::TwoTerminalLCCLine) = value.min_compounding_voltage +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_transformer_ratio`.""" +get_rectifier_transformer_ratio(value::TwoTerminalLCCLine) = value.rectifier_transformer_ratio +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_tap_setting`.""" +get_rectifier_tap_setting(value::TwoTerminalLCCLine) = value.rectifier_tap_setting +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_tap_limits`.""" +get_rectifier_tap_limits(value::TwoTerminalLCCLine) = value.rectifier_tap_limits +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_tap_step`.""" +get_rectifier_tap_step(value::TwoTerminalLCCLine) = value.rectifier_tap_step +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_delay_angle`.""" +get_rectifier_delay_angle(value::TwoTerminalLCCLine) = value.rectifier_delay_angle +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_transformer_ratio`.""" +get_inverter_transformer_ratio(value::TwoTerminalLCCLine) = value.inverter_transformer_ratio +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_tap_setting`.""" +get_inverter_tap_setting(value::TwoTerminalLCCLine) = value.inverter_tap_setting +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_tap_limits`.""" +get_inverter_tap_limits(value::TwoTerminalLCCLine) = value.inverter_tap_limits +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_tap_step`.""" +get_inverter_tap_step(value::TwoTerminalLCCLine) = value.inverter_tap_step +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle`.""" +get_inverter_margin_angle(value::TwoTerminalLCCLine) = value.inverter_margin_angle +"""Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" +get_active_power_limits_from(value::TwoTerminalLCCLine) = get_value(value, value.active_power_limits_from) +"""Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" +get_active_power_limits_to(value::TwoTerminalLCCLine) = get_value(value, value.active_power_limits_to) +"""Get [`TwoTerminalLCCLine`](@ref) `reactive_power_limits_from`.""" +get_reactive_power_limits_from(value::TwoTerminalLCCLine) = get_value(value, value.reactive_power_limits_from) +"""Get [`TwoTerminalLCCLine`](@ref) `reactive_power_limits_to`.""" +get_reactive_power_limits_to(value::TwoTerminalLCCLine) = get_value(value, value.reactive_power_limits_to) +"""Get [`TwoTerminalLCCLine`](@ref) `loss`.""" +get_loss(value::TwoTerminalLCCLine) = value.loss +"""Get [`TwoTerminalLCCLine`](@ref) `services`.""" +get_services(value::TwoTerminalLCCLine) = value.services +"""Get [`TwoTerminalLCCLine`](@ref) `ext`.""" +get_ext(value::TwoTerminalLCCLine) = value.ext +"""Get [`TwoTerminalLCCLine`](@ref) `internal`.""" +get_internal(value::TwoTerminalLCCLine) = value.internal + +"""Set [`TwoTerminalLCCLine`](@ref) `available`.""" +set_available!(value::TwoTerminalLCCLine, val) = value.available = val +"""Set [`TwoTerminalLCCLine`](@ref) `arc`.""" +set_arc!(value::TwoTerminalLCCLine, val) = value.arc = val +"""Set [`TwoTerminalLCCLine`](@ref) `active_power_flow`.""" +set_active_power_flow!(value::TwoTerminalLCCLine, val) = value.active_power_flow = set_value(value, val) +"""Set [`TwoTerminalLCCLine`](@ref) `transfer_setpoint`.""" +set_transfer_setpoint!(value::TwoTerminalLCCLine, val) = value.transfer_setpoint = val +"""Set [`TwoTerminalLCCLine`](@ref) `scheduled_dc_voltage`.""" +set_scheduled_dc_voltage!(value::TwoTerminalLCCLine, val) = value.scheduled_dc_voltage = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_bridges`.""" +set_rectifier_bridges!(value::TwoTerminalLCCLine, val) = value.rectifier_bridges = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_delay_angle_limits`.""" +set_rectifier_delay_angle_limits!(value::TwoTerminalLCCLine, val) = value.rectifier_delay_angle_limits = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_rc`.""" +set_rectifier_rc!(value::TwoTerminalLCCLine, val) = value.rectifier_rc = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_xc`.""" +set_rectifier_xc!(value::TwoTerminalLCCLine, val) = value.rectifier_xc = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_base_voltage`.""" +set_rectifier_base_voltage!(value::TwoTerminalLCCLine, val) = value.rectifier_base_voltage = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_bridges`.""" +set_inverter_bridges!(value::TwoTerminalLCCLine, val) = value.inverter_bridges = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle_limits`.""" +set_inverter_margin_angle_limits!(value::TwoTerminalLCCLine, val) = value.inverter_margin_angle_limits = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_rc`.""" +set_inverter_rc!(value::TwoTerminalLCCLine, val) = value.inverter_rc = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_xc`.""" +set_inverter_xc!(value::TwoTerminalLCCLine, val) = value.inverter_xc = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_base_voltage`.""" +set_inverter_base_voltage!(value::TwoTerminalLCCLine, val) = value.inverter_base_voltage = val +"""Set [`TwoTerminalLCCLine`](@ref) `power_mode`.""" +set_power_mode!(value::TwoTerminalLCCLine, val) = value.power_mode = val +"""Set [`TwoTerminalLCCLine`](@ref) `switch_mode_voltage`.""" +set_switch_mode_voltage!(value::TwoTerminalLCCLine, val) = value.switch_mode_voltage = val +"""Set [`TwoTerminalLCCLine`](@ref) `compounding_resistance`.""" +set_compounding_resistance!(value::TwoTerminalLCCLine, val) = value.compounding_resistance = val +"""Set [`TwoTerminalLCCLine`](@ref) `min_compounding_voltage`.""" +set_min_compounding_voltage!(value::TwoTerminalLCCLine, val) = value.min_compounding_voltage = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_transformer_ratio`.""" +set_rectifier_transformer_ratio!(value::TwoTerminalLCCLine, val) = value.rectifier_transformer_ratio = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_tap_setting`.""" +set_rectifier_tap_setting!(value::TwoTerminalLCCLine, val) = value.rectifier_tap_setting = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_tap_limits`.""" +set_rectifier_tap_limits!(value::TwoTerminalLCCLine, val) = value.rectifier_tap_limits = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_tap_step`.""" +set_rectifier_tap_step!(value::TwoTerminalLCCLine, val) = value.rectifier_tap_step = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_delay_angle`.""" +set_rectifier_delay_angle!(value::TwoTerminalLCCLine, val) = value.rectifier_delay_angle = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_transformer_ratio`.""" +set_inverter_transformer_ratio!(value::TwoTerminalLCCLine, val) = value.inverter_transformer_ratio = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_tap_setting`.""" +set_inverter_tap_setting!(value::TwoTerminalLCCLine, val) = value.inverter_tap_setting = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_tap_limits`.""" +set_inverter_tap_limits!(value::TwoTerminalLCCLine, val) = value.inverter_tap_limits = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_tap_step`.""" +set_inverter_tap_step!(value::TwoTerminalLCCLine, val) = value.inverter_tap_step = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle`.""" +set_inverter_margin_angle!(value::TwoTerminalLCCLine, val) = value.inverter_margin_angle = val +"""Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" +set_active_power_limits_from!(value::TwoTerminalLCCLine, val) = value.active_power_limits_from = set_value(value, val) +"""Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" +set_active_power_limits_to!(value::TwoTerminalLCCLine, val) = value.active_power_limits_to = set_value(value, val) +"""Set [`TwoTerminalLCCLine`](@ref) `reactive_power_limits_from`.""" +set_reactive_power_limits_from!(value::TwoTerminalLCCLine, val) = value.reactive_power_limits_from = set_value(value, val) +"""Set [`TwoTerminalLCCLine`](@ref) `reactive_power_limits_to`.""" +set_reactive_power_limits_to!(value::TwoTerminalLCCLine, val) = value.reactive_power_limits_to = set_value(value, val) +"""Set [`TwoTerminalLCCLine`](@ref) `loss`.""" +set_loss!(value::TwoTerminalLCCLine, val) = value.loss = val +"""Set [`TwoTerminalLCCLine`](@ref) `services`.""" +set_services!(value::TwoTerminalLCCLine, val) = value.services = val +"""Set [`TwoTerminalLCCLine`](@ref) `ext`.""" +set_ext!(value::TwoTerminalLCCLine, val) = value.ext = val diff --git a/src/models/generated/includes.jl b/src/models/generated/includes.jl index 642a970f26..410688e122 100644 --- a/src/models/generated/includes.jl +++ b/src/models/generated/includes.jl @@ -12,7 +12,7 @@ include("TapTransformer.jl") include("Transformer2W.jl") include("TwoTerminalHVDCLine.jl") include("TwoTerminalVSCLine.jl") -include("TwoTerminalVSCDCLine.jl") +include("TwoTerminalLCCLine.jl") include("TModelHVDCLine.jl") include("InterruptiblePowerLoad.jl") include("FixedAdmittance.jl") @@ -494,6 +494,7 @@ export get_bustype export get_c export get_c_dc export get_cf +export get_compounding_resistance export get_constant_active_power export get_constant_reactive_power export get_contributing_services @@ -558,9 +559,16 @@ export get_internal_voltage_coefficients export get_internal_voltage_frequencies export get_inv_d_fluxlink export get_inv_q_fluxlink -export get_inverter_extinction_angle +export get_inverter_base_voltage +export get_inverter_bridges +export get_inverter_margin_angle +export get_inverter_margin_angle_limits +export get_inverter_rc export get_inverter_tap_limits -export get_inverter_xrc +export get_inverter_tap_setting +export get_inverter_tap_step +export get_inverter_transformer_ratio +export get_inverter_xc export get_is_filter_differential export get_k1 export get_k2 @@ -600,6 +608,7 @@ export get_max_impedance_reactive_power export get_max_output_fraction export get_max_participation_factor export get_max_reactive_power +export get_min_compounding_voltage export get_must_run export get_n_states export get_name @@ -613,6 +622,7 @@ export get_peak_reactive_power export get_phase_angle_limits export get_power_factor export get_power_gate_openings +export get_power_mode export get_power_trajectory export get_primary_shunt export get_prime_mover_type @@ -633,9 +643,16 @@ export get_reactive_power_limits export get_reactive_power_limits_from export get_reactive_power_limits_pump export get_reactive_power_limits_to -export get_rectifier_firing_angle +export get_rectifier_base_voltage +export get_rectifier_bridges +export get_rectifier_delay_angle +export get_rectifier_delay_angle_limits +export get_rectifier_rc export get_rectifier_tap_limits -export get_rectifier_xrc +export get_rectifier_tap_setting +export get_rectifier_tap_step +export get_rectifier_transformer_ratio +export get_rectifier_xc export get_reg export get_remote_bus_control export get_remote_bus_control_1 @@ -646,6 +663,7 @@ export get_rg export get_rrpwr export get_rv export get_saturation_coeffs +export get_scheduled_dc_voltage export get_services export get_speed_error_signal export get_start_time_limits @@ -659,6 +677,7 @@ export get_storage_target export get_storage_technology_type export get_sustained_time export get_switch +export get_switch_mode_voltage export get_tF_delay export get_tV_delay export get_tap @@ -671,6 +690,7 @@ export get_time_limits_pump export get_to export get_to_area export get_to_branch_control +export get_transfer_setpoint export get_valve_position_limits export get_variable export get_vh_pnts @@ -1065,6 +1085,7 @@ export set_bustype! export set_c! export set_c_dc! export set_cf! +export set_compounding_resistance! export set_constant_active_power! export set_constant_reactive_power! export set_contributing_services! @@ -1129,9 +1150,16 @@ export set_internal_voltage_coefficients! export set_internal_voltage_frequencies! export set_inv_d_fluxlink! export set_inv_q_fluxlink! -export set_inverter_extinction_angle! +export set_inverter_base_voltage! +export set_inverter_bridges! +export set_inverter_margin_angle! +export set_inverter_margin_angle_limits! +export set_inverter_rc! export set_inverter_tap_limits! -export set_inverter_xrc! +export set_inverter_tap_setting! +export set_inverter_tap_step! +export set_inverter_transformer_ratio! +export set_inverter_xc! export set_is_filter_differential! export set_k1! export set_k2! @@ -1171,6 +1199,7 @@ export set_max_impedance_reactive_power! export set_max_output_fraction! export set_max_participation_factor! export set_max_reactive_power! +export set_min_compounding_voltage! export set_must_run! export set_n_states! export set_name! @@ -1184,6 +1213,7 @@ export set_peak_reactive_power! export set_phase_angle_limits! export set_power_factor! export set_power_gate_openings! +export set_power_mode! export set_power_trajectory! export set_primary_shunt! export set_prime_mover_type! @@ -1204,9 +1234,16 @@ export set_reactive_power_limits! export set_reactive_power_limits_from! export set_reactive_power_limits_pump! export set_reactive_power_limits_to! -export set_rectifier_firing_angle! +export set_rectifier_base_voltage! +export set_rectifier_bridges! +export set_rectifier_delay_angle! +export set_rectifier_delay_angle_limits! +export set_rectifier_rc! export set_rectifier_tap_limits! -export set_rectifier_xrc! +export set_rectifier_tap_setting! +export set_rectifier_tap_step! +export set_rectifier_transformer_ratio! +export set_rectifier_xc! export set_reg! export set_remote_bus_control! export set_remote_bus_control_1! @@ -1217,6 +1254,7 @@ export set_rg! export set_rrpwr! export set_rv! export set_saturation_coeffs! +export set_scheduled_dc_voltage! export set_services! export set_speed_error_signal! export set_start_time_limits! @@ -1230,6 +1268,7 @@ export set_storage_target! export set_storage_technology_type! export set_sustained_time! export set_switch! +export set_switch_mode_voltage! export set_tF_delay! export set_tV_delay! export set_tap! @@ -1242,6 +1281,7 @@ export set_time_limits_pump! export set_to! export set_to_area! export set_to_branch_control! +export set_transfer_setpoint! export set_valve_position_limits! export set_variable! export set_vh_pnts! From 22163bd4de813a09abcc183d74f5157298646641 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 21 Jan 2025 17:01:12 -0800 Subject: [PATCH 11/21] update conversion from VSCDC to LCC --- src/data_format_conversions.jl | 2 +- src/descriptors/power_system_inputs.json | 2 +- src/parsers/power_system_table_data.jl | 4 +++- src/parsers/powerflowdata_data.jl | 2 +- 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/data_format_conversions.jl b/src/data_format_conversions.jl index e939aa3993..d877546217 100644 --- a/src/data_format_conversions.jl +++ b/src/data_format_conversions.jl @@ -25,7 +25,7 @@ function _convert_data!( continue end if component["__metadata__"]["type"] == "VSCDCLine" - component["__metadata__"]["type"] = "TwoTerminalVSCDCLine" + component["__metadata__"]["type"] = "TwoTerminalLCCLine" continue end if haskey(component, "prime_mover") && haskey(component, "dynamic_injector") diff --git a/src/descriptors/power_system_inputs.json b/src/descriptors/power_system_inputs.json index 3a2ac9220e..0e2c0a73b6 100644 --- a/src/descriptors/power_system_inputs.json +++ b/src/descriptors/power_system_inputs.json @@ -175,7 +175,7 @@ { "name": "dc_line_category", "value_options": [ - "TwoTerminalVSCDCLine", + "TwoTerminalLCCLine", "TwoTerminalHVDCLine" ], "description": "Type of Struct", diff --git a/src/parsers/power_system_table_data.jl b/src/parsers/power_system_table_data.jl index 19a73cd030..c1b0442a06 100644 --- a/src/parsers/power_system_table_data.jl +++ b/src/parsers/power_system_table_data.jl @@ -481,6 +481,7 @@ function dc_branch_csv_parser!(sys::System, data::PowerSystemTableData) loss = loss, ) else + # TODO: Update this Table Data Parser rectifier_taplimits = ( min = dc_branch.rectifier_tap_limits_min, max = dc_branch.rectifier_tap_limits_max, @@ -496,7 +497,8 @@ function dc_branch_csv_parser!(sys::System, data::PowerSystemTableData) min = dc_branch.inverter_firing_angle_min, max = dc_branch.inverter_firing_angle_max, ) - value = TwoTerminalVSCDCLine(; + # TODO: Update this method + value = TwoTerminalLCCLine(; name = dc_branch.name, available = true, active_power_flow = pf, diff --git a/src/parsers/powerflowdata_data.jl b/src/parsers/powerflowdata_data.jl index d8a33aa147..85860e5eeb 100644 --- a/src/parsers/powerflowdata_data.jl +++ b/src/parsers/powerflowdata_data.jl @@ -781,7 +781,7 @@ function read_dcline!( ) return end - +# TODO: Update PowerFlowData to change VSCDC to LCC function read_dcline!( sys::System, data::PowerFlowData.VSCDCLines, From 46d8318c46596f166940adbb4e8b08036e88f66d Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 21 Jan 2025 17:01:20 -0800 Subject: [PATCH 12/21] update docs of VSCDC to LCC --- docs/src/api/glossary.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/docs/src/api/glossary.md b/docs/src/api/glossary.md index 6dd40f2ca7..dd6634754e 100644 --- a/docs/src/api/glossary.md +++ b/docs/src/api/glossary.md @@ -67,6 +67,10 @@ [`Time Series Data`](@ref ts_data). - *IPC*: Interconnecting power converter +### L + + - *LCC*: Line Commutated Converter HVDC line + ### O - *OEL*: Over Excitation Limiter @@ -114,8 +118,6 @@ ### V - - *VSCDCLine*: Voltage-Source Converter Direct Current Line - - *VSM*: Virtual Synchronous Machine ### W From 1cc97ac1f811dbb54ee839c9cd26e55c7f55e679 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Tue, 21 Jan 2025 17:01:28 -0800 Subject: [PATCH 13/21] update tests of LCC constructor --- test/test_constructors.jl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/test_constructors.jl b/test/test_constructors.jl index bb6bb881fe..a838786197 100644 --- a/test/test_constructors.jl +++ b/test/test_constructors.jl @@ -65,8 +65,8 @@ end @test tMonitoredLine isa PowerSystems.Component tTwoTerminalHVDCLine = TwoTerminalHVDCLine(nothing) @test tTwoTerminalHVDCLine isa PowerSystems.Component - tTwoTerminalVSCDCLine = TwoTerminalVSCDCLine(nothing) - @test tTwoTerminalVSCDCLine isa PowerSystems.Component + tTwoTerminalLCCLine = TwoTerminalLCCLine(nothing) + @test tTwoTerminalLCCLine isa PowerSystems.Component tTransformer2W = Transformer2W(nothing) @test tTransformer2W isa PowerSystems.Component tTapTransformer = TapTransformer(nothing) From 899a90e27a90b6a7296536af860c0bef8e0583cd Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Wed, 22 Jan 2025 12:58:58 -0800 Subject: [PATCH 14/21] update name of gamma --- src/descriptors/power_system_structs.json | 8 ++-- src/models/generated/TwoTerminalLCCLine.jl | 44 +++++++++++----------- src/models/generated/includes.jl | 8 ++-- 3 files changed, 30 insertions(+), 30 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 1a65a9e36c..9806161d9f 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1307,8 +1307,8 @@ "data_type": "Int" }, { - "name": "inverter_margin_angle_limits", - "comment": "Minimum and maximum inverter margin angle (γ) (radians)", + "name": "inverter_extinction_angle_limits", + "comment": "Minimum and maximum inverter extinction angle (γ) (radians)", "null_value": "(min=0.0, max=0.0)", "data_type": "MinMax" }, @@ -1422,8 +1422,8 @@ "default": "0.00625" }, { - "name": "inverter_margin_angle", - "comment": "Rectifier margin angle (γ).", + "name": "inverter_extinction_angle", + "comment": "Inverter extinction angle (γ).", "null_value": "0.0", "data_type": "Float64", "default": "0.0" diff --git a/src/models/generated/TwoTerminalLCCLine.jl b/src/models/generated/TwoTerminalLCCLine.jl index cdef2e2a54..c1ff5115d4 100644 --- a/src/models/generated/TwoTerminalLCCLine.jl +++ b/src/models/generated/TwoTerminalLCCLine.jl @@ -18,7 +18,7 @@ This file is auto-generated. Do not edit. rectifier_xc::Float64 rectifier_base_voltage::Float64 inverter_bridges::Int - inverter_margin_angle_limits::MinMax + inverter_extinction_angle_limits::MinMax inverter_rc::Float64 inverter_xc::Float64 inverter_base_voltage::Float64 @@ -35,7 +35,7 @@ This file is auto-generated. Do not edit. inverter_tap_setting::Float64 inverter_tap_limits::MinMax inverter_tap_step::Float64 - inverter_margin_angle::Float64 + inverter_extinction_angle::Float64 active_power_limits_from::MinMax active_power_limits_to::MinMax reactive_power_limits_from::MinMax @@ -63,7 +63,7 @@ As implemented in PSS/E. - `rectifier_xc::Float64`: Rectifier commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) - `rectifier_base_voltage::Float64`: Rectifier primary base AC voltage in kV, entered in kV. - `inverter_bridges::Int`: Number of bridges in series in the inverter side. -- `inverter_margin_angle_limits::MinMax`: Minimum and maximum inverter margin angle (γ) (radians) +- `inverter_extinction_angle_limits::MinMax`: Minimum and maximum inverter extinction angle (γ) (radians) - `inverter_rc::Float64`: Inverter commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) - `inverter_xc::Float64`: Inverter commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit)) - `inverter_base_voltage::Float64`: Inverter primary base AC voltage in kV, entered in kV. @@ -80,7 +80,7 @@ As implemented in PSS/E. - `inverter_tap_setting::Float64`: (default: `1.0`) Inverter transformer tap setting. - `inverter_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages. - `inverter_tap_step::Float64`: (default: `0.00625`) Inverter transformer tap setting. -- `inverter_margin_angle::Float64`: (default: `0.0`) Rectifier margin angle (γ). +- `inverter_extinction_angle::Float64`: (default: `0.0`) Inverter extinction angle (γ). - `active_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the FROM node (MW) - `active_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the TO node (MW) - `reactive_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum reactive power limits to the FROM node (MVAR) @@ -115,8 +115,8 @@ mutable struct TwoTerminalLCCLine <: ACBranch rectifier_base_voltage::Float64 "Number of bridges in series in the inverter side." inverter_bridges::Int - "Minimum and maximum inverter margin angle (γ) (radians)" - inverter_margin_angle_limits::MinMax + "Minimum and maximum inverter extinction angle (γ) (radians)" + inverter_extinction_angle_limits::MinMax "Inverter commutating transformer resistance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))" inverter_rc::Float64 "Inverter commutating transformer reactance per bridge in system p.u. ([`SYSTEM_BASE`](@ref per_unit))" @@ -149,8 +149,8 @@ mutable struct TwoTerminalLCCLine <: ACBranch inverter_tap_limits::MinMax "Inverter transformer tap setting." inverter_tap_step::Float64 - "Rectifier margin angle (γ)." - inverter_margin_angle::Float64 + "Inverter extinction angle (γ)." + inverter_extinction_angle::Float64 "Minimum and maximum active power flows to the FROM node (MW)" active_power_limits_from::MinMax "Minimum and maximum active power flows to the TO node (MW)" @@ -169,12 +169,12 @@ mutable struct TwoTerminalLCCLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_margin_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_margin_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_margin_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_margin_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_margin_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) +function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -192,7 +192,7 @@ function TwoTerminalLCCLine(::Nothing) rectifier_xc=0.0, rectifier_base_voltage=0.0, inverter_bridges=0, - inverter_margin_angle_limits=(min=0.0, max=0.0), + inverter_extinction_angle_limits=(min=0.0, max=0.0), inverter_rc=0.0, inverter_xc=0.0, inverter_base_voltage=0.0, @@ -209,7 +209,7 @@ function TwoTerminalLCCLine(::Nothing) inverter_tap_setting=0.0, inverter_tap_limits=(min=0.0, max=0.0), inverter_tap_step=0.0, - inverter_margin_angle=0.0, + inverter_extinction_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), @@ -244,8 +244,8 @@ get_rectifier_xc(value::TwoTerminalLCCLine) = value.rectifier_xc get_rectifier_base_voltage(value::TwoTerminalLCCLine) = value.rectifier_base_voltage """Get [`TwoTerminalLCCLine`](@ref) `inverter_bridges`.""" get_inverter_bridges(value::TwoTerminalLCCLine) = value.inverter_bridges -"""Get [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle_limits`.""" -get_inverter_margin_angle_limits(value::TwoTerminalLCCLine) = value.inverter_margin_angle_limits +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle_limits`.""" +get_inverter_extinction_angle_limits(value::TwoTerminalLCCLine) = value.inverter_extinction_angle_limits """Get [`TwoTerminalLCCLine`](@ref) `inverter_rc`.""" get_inverter_rc(value::TwoTerminalLCCLine) = value.inverter_rc """Get [`TwoTerminalLCCLine`](@ref) `inverter_xc`.""" @@ -278,8 +278,8 @@ get_inverter_tap_setting(value::TwoTerminalLCCLine) = value.inverter_tap_setting get_inverter_tap_limits(value::TwoTerminalLCCLine) = value.inverter_tap_limits """Get [`TwoTerminalLCCLine`](@ref) `inverter_tap_step`.""" get_inverter_tap_step(value::TwoTerminalLCCLine) = value.inverter_tap_step -"""Get [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle`.""" -get_inverter_margin_angle(value::TwoTerminalLCCLine) = value.inverter_margin_angle +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" +get_inverter_extinction_angle(value::TwoTerminalLCCLine) = value.inverter_extinction_angle """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" get_active_power_limits_from(value::TwoTerminalLCCLine) = get_value(value, value.active_power_limits_from) """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" @@ -319,8 +319,8 @@ set_rectifier_xc!(value::TwoTerminalLCCLine, val) = value.rectifier_xc = val set_rectifier_base_voltage!(value::TwoTerminalLCCLine, val) = value.rectifier_base_voltage = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_bridges`.""" set_inverter_bridges!(value::TwoTerminalLCCLine, val) = value.inverter_bridges = val -"""Set [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle_limits`.""" -set_inverter_margin_angle_limits!(value::TwoTerminalLCCLine, val) = value.inverter_margin_angle_limits = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle_limits`.""" +set_inverter_extinction_angle_limits!(value::TwoTerminalLCCLine, val) = value.inverter_extinction_angle_limits = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_rc`.""" set_inverter_rc!(value::TwoTerminalLCCLine, val) = value.inverter_rc = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_xc`.""" @@ -353,8 +353,8 @@ set_inverter_tap_setting!(value::TwoTerminalLCCLine, val) = value.inverter_tap_s set_inverter_tap_limits!(value::TwoTerminalLCCLine, val) = value.inverter_tap_limits = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_tap_step`.""" set_inverter_tap_step!(value::TwoTerminalLCCLine, val) = value.inverter_tap_step = val -"""Set [`TwoTerminalLCCLine`](@ref) `inverter_margin_angle`.""" -set_inverter_margin_angle!(value::TwoTerminalLCCLine, val) = value.inverter_margin_angle = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" +set_inverter_extinction_angle!(value::TwoTerminalLCCLine, val) = value.inverter_extinction_angle = val """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" set_active_power_limits_from!(value::TwoTerminalLCCLine, val) = value.active_power_limits_from = set_value(value, val) """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" diff --git a/src/models/generated/includes.jl b/src/models/generated/includes.jl index 410688e122..5e2980ed4e 100644 --- a/src/models/generated/includes.jl +++ b/src/models/generated/includes.jl @@ -561,8 +561,8 @@ export get_inv_d_fluxlink export get_inv_q_fluxlink export get_inverter_base_voltage export get_inverter_bridges -export get_inverter_margin_angle -export get_inverter_margin_angle_limits +export get_inverter_extinction_angle +export get_inverter_extinction_angle_limits export get_inverter_rc export get_inverter_tap_limits export get_inverter_tap_setting @@ -1152,8 +1152,8 @@ export set_inv_d_fluxlink! export set_inv_q_fluxlink! export set_inverter_base_voltage! export set_inverter_bridges! -export set_inverter_margin_angle! -export set_inverter_margin_angle_limits! +export set_inverter_extinction_angle! +export set_inverter_extinction_angle_limits! export set_inverter_rc! export set_inverter_tap_limits! export set_inverter_tap_setting! From ca8d91668ca4e42c406094b186253409b21397a0 Mon Sep 17 00:00:00 2001 From: mcllerena Date: Thu, 23 Jan 2025 16:04:59 -0700 Subject: [PATCH 15/21] two-terminal lcc model parser --- src/parsers/pm_io/psse.jl | 76 ++++++++++++++++++++++++++------ src/parsers/power_models_data.jl | 38 +++++++++++++--- 2 files changed, 95 insertions(+), 19 deletions(-) diff --git a/src/parsers/pm_io/psse.jl b/src/parsers/pm_io/psse.jl index 2f94d2490e..60ae7cc8ba 100644 --- a/src/parsers/pm_io/psse.jl +++ b/src/parsers/pm_io/psse.jl @@ -840,15 +840,56 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) if dcline["MDC"] == 1 abs(dcline["SETVL"]) elseif dcline["MDC"] == 2 - abs(dcline["SETVL"] / pop!(dcline, "VSCHD") / 1000) + abs(dcline["SETVL"] * pop!(dcline, "VSCHD") / 1000) # Amp * V else 0 end - + + sub_data["transfer_setpoint"] = dcline["SETVL"] + + sub_data["name"] = dcline["NAME"] sub_data["f_bus"] = dcline["IPR"] sub_data["t_bus"] = dcline["IPI"] - sub_data["br_status"] = pop!(dcline, "MDC") == 0 ? 0 : 1 + + if dcline["MDC"] == 1 + sub_data["power_mode"] = true + else + sub_data["power_mode"] = false + end + sub_data["available"] = dcline["MDC"] == 0 ? false : true + sub_data["br_status"] = sub_data["available"] + + sub_data["scheduled_dc_voltage"] = dcline["VSCHD"] + + sub_data["rectifier_bridges"] = dcline["NBR"] + sub_data["rectifier_rc"] = dcline["RCR"] + sub_data["rectifier_xc"] = dcline["XCR"] + sub_data["rectifier_base_voltage"] = dcline["EBASR"] + + sub_data["inverter_bridges"] = dcline["NBI"] + sub_data["inverter_rc"] = dcline["RCI"] + sub_data["inverter_xc"] = dcline["XCI"] + sub_data["inverter_base_voltage"] = dcline["EBASI"] + + sub_data["switch_mode_voltage"] = dcline["VCMOD"] + sub_data["compounding_resistance"] = dcline["RCOMP"] + sub_data["min_compounding_voltage"] = dcline["DCVMIN"] + + sub_data["rectifier_transformer_ratio"] = dcline["TRR"] + sub_data["rectifier_tap_setting"] = dcline["TAPR"] + sub_data["rectifier_tap_limits"] = (min=dcline["TMNR"], max=dcline["TMXR"]) + sub_data["rectifier_tap_step"] = dcline["STPR"] + + sub_data["inverter_transformer_ratio"] = dcline["TRI"] + sub_data["inverter_tap_setting"] = dcline["TAPI"] + sub_data["inverter_tap_limits"] = (min=dcline["TMNI"], max=dcline["TMXI"]) + sub_data["inverter_tap_step"] = dcline["STPI"] + + sub_data["loss0"] = 0.0 + sub_data["loss1"] = 0.0 + sub_data["pf"] = power_demand + sub_data["active_power_flow"] = sub_data["pf"] sub_data["pt"] = power_demand sub_data["qf"] = 0.0 sub_data["qt"] = 0.0 @@ -856,19 +897,24 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) sub_data["vt"] = _get_bus_value(pop!(dcline, "IPI"), "vm", pm_data) sub_data["pminf"] = 0.0 - sub_data["pmaxf"] = dcline["SETVL"] > 0 ? power_demand : -power_demand + sub_data["pmaxf"] = dcline["SETVL"] > 0 ? power_demand : -power_demand sub_data["pmint"] = pop!(dcline, "SETVL") > 0 ? -power_demand : power_demand sub_data["pmaxt"] = 0.0 anmn = [] for key in ["ANMNR", "ANMNI"] if abs(dcline[key]) <= 90.0 - push!(anmn, pop!(dcline, key)) + push!(anmn, dcline[key]) else push!(anmn, 0) @info("$key outside reasonable limits, setting to 0 degress") end end + sub_data["rectifier_delay_angle_limits"] = (min=deg2rad(anmn[1]), max=deg2rad(dcline["ANMXR"])) + sub_data["inverter_extinction_angle_limits"] = (min=deg2rad(anmn[2]), max=deg2rad(dcline["ANMXI"])) + + sub_data["rectifier_delay_angle"] = deg2rad(anmn[1]) + sub_data["inverter_extinction_angle"] = deg2rad(anmn[2]) sub_data["qmaxf"] = 0.0 sub_data["qmaxt"] = 0.0 @@ -877,16 +923,19 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) sub_data["qmint"] = -max(abs(sub_data["pmint"]), abs(sub_data["pmaxt"])) * cosd(anmn[2]) - # Can we use "number of bridges in series (NBR/NBI)" to compute a loss? - sub_data["loss0"] = 0.0 - sub_data["loss1"] = 0.0 + sub_data["active_power_limits_from"] = (min=sub_data["pminf"], max=sub_data["pmaxf"]) + sub_data["active_power_limits_to"] = (min=sub_data["pmint"], max=sub_data["pmaxt"]) + sub_data["reactive_power_limits_from"] = (min=sub_data["qminf"], max=sub_data["qmaxf"]) + sub_data["reactive_power_limits_to"] = (min=sub_data["qmint"], max=sub_data["qmaxt"]) + + sub_data["commutating_capacitor_reactance"] = dcline["XCAPR"] # Costs (set to default values) - sub_data["startup"] = 0.0 - sub_data["shutdown"] = 0.0 - sub_data["ncost"] = 3 - sub_data["cost"] = [0.0, 0.0, 0.0] - sub_data["model"] = 2 + # sub_data["startup"] = 0.0 + # sub_data["shutdown"] = 0.0 + # sub_data["ncost"] = 3 + # sub_data["cost"] = [0.0, 0.0, 0.0] + # sub_data["model"] = 2 sub_data["source_id"] = [ "two-terminal dc", @@ -1105,5 +1154,6 @@ function parse_psse(io::IO; kwargs...)::Dict ) pti_data = parse_pti(io) pm = _pti_to_powermodels!(pti_data; kwargs...) + return pm end diff --git a/src/parsers/power_models_data.jl b/src/parsers/power_models_data.jl index f95094ebf1..b5d6b53e21 100644 --- a/src/parsers/power_models_data.jl +++ b/src/parsers/power_models_data.jl @@ -809,15 +809,41 @@ function read_branch!( end function make_dcline(name::String, d::Dict, bus_f::ACBus, bus_t::ACBus) - return TwoTerminalHVDCLine(; + return TwoTerminalLCCLine(; name = name, - available = d["br_status"] == 1, + available = d["available"], active_power_flow = get(d, "pf", 0.0), arc = Arc(bus_f, bus_t), - active_power_limits_from = (min = d["pminf"], max = d["pmaxf"]), - active_power_limits_to = (min = d["pmint"], max = d["pmaxt"]), - reactive_power_limits_from = (min = d["qminf"], max = d["qmaxf"]), - reactive_power_limits_to = (min = d["qmint"], max = d["qmaxt"]), + transfer_setpoint = 0.0, + scheduled_dc_voltage = d["scheduled_dc_voltage"], + rectifier_bridges = d["rectifier_bridges"], + rectifier_delay_angle_limits = d["rectifier_delay_angle_limits"], + rectifier_rc = d["rectifier_rc"], + rectifier_xc = d["rectifier_xc"], + rectifier_base_voltage = d["rectifier_base_voltage"], + inverter_bridges = d["inverter_bridges"], + inverter_extinction_angle_limits = d["inverter_extinction_angle_limits"], + inverter_rc = d["inverter_rc"], + inverter_xc = d["inverter_xc"], + inverter_base_voltage = d["inverter_base_voltage"], + power_mode = d["power_mode"], + switch_mode_voltage = d["switch_mode_voltage"], + compounding_resistance = d["compounding_resistance"], + min_compounding_voltage = d["min_compounding_voltage"], + rectifier_transformer_ratio = d["rectifier_transformer_ratio"], + rectifier_tap_setting = d["rectifier_tap_setting"], + rectifier_tap_limits = d["rectifier_tap_limits"], + rectifier_tap_step = d["rectifier_tap_step"], + rectifier_delay_angle = d["rectifier_delay_angle"], + inverter_transformer_ratio = d["inverter_transformer_ratio"], + inverter_tap_setting = d["inverter_tap_setting"], + inverter_tap_limits = d["inverter_tap_limits"], + inverter_tap_step = d["inverter_tap_step"], + inverter_extinction_angle = d["inverter_extinction_angle"], + active_power_limits_from = d["active_power_limits_from"], + active_power_limits_to = d["active_power_limits_to"], + reactive_power_limits_from = d["reactive_power_limits_from"], + reactive_power_limits_to = d["reactive_power_limits_to"], loss = LinearCurve(d["loss1"], d["loss0"]), ) end From d444e6604bd8cfb538995005b9bcabcbc3001814 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 23 Jan 2025 15:11:54 -0800 Subject: [PATCH 16/21] add new struct --- src/models/generated/TwoTerminalLCCLine.jl | 25 +++++++++++++++------- src/models/generated/includes.jl | 2 ++ 2 files changed, 19 insertions(+), 8 deletions(-) diff --git a/src/models/generated/TwoTerminalLCCLine.jl b/src/models/generated/TwoTerminalLCCLine.jl index c1ff5115d4..5cac3a9bcb 100644 --- a/src/models/generated/TwoTerminalLCCLine.jl +++ b/src/models/generated/TwoTerminalLCCLine.jl @@ -36,6 +36,7 @@ This file is auto-generated. Do not edit. inverter_tap_limits::MinMax inverter_tap_step::Float64 inverter_extinction_angle::Float64 + commutating_capacitor_reactance::Float64 active_power_limits_from::MinMax active_power_limits_to::MinMax reactive_power_limits_from::MinMax @@ -74,13 +75,14 @@ As implemented in PSS/E. - `rectifier_transformer_ratio::Float64`: (default: `1.0`) Rectifier transformer ratio between the primary and secondary side AC voltages. - `rectifier_tap_setting::Float64`: (default: `1.0`) Rectifier transformer tap setting. - `rectifier_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side AC voltages. -- `rectifier_tap_step::Float64`: (default: `0.00625`) Rectifier transformer tap setting. +- `rectifier_tap_step::Float64`: (default: `0.00625`) Rectifier transformer tap step value - `rectifier_delay_angle::Float64`: (default: `0.0`) Rectifier firing delay angle (α). - `inverter_transformer_ratio::Float64`: (default: `1.0`) Inverter transformer ratio between the primary and secondary side AC voltages. - `inverter_tap_setting::Float64`: (default: `1.0`) Inverter transformer tap setting. - `inverter_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages. -- `inverter_tap_step::Float64`: (default: `0.00625`) Inverter transformer tap setting. +- `inverter_tap_step::Float64`: (default: `0.00625`) Inverter transformer tap step value. - `inverter_extinction_angle::Float64`: (default: `0.0`) Inverter extinction angle (γ). +- `commutating_capacitor_reactance::Float64`: (default: `0.0`) Commutating capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). - `active_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the FROM node (MW) - `active_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the TO node (MW) - `reactive_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum reactive power limits to the FROM node (MVAR) @@ -137,7 +139,7 @@ mutable struct TwoTerminalLCCLine <: ACBranch rectifier_tap_setting::Float64 "Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side AC voltages." rectifier_tap_limits::MinMax - "Rectifier transformer tap setting." + "Rectifier transformer tap step value" rectifier_tap_step::Float64 "Rectifier firing delay angle (α)." rectifier_delay_angle::Float64 @@ -147,10 +149,12 @@ mutable struct TwoTerminalLCCLine <: ACBranch inverter_tap_setting::Float64 "Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages." inverter_tap_limits::MinMax - "Inverter transformer tap setting." + "Inverter transformer tap step value." inverter_tap_step::Float64 "Inverter extinction angle (γ)." inverter_extinction_angle::Float64 + "Commutating capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." + commutating_capacitor_reactance::Float64 "Minimum and maximum active power flows to the FROM node (MW)" active_power_limits_from::MinMax "Minimum and maximum active power flows to the TO node (MW)" @@ -169,12 +173,12 @@ mutable struct TwoTerminalLCCLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, commutating_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, commutating_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) +function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, commutating_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, commutating_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -210,6 +214,7 @@ function TwoTerminalLCCLine(::Nothing) inverter_tap_limits=(min=0.0, max=0.0), inverter_tap_step=0.0, inverter_extinction_angle=0.0, + commutating_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), @@ -280,6 +285,8 @@ get_inverter_tap_limits(value::TwoTerminalLCCLine) = value.inverter_tap_limits get_inverter_tap_step(value::TwoTerminalLCCLine) = value.inverter_tap_step """Get [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" get_inverter_extinction_angle(value::TwoTerminalLCCLine) = value.inverter_extinction_angle +"""Get [`TwoTerminalLCCLine`](@ref) `commutating_capacitor_reactance`.""" +get_commutating_capacitor_reactance(value::TwoTerminalLCCLine) = value.commutating_capacitor_reactance """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" get_active_power_limits_from(value::TwoTerminalLCCLine) = get_value(value, value.active_power_limits_from) """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" @@ -355,6 +362,8 @@ set_inverter_tap_limits!(value::TwoTerminalLCCLine, val) = value.inverter_tap_li set_inverter_tap_step!(value::TwoTerminalLCCLine, val) = value.inverter_tap_step = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" set_inverter_extinction_angle!(value::TwoTerminalLCCLine, val) = value.inverter_extinction_angle = val +"""Set [`TwoTerminalLCCLine`](@ref) `commutating_capacitor_reactance`.""" +set_commutating_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.commutating_capacitor_reactance = val """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" set_active_power_limits_from!(value::TwoTerminalLCCLine, val) = value.active_power_limits_from = set_value(value, val) """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" diff --git a/src/models/generated/includes.jl b/src/models/generated/includes.jl index 5e2980ed4e..52ea803e1c 100644 --- a/src/models/generated/includes.jl +++ b/src/models/generated/includes.jl @@ -494,6 +494,7 @@ export get_bustype export get_c export get_c_dc export get_cf +export get_commutating_capacitor_reactance export get_compounding_resistance export get_constant_active_power export get_constant_reactive_power @@ -1085,6 +1086,7 @@ export set_bustype! export set_c! export set_c_dc! export set_cf! +export set_commutating_capacitor_reactance! export set_compounding_resistance! export set_constant_active_power! export set_constant_reactive_power! From a2a361ce09ee372c8ee1c63860dcba6a7362343d Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 23 Jan 2025 15:18:42 -0800 Subject: [PATCH 17/21] update struct lcc again --- src/descriptors/power_system_structs.json | 18 +++++++++-- src/models/generated/TwoTerminalLCCLine.jl | 35 ++++++++++++++-------- src/models/generated/includes.jl | 6 ++-- 3 files changed, 42 insertions(+), 17 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 9806161d9f..391ea5123a 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1381,7 +1381,7 @@ }, { "name": "rectifier_tap_step", - "comment": "Rectifier transformer tap setting.", + "comment": "Rectifier transformer tap step value", "null_value": "0.0", "data_type": "Float64", "default": "0.00625" @@ -1416,7 +1416,7 @@ }, { "name": "inverter_tap_step", - "comment": "Inverter transformer tap setting.", + "comment": "Inverter transformer tap step value.", "null_value": "0.0", "data_type": "Float64", "default": "0.00625" @@ -1428,6 +1428,20 @@ "data_type": "Float64", "default": "0.0" }, + { + "name": "rectifier_capacitor_reactance", + "comment": "Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)).", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.0" + }, + { + "name": "inverter_capacitor_reactance", + "comment": "Commutating inverter capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)).", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.0" + }, { "name": "active_power_limits_from", "comment": "Minimum and maximum active power flows to the FROM node (MW)", diff --git a/src/models/generated/TwoTerminalLCCLine.jl b/src/models/generated/TwoTerminalLCCLine.jl index 5cac3a9bcb..e13e2de6c0 100644 --- a/src/models/generated/TwoTerminalLCCLine.jl +++ b/src/models/generated/TwoTerminalLCCLine.jl @@ -36,7 +36,8 @@ This file is auto-generated. Do not edit. inverter_tap_limits::MinMax inverter_tap_step::Float64 inverter_extinction_angle::Float64 - commutating_capacitor_reactance::Float64 + rectifier_capacitor_reactance::Float64 + inverter_capacitor_reactance::Float64 active_power_limits_from::MinMax active_power_limits_to::MinMax reactive_power_limits_from::MinMax @@ -82,7 +83,8 @@ As implemented in PSS/E. - `inverter_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages. - `inverter_tap_step::Float64`: (default: `0.00625`) Inverter transformer tap step value. - `inverter_extinction_angle::Float64`: (default: `0.0`) Inverter extinction angle (γ). -- `commutating_capacitor_reactance::Float64`: (default: `0.0`) Commutating capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). +- `rectifier_capacitor_reactance::Float64`: (default: `0.0`) Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). +- `inverter_capacitor_reactance::Float64`: (default: `0.0`) Commutating inverter capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). - `active_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the FROM node (MW) - `active_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the TO node (MW) - `reactive_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum reactive power limits to the FROM node (MVAR) @@ -153,8 +155,10 @@ mutable struct TwoTerminalLCCLine <: ACBranch inverter_tap_step::Float64 "Inverter extinction angle (γ)." inverter_extinction_angle::Float64 - "Commutating capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." - commutating_capacitor_reactance::Float64 + "Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." + rectifier_capacitor_reactance::Float64 + "Commutating inverter capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." + inverter_capacitor_reactance::Float64 "Minimum and maximum active power flows to the FROM node (MW)" active_power_limits_from::MinMax "Minimum and maximum active power flows to the TO node (MW)" @@ -173,12 +177,12 @@ mutable struct TwoTerminalLCCLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, commutating_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, commutating_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, rectifier_capacitor_reactance=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, rectifier_capacitor_reactance, inverter_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, commutating_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, commutating_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) +function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, rectifier_capacitor_reactance=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, rectifier_capacitor_reactance, inverter_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -214,7 +218,8 @@ function TwoTerminalLCCLine(::Nothing) inverter_tap_limits=(min=0.0, max=0.0), inverter_tap_step=0.0, inverter_extinction_angle=0.0, - commutating_capacitor_reactance=0.0, + rectifier_capacitor_reactance=0.0, + inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), @@ -285,8 +290,10 @@ get_inverter_tap_limits(value::TwoTerminalLCCLine) = value.inverter_tap_limits get_inverter_tap_step(value::TwoTerminalLCCLine) = value.inverter_tap_step """Get [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" get_inverter_extinction_angle(value::TwoTerminalLCCLine) = value.inverter_extinction_angle -"""Get [`TwoTerminalLCCLine`](@ref) `commutating_capacitor_reactance`.""" -get_commutating_capacitor_reactance(value::TwoTerminalLCCLine) = value.commutating_capacitor_reactance +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_capacitor_reactance`.""" +get_rectifier_capacitor_reactance(value::TwoTerminalLCCLine) = value.rectifier_capacitor_reactance +"""Get [`TwoTerminalLCCLine`](@ref) `inverter_capacitor_reactance`.""" +get_inverter_capacitor_reactance(value::TwoTerminalLCCLine) = value.inverter_capacitor_reactance """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" get_active_power_limits_from(value::TwoTerminalLCCLine) = get_value(value, value.active_power_limits_from) """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" @@ -362,8 +369,10 @@ set_inverter_tap_limits!(value::TwoTerminalLCCLine, val) = value.inverter_tap_li set_inverter_tap_step!(value::TwoTerminalLCCLine, val) = value.inverter_tap_step = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" set_inverter_extinction_angle!(value::TwoTerminalLCCLine, val) = value.inverter_extinction_angle = val -"""Set [`TwoTerminalLCCLine`](@ref) `commutating_capacitor_reactance`.""" -set_commutating_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.commutating_capacitor_reactance = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_capacitor_reactance`.""" +set_rectifier_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.rectifier_capacitor_reactance = val +"""Set [`TwoTerminalLCCLine`](@ref) `inverter_capacitor_reactance`.""" +set_inverter_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.inverter_capacitor_reactance = val """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" set_active_power_limits_from!(value::TwoTerminalLCCLine, val) = value.active_power_limits_from = set_value(value, val) """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_to`.""" diff --git a/src/models/generated/includes.jl b/src/models/generated/includes.jl index 52ea803e1c..409d178b6a 100644 --- a/src/models/generated/includes.jl +++ b/src/models/generated/includes.jl @@ -494,7 +494,6 @@ export get_bustype export get_c export get_c_dc export get_cf -export get_commutating_capacitor_reactance export get_compounding_resistance export get_constant_active_power export get_constant_reactive_power @@ -562,6 +561,7 @@ export get_inv_d_fluxlink export get_inv_q_fluxlink export get_inverter_base_voltage export get_inverter_bridges +export get_inverter_capacitor_reactance export get_inverter_extinction_angle export get_inverter_extinction_angle_limits export get_inverter_rc @@ -646,6 +646,7 @@ export get_reactive_power_limits_pump export get_reactive_power_limits_to export get_rectifier_base_voltage export get_rectifier_bridges +export get_rectifier_capacitor_reactance export get_rectifier_delay_angle export get_rectifier_delay_angle_limits export get_rectifier_rc @@ -1086,7 +1087,6 @@ export set_bustype! export set_c! export set_c_dc! export set_cf! -export set_commutating_capacitor_reactance! export set_compounding_resistance! export set_constant_active_power! export set_constant_reactive_power! @@ -1154,6 +1154,7 @@ export set_inv_d_fluxlink! export set_inv_q_fluxlink! export set_inverter_base_voltage! export set_inverter_bridges! +export set_inverter_capacitor_reactance! export set_inverter_extinction_angle! export set_inverter_extinction_angle_limits! export set_inverter_rc! @@ -1238,6 +1239,7 @@ export set_reactive_power_limits_pump! export set_reactive_power_limits_to! export set_rectifier_base_voltage! export set_rectifier_bridges! +export set_rectifier_capacitor_reactance! export set_rectifier_delay_angle! export set_rectifier_delay_angle_limits! export set_rectifier_rc! From a7e17504ed8a4ffbd7d4e3d3394f9a0dafc235ca Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 23 Jan 2025 15:20:42 -0800 Subject: [PATCH 18/21] move position of data for lcc --- src/descriptors/power_system_structs.json | 14 ++++++------ src/models/generated/TwoTerminalLCCLine.jl | 26 +++++++++++----------- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/descriptors/power_system_structs.json b/src/descriptors/power_system_structs.json index 391ea5123a..90efaa2fa7 100644 --- a/src/descriptors/power_system_structs.json +++ b/src/descriptors/power_system_structs.json @@ -1393,6 +1393,13 @@ "data_type": "Float64", "default": "0.0" }, + { + "name": "rectifier_capacitor_reactance", + "comment": "Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)).", + "null_value": "0.0", + "data_type": "Float64", + "default": "0.0" + }, { "name": "inverter_transformer_ratio", "comment": "Inverter transformer ratio between the primary and secondary side AC voltages.", @@ -1428,13 +1435,6 @@ "data_type": "Float64", "default": "0.0" }, - { - "name": "rectifier_capacitor_reactance", - "comment": "Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)).", - "null_value": "0.0", - "data_type": "Float64", - "default": "0.0" - }, { "name": "inverter_capacitor_reactance", "comment": "Commutating inverter capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)).", diff --git a/src/models/generated/TwoTerminalLCCLine.jl b/src/models/generated/TwoTerminalLCCLine.jl index e13e2de6c0..8b67a5c19e 100644 --- a/src/models/generated/TwoTerminalLCCLine.jl +++ b/src/models/generated/TwoTerminalLCCLine.jl @@ -31,12 +31,12 @@ This file is auto-generated. Do not edit. rectifier_tap_limits::MinMax rectifier_tap_step::Float64 rectifier_delay_angle::Float64 + rectifier_capacitor_reactance::Float64 inverter_transformer_ratio::Float64 inverter_tap_setting::Float64 inverter_tap_limits::MinMax inverter_tap_step::Float64 inverter_extinction_angle::Float64 - rectifier_capacitor_reactance::Float64 inverter_capacitor_reactance::Float64 active_power_limits_from::MinMax active_power_limits_to::MinMax @@ -78,12 +78,12 @@ As implemented in PSS/E. - `rectifier_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum rectifier tap limits as a ratio between the primary and secondary side AC voltages. - `rectifier_tap_step::Float64`: (default: `0.00625`) Rectifier transformer tap step value - `rectifier_delay_angle::Float64`: (default: `0.0`) Rectifier firing delay angle (α). +- `rectifier_capacitor_reactance::Float64`: (default: `0.0`) Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). - `inverter_transformer_ratio::Float64`: (default: `1.0`) Inverter transformer ratio between the primary and secondary side AC voltages. - `inverter_tap_setting::Float64`: (default: `1.0`) Inverter transformer tap setting. - `inverter_tap_limits::MinMax`: (default: `(min=0.51, max=1.5)`) Minimum and maximum inverter tap limits as a ratio between the primary and secondary side AC voltages. - `inverter_tap_step::Float64`: (default: `0.00625`) Inverter transformer tap step value. - `inverter_extinction_angle::Float64`: (default: `0.0`) Inverter extinction angle (γ). -- `rectifier_capacitor_reactance::Float64`: (default: `0.0`) Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). - `inverter_capacitor_reactance::Float64`: (default: `0.0`) Commutating inverter capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit)). - `active_power_limits_from::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the FROM node (MW) - `active_power_limits_to::MinMax`: (default: `(min=0.0, max=0.0)`) Minimum and maximum active power flows to the TO node (MW) @@ -145,6 +145,8 @@ mutable struct TwoTerminalLCCLine <: ACBranch rectifier_tap_step::Float64 "Rectifier firing delay angle (α)." rectifier_delay_angle::Float64 + "Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." + rectifier_capacitor_reactance::Float64 "Inverter transformer ratio between the primary and secondary side AC voltages." inverter_transformer_ratio::Float64 "Inverter transformer tap setting." @@ -155,8 +157,6 @@ mutable struct TwoTerminalLCCLine <: ACBranch inverter_tap_step::Float64 "Inverter extinction angle (γ)." inverter_extinction_angle::Float64 - "Commutating rectifier capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." - rectifier_capacitor_reactance::Float64 "Commutating inverter capacitor reactance magnitude per bridge, in system p.u. ([`SYSTEM_BASE`](@ref per_unit))." inverter_capacitor_reactance::Float64 "Minimum and maximum active power flows to the FROM node (MW)" @@ -177,12 +177,12 @@ mutable struct TwoTerminalLCCLine <: ACBranch internal::InfrastructureSystemsInternal end -function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, rectifier_capacitor_reactance=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, rectifier_capacitor_reactance, inverter_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) +function TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, rectifier_capacitor_reactance=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, rectifier_capacitor_reactance, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, inverter_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, InfrastructureSystemsInternal(), ) end -function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, rectifier_capacitor_reactance=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) - TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, rectifier_capacitor_reactance, inverter_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) +function TwoTerminalLCCLine(; name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode=true, switch_mode_voltage=0.0, compounding_resistance=0.0, min_compounding_voltage=0.0, rectifier_transformer_ratio=1.0, rectifier_tap_setting=1.0, rectifier_tap_limits=(min=0.51, max=1.5), rectifier_tap_step=0.00625, rectifier_delay_angle=0.0, rectifier_capacitor_reactance=0.0, inverter_transformer_ratio=1.0, inverter_tap_setting=1.0, inverter_tap_limits=(min=0.51, max=1.5), inverter_tap_step=0.00625, inverter_extinction_angle=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), reactive_power_limits_from=(min=0.0, max=0.0), reactive_power_limits_to=(min=0.0, max=0.0), loss=LinearCurve(0.0), services=Device[], ext=Dict{String, Any}(), internal=InfrastructureSystemsInternal(), ) + TwoTerminalLCCLine(name, available, arc, active_power_flow, transfer_setpoint, scheduled_dc_voltage, rectifier_bridges, rectifier_delay_angle_limits, rectifier_rc, rectifier_xc, rectifier_base_voltage, inverter_bridges, inverter_extinction_angle_limits, inverter_rc, inverter_xc, inverter_base_voltage, power_mode, switch_mode_voltage, compounding_resistance, min_compounding_voltage, rectifier_transformer_ratio, rectifier_tap_setting, rectifier_tap_limits, rectifier_tap_step, rectifier_delay_angle, rectifier_capacitor_reactance, inverter_transformer_ratio, inverter_tap_setting, inverter_tap_limits, inverter_tap_step, inverter_extinction_angle, inverter_capacitor_reactance, active_power_limits_from, active_power_limits_to, reactive_power_limits_from, reactive_power_limits_to, loss, services, ext, internal, ) end # Constructor for demo purposes; non-functional. @@ -213,12 +213,12 @@ function TwoTerminalLCCLine(::Nothing) rectifier_tap_limits=(min=0.0, max=0.0), rectifier_tap_step=0.0, rectifier_delay_angle=0.0, + rectifier_capacitor_reactance=0.0, inverter_transformer_ratio=0.0, inverter_tap_setting=0.0, inverter_tap_limits=(min=0.0, max=0.0), inverter_tap_step=0.0, inverter_extinction_angle=0.0, - rectifier_capacitor_reactance=0.0, inverter_capacitor_reactance=0.0, active_power_limits_from=(min=0.0, max=0.0), active_power_limits_to=(min=0.0, max=0.0), @@ -280,6 +280,8 @@ get_rectifier_tap_limits(value::TwoTerminalLCCLine) = value.rectifier_tap_limits get_rectifier_tap_step(value::TwoTerminalLCCLine) = value.rectifier_tap_step """Get [`TwoTerminalLCCLine`](@ref) `rectifier_delay_angle`.""" get_rectifier_delay_angle(value::TwoTerminalLCCLine) = value.rectifier_delay_angle +"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_capacitor_reactance`.""" +get_rectifier_capacitor_reactance(value::TwoTerminalLCCLine) = value.rectifier_capacitor_reactance """Get [`TwoTerminalLCCLine`](@ref) `inverter_transformer_ratio`.""" get_inverter_transformer_ratio(value::TwoTerminalLCCLine) = value.inverter_transformer_ratio """Get [`TwoTerminalLCCLine`](@ref) `inverter_tap_setting`.""" @@ -290,8 +292,6 @@ get_inverter_tap_limits(value::TwoTerminalLCCLine) = value.inverter_tap_limits get_inverter_tap_step(value::TwoTerminalLCCLine) = value.inverter_tap_step """Get [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" get_inverter_extinction_angle(value::TwoTerminalLCCLine) = value.inverter_extinction_angle -"""Get [`TwoTerminalLCCLine`](@ref) `rectifier_capacitor_reactance`.""" -get_rectifier_capacitor_reactance(value::TwoTerminalLCCLine) = value.rectifier_capacitor_reactance """Get [`TwoTerminalLCCLine`](@ref) `inverter_capacitor_reactance`.""" get_inverter_capacitor_reactance(value::TwoTerminalLCCLine) = value.inverter_capacitor_reactance """Get [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" @@ -359,6 +359,8 @@ set_rectifier_tap_limits!(value::TwoTerminalLCCLine, val) = value.rectifier_tap_ set_rectifier_tap_step!(value::TwoTerminalLCCLine, val) = value.rectifier_tap_step = val """Set [`TwoTerminalLCCLine`](@ref) `rectifier_delay_angle`.""" set_rectifier_delay_angle!(value::TwoTerminalLCCLine, val) = value.rectifier_delay_angle = val +"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_capacitor_reactance`.""" +set_rectifier_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.rectifier_capacitor_reactance = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_transformer_ratio`.""" set_inverter_transformer_ratio!(value::TwoTerminalLCCLine, val) = value.inverter_transformer_ratio = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_tap_setting`.""" @@ -369,8 +371,6 @@ set_inverter_tap_limits!(value::TwoTerminalLCCLine, val) = value.inverter_tap_li set_inverter_tap_step!(value::TwoTerminalLCCLine, val) = value.inverter_tap_step = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_extinction_angle`.""" set_inverter_extinction_angle!(value::TwoTerminalLCCLine, val) = value.inverter_extinction_angle = val -"""Set [`TwoTerminalLCCLine`](@ref) `rectifier_capacitor_reactance`.""" -set_rectifier_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.rectifier_capacitor_reactance = val """Set [`TwoTerminalLCCLine`](@ref) `inverter_capacitor_reactance`.""" set_inverter_capacitor_reactance!(value::TwoTerminalLCCLine, val) = value.inverter_capacitor_reactance = val """Set [`TwoTerminalLCCLine`](@ref) `active_power_limits_from`.""" From 8ac69032f46b6f3f5e19706dc5a3732452d6315b Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 23 Jan 2025 15:58:48 -0800 Subject: [PATCH 19/21] normalize impedances to per unit --- src/parsers/pm_io/psse.jl | 49 +++++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 20 deletions(-) diff --git a/src/parsers/pm_io/psse.jl b/src/parsers/pm_io/psse.jl index 60ae7cc8ba..b88603a340 100644 --- a/src/parsers/pm_io/psse.jl +++ b/src/parsers/pm_io/psse.jl @@ -827,6 +827,7 @@ PSS(R)E Voltage Source Converter specification. function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) @info "Parsing PSS(R)E Two-Terminal and VSC DC line data into a PowerModels Dict..." pm_data["dcline"] = [] + baseMVA = pm_data["baseMVA"] if haskey(pti_data, "TWO-TERMINAL DC") for dcline in pti_data["TWO-TERMINAL DC"] @@ -840,13 +841,13 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) if dcline["MDC"] == 1 abs(dcline["SETVL"]) elseif dcline["MDC"] == 2 - abs(dcline["SETVL"] * pop!(dcline, "VSCHD") / 1000) # Amp * V + abs(dcline["SETVL"] * dcline["VSCHD"] / 1000) # Amp * V else 0 end - + sub_data["transfer_setpoint"] = dcline["SETVL"] - + sub_data["name"] = dcline["NAME"] sub_data["f_bus"] = dcline["IPR"] sub_data["t_bus"] = dcline["IPI"] @@ -860,15 +861,16 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) sub_data["br_status"] = sub_data["available"] sub_data["scheduled_dc_voltage"] = dcline["VSCHD"] - + ZbaseR = dcline["EBASR"]^2 / baseMVA sub_data["rectifier_bridges"] = dcline["NBR"] - sub_data["rectifier_rc"] = dcline["RCR"] - sub_data["rectifier_xc"] = dcline["XCR"] + sub_data["rectifier_rc"] = dcline["RCR"] / ZbaseR + sub_data["rectifier_xc"] = dcline["XCR"] / ZbaseR sub_data["rectifier_base_voltage"] = dcline["EBASR"] + ZbaseI = dcline["EBASI"]^2 / baseMVA sub_data["inverter_bridges"] = dcline["NBI"] - sub_data["inverter_rc"] = dcline["RCI"] - sub_data["inverter_xc"] = dcline["XCI"] + sub_data["inverter_rc"] = dcline["RCI"] / ZbaseI + sub_data["inverter_xc"] = dcline["XCI"] / ZbaseI sub_data["inverter_base_voltage"] = dcline["EBASI"] sub_data["switch_mode_voltage"] = dcline["VCMOD"] @@ -877,14 +879,14 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) sub_data["rectifier_transformer_ratio"] = dcline["TRR"] sub_data["rectifier_tap_setting"] = dcline["TAPR"] - sub_data["rectifier_tap_limits"] = (min=dcline["TMNR"], max=dcline["TMXR"]) + sub_data["rectifier_tap_limits"] = (min = dcline["TMNR"], max = dcline["TMXR"]) sub_data["rectifier_tap_step"] = dcline["STPR"] sub_data["inverter_transformer_ratio"] = dcline["TRI"] sub_data["inverter_tap_setting"] = dcline["TAPI"] - sub_data["inverter_tap_limits"] = (min=dcline["TMNI"], max=dcline["TMXI"]) + sub_data["inverter_tap_limits"] = (min = dcline["TMNI"], max = dcline["TMXI"]) sub_data["inverter_tap_step"] = dcline["STPI"] - + sub_data["loss0"] = 0.0 sub_data["loss1"] = 0.0 @@ -897,7 +899,7 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) sub_data["vt"] = _get_bus_value(pop!(dcline, "IPI"), "vm", pm_data) sub_data["pminf"] = 0.0 - sub_data["pmaxf"] = dcline["SETVL"] > 0 ? power_demand : -power_demand + sub_data["pmaxf"] = dcline["SETVL"] > 0 ? power_demand : -power_demand sub_data["pmint"] = pop!(dcline, "SETVL") > 0 ? -power_demand : power_demand sub_data["pmaxt"] = 0.0 @@ -910,8 +912,10 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) @info("$key outside reasonable limits, setting to 0 degress") end end - sub_data["rectifier_delay_angle_limits"] = (min=deg2rad(anmn[1]), max=deg2rad(dcline["ANMXR"])) - sub_data["inverter_extinction_angle_limits"] = (min=deg2rad(anmn[2]), max=deg2rad(dcline["ANMXI"])) + sub_data["rectifier_delay_angle_limits"] = + (min = deg2rad(anmn[1]), max = deg2rad(dcline["ANMXR"])) + sub_data["inverter_extinction_angle_limits"] = + (min = deg2rad(anmn[2]), max = deg2rad(dcline["ANMXI"])) sub_data["rectifier_delay_angle"] = deg2rad(anmn[1]) sub_data["inverter_extinction_angle"] = deg2rad(anmn[2]) @@ -923,12 +927,17 @@ function _psse2pm_dcline!(pm_data::Dict, pti_data::Dict, import_all::Bool) sub_data["qmint"] = -max(abs(sub_data["pmint"]), abs(sub_data["pmaxt"])) * cosd(anmn[2]) - sub_data["active_power_limits_from"] = (min=sub_data["pminf"], max=sub_data["pmaxf"]) - sub_data["active_power_limits_to"] = (min=sub_data["pmint"], max=sub_data["pmaxt"]) - sub_data["reactive_power_limits_from"] = (min=sub_data["qminf"], max=sub_data["qmaxf"]) - sub_data["reactive_power_limits_to"] = (min=sub_data["qmint"], max=sub_data["qmaxt"]) - - sub_data["commutating_capacitor_reactance"] = dcline["XCAPR"] + sub_data["active_power_limits_from"] = + (min = sub_data["pminf"], max = sub_data["pmaxf"]) + sub_data["active_power_limits_to"] = + (min = sub_data["pmint"], max = sub_data["pmaxt"]) + sub_data["reactive_power_limits_from"] = + (min = sub_data["qminf"], max = sub_data["qmaxf"]) + sub_data["reactive_power_limits_to"] = + (min = sub_data["qmint"], max = sub_data["qmaxt"]) + + sub_data["rectifier_capacitor_reactance"] = dcline["XCAPR"] / ZbaseR + sub_data["inverter_capacitor_reactance"] = dcline["XCAPI"] / ZbaseI # Costs (set to default values) # sub_data["startup"] = 0.0 From 0293b3fbce74c73880c993834782e7335097a689 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 23 Jan 2025 15:59:03 -0800 Subject: [PATCH 20/21] seperate dc lines between matpower and psse parser --- src/parsers/power_models_data.jl | 102 ++++++++++++++++++------------- 1 file changed, 61 insertions(+), 41 deletions(-) diff --git a/src/parsers/power_models_data.jl b/src/parsers/power_models_data.jl index b5d6b53e21..1d94650398 100644 --- a/src/parsers/power_models_data.jl +++ b/src/parsers/power_models_data.jl @@ -58,6 +58,7 @@ function System(pm_data::PowerModelsData; kwargs...) @info "Constructing System from Power Models" data["name"] data["source_type"] sys = System(data["baseMVA"]; kwargs...) + source_type = data["source_type"] bus_number_to_bus = read_bus!(sys, data; kwargs...) read_loads!(sys, data, bus_number_to_bus; kwargs...) @@ -65,7 +66,7 @@ function System(pm_data::PowerModelsData; kwargs...) read_gen!(sys, data, bus_number_to_bus; kwargs...) read_branch!(sys, data, bus_number_to_bus; kwargs...) read_shunt!(sys, data, bus_number_to_bus; kwargs...) - read_dcline!(sys, data, bus_number_to_bus; kwargs...) + read_dcline!(sys, data, bus_number_to_bus, source_type; kwargs...) read_storage!(sys, data, bus_number_to_bus; kwargs...) if runchecks check(sys) @@ -808,50 +809,69 @@ function read_branch!( end end -function make_dcline(name::String, d::Dict, bus_f::ACBus, bus_t::ACBus) - return TwoTerminalLCCLine(; - name = name, - available = d["available"], - active_power_flow = get(d, "pf", 0.0), - arc = Arc(bus_f, bus_t), - transfer_setpoint = 0.0, - scheduled_dc_voltage = d["scheduled_dc_voltage"], - rectifier_bridges = d["rectifier_bridges"], - rectifier_delay_angle_limits = d["rectifier_delay_angle_limits"], - rectifier_rc = d["rectifier_rc"], - rectifier_xc = d["rectifier_xc"], - rectifier_base_voltage = d["rectifier_base_voltage"], - inverter_bridges = d["inverter_bridges"], - inverter_extinction_angle_limits = d["inverter_extinction_angle_limits"], - inverter_rc = d["inverter_rc"], - inverter_xc = d["inverter_xc"], - inverter_base_voltage = d["inverter_base_voltage"], - power_mode = d["power_mode"], - switch_mode_voltage = d["switch_mode_voltage"], - compounding_resistance = d["compounding_resistance"], - min_compounding_voltage = d["min_compounding_voltage"], - rectifier_transformer_ratio = d["rectifier_transformer_ratio"], - rectifier_tap_setting = d["rectifier_tap_setting"], - rectifier_tap_limits = d["rectifier_tap_limits"], - rectifier_tap_step = d["rectifier_tap_step"], - rectifier_delay_angle = d["rectifier_delay_angle"], - inverter_transformer_ratio = d["inverter_transformer_ratio"], - inverter_tap_setting = d["inverter_tap_setting"], - inverter_tap_limits = d["inverter_tap_limits"], - inverter_tap_step = d["inverter_tap_step"], - inverter_extinction_angle = d["inverter_extinction_angle"], - active_power_limits_from = d["active_power_limits_from"], - active_power_limits_to = d["active_power_limits_to"], - reactive_power_limits_from = d["reactive_power_limits_from"], - reactive_power_limits_to = d["reactive_power_limits_to"], - loss = LinearCurve(d["loss1"], d["loss0"]), - ) +function make_dcline(name::String, d::Dict, bus_f::ACBus, bus_t::ACBus, source_type::String) + if source_type == "pti" + return TwoTerminalLCCLine(; + name = name, + available = d["available"], + active_power_flow = get(d, "pf", 0.0), + arc = Arc(bus_f, bus_t), + transfer_setpoint = d["transfer_setpoint"], + scheduled_dc_voltage = d["scheduled_dc_voltage"], + rectifier_bridges = d["rectifier_bridges"], + rectifier_delay_angle_limits = d["rectifier_delay_angle_limits"], + rectifier_rc = d["rectifier_rc"], + rectifier_xc = d["rectifier_xc"], + rectifier_base_voltage = d["rectifier_base_voltage"], + inverter_bridges = d["inverter_bridges"], + inverter_extinction_angle_limits = d["inverter_extinction_angle_limits"], + inverter_rc = d["inverter_rc"], + inverter_xc = d["inverter_xc"], + inverter_base_voltage = d["inverter_base_voltage"], + power_mode = d["power_mode"], + switch_mode_voltage = d["switch_mode_voltage"], + compounding_resistance = d["compounding_resistance"], + min_compounding_voltage = d["min_compounding_voltage"], + rectifier_transformer_ratio = d["rectifier_transformer_ratio"], + rectifier_tap_setting = d["rectifier_tap_setting"], + rectifier_tap_limits = d["rectifier_tap_limits"], + rectifier_tap_step = d["rectifier_tap_step"], + rectifier_delay_angle = d["rectifier_delay_angle"], + rectifier_capacitor_reactance = d["inverter_capacitor_reactance"], + inverter_transformer_ratio = d["inverter_transformer_ratio"], + inverter_tap_setting = d["inverter_tap_setting"], + inverter_tap_limits = d["inverter_tap_limits"], + inverter_tap_step = d["inverter_tap_step"], + inverter_extinction_angle = d["inverter_extinction_angle"], + inverter_capacitor_reactance = d["inverter_capacitor_reactance"], + active_power_limits_from = d["active_power_limits_from"], + active_power_limits_to = d["active_power_limits_to"], + reactive_power_limits_from = d["reactive_power_limits_from"], + reactive_power_limits_to = d["reactive_power_limits_to"], + loss = LinearCurve(d["loss1"], d["loss0"]), + ) + elseif source_type == "matpower" + return TwoTerminalHVDCLine(; + name = name, + available = d["br_status"] == 1, + active_power_flow = get(d, "pf", 0.0), + arc = Arc(bus_f, bus_t), + active_power_limits_from = (min = d["pminf"], max = d["pmaxf"]), + active_power_limits_to = (min = d["pmint"], max = d["pmaxt"]), + reactive_power_limits_from = (min = d["qminf"], max = d["qmaxf"]), + reactive_power_limits_to = (min = d["qmint"], max = d["qmaxt"]), + loss = LinearCurve(d["loss1"], d["loss0"]), + ) + else + error("Not supported source type for DC lines: $source_type") + end end function read_dcline!( sys::System, data::Dict, - bus_number_to_bus::Dict{Int, ACBus}; + bus_number_to_bus::Dict{Int, ACBus}, + source_type::String; kwargs..., ) @info "Reading DC Line data" @@ -867,7 +887,7 @@ function read_dcline!( bus_f = bus_number_to_bus[d["f_bus"]] bus_t = bus_number_to_bus[d["t_bus"]] name = _get_name(d, bus_f, bus_t) - dcline = make_dcline(name, d, bus_f, bus_t) + dcline = make_dcline(name, d, bus_f, bus_t, source_type) add_component!(sys, dcline; skip_validation = SKIP_PM_VALIDATION) end end From 72732d90ec808294d1b11c41c9391be62d664ab5 Mon Sep 17 00:00:00 2001 From: rodrigomha Date: Thu, 23 Jan 2025 15:59:12 -0800 Subject: [PATCH 21/21] add lcc parser test --- test/test_data/lcc_test.raw | 30 ++++++++++++++++++++++++++++++ test/test_parse_psse.jl | 15 +++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 test/test_data/lcc_test.raw diff --git a/test/test_data/lcc_test.raw b/test/test_data/lcc_test.raw new file mode 100644 index 0000000000..93562122bf --- /dev/null +++ b/test/test_data/lcc_test.raw @@ -0,0 +1,30 @@ +0, 100.00, 33, 0, 1, 60.00 +A Frankenstein network for testing two-terminal dc lines +developed by Carleton Coffrin (cjc@lanl.gov) and David Fobes (dfobes@lanl.gov) April 2018 +1001,'FAV SPOT 01', 87.0000, 1, 101, 201, 301,1.10000000, 0.000000, 1.10000, 0.90000, 1.10000, 0.90000 +1002,'FAV SPOT 02', 87.0000, 3, 101, 201, 301,1.00000000, 0.000000, 1.10000, 0.90000, 1.10000, 0.90000 +0 / END OF BUS DATA, BEGIN LOAD DATA +1002,'Z0',1, 101, 201, 10.500, 2.300, 0.000, 0.000, 0.000, 0.000, 301,1 +0 / END OF LOAD DATA, BEGIN FIXED SHUNT DATA +0 / END OF FIXED SHUNT DATA, BEGIN GENERATOR DATA +1002,'1 ', -22.000, -88.041, 250.000, -250.000,1.03000, 0, 100.000, 0.00000, 1.00000, 0.00000, 0.00000,1.00000,1, 100.0, 250.000, -250.000, 301,1.0000, 0,1.0000, 0,1.0000, 0,1.0000,0, 1.0000 +0 / END OF GENERATOR DATA, BEGIN BRANCH DATA +1001,1002,'1 ',4.75000E-4,4.68000E-3,8.20000E-2,1044.00,1170.00,1044.00, 0.00000, 0.00000, 0.00000, 0.00000,1,1, 9.4, 301,1.0000, 0,1.0000, 0,1.0000, 0,1.0000 +0 / END OF BRANCH DATA, BEGIN TRANSFORMER DATA +0 / END OF TRANSFORMER DATA, BEGIN AREA DATA +0 / END OF AREA DATA, BEGIN TWO-TERMINAL DC DATA +'TTDC Ln 1', 1, 0.1000, 20.00, 7.50, 0.00, 0.0000, 0.00000,I, 0.00, 20,1.00000 + 1002, 2, 90.00, 18.10, 0.0140, 0.5780, 230.0, 0.09772, 1.00000, 1.00000, 1.00000, 0.00624, 0, 0, 0, 1, 0.00000 + 1001, 2, 90.00, 17.40, 0.0140, 0.5670, 230.0, 0.07134, 1.00000, 1.00000, 1.00000, 0.00625, 0, 0, 0, 1, 0.00000 +0 / END OF TWO-TERMINAL DC DATA, BEGIN VOLTAGE SOURCE CONVERTER DATA +0 / END OF VOLTAGE SOURCE CONVERTER DATA, BEGIN IMPEDANCE CORRECTION DATA +0 / END OF IMPEDANCE CORRECTION DATA, BEGIN MULTI-TERMINAL DC DATA +0 / END OF MULTI-TERMINAL DC DATA, BEGIN MULTI-SECTION LINE DATA +0 / END OF MULTI-SECTION LINE DATA, BEGIN ZONE DATA +0 / END OF ZONE DATA, BEGIN INTER-AREA TRANSFER DATA +0 / END OF INTER-AREA TRANSFER DATA, BEGIN OWNER DATA +0 / END OF OWNER DATA, BEGIN FACTS CONTROL DEVICE DATA +0 / END OF FACTS CONTROL DEVICE DATA, BEGIN SWITCHED SHUNT DATA +0 /END OF SWITCHED SHUNT DATA, BEGIN GNE DEVICE DATA +0 /END OF GNE DEVICE DATA +Q diff --git a/test/test_parse_psse.jl b/test/test_parse_psse.jl index e31f34bc7b..da4d55091a 100644 --- a/test/test_parse_psse.jl +++ b/test/test_parse_psse.jl @@ -48,3 +48,18 @@ end lz_new = only(get_components(LoadZone, sys3)) @test parse(Int, get_name(lz_new)) == 3 * parse(Int, get_name(lz_original)) end + +@testset "PSSE LCC Parsing" begin + base_dir = string(dirname(@__FILE__)) + file_dir = joinpath(base_dir, "test_data", "lcc_test.raw") + sys = System(file_dir) + + lccs = get_components(TwoTerminalLCCLine, sys) + @test length(lccs) == 1 + lcc = only(lccs) + @test get_transfer_setpoint(lcc) == 20.0 + @test get_active_power_flow(lcc) == 0.2 + @test isapprox(get_rectifier_delay_angle_limits(lcc).max, pi / 2) + @test isapprox(get_inverter_extinction_angle_limits(lcc).max, pi / 2) + @test get_power_mode(lcc) +end