Skip to content

Commit 38daf3b

Browse files
committed
revert to 2024.1-1
1 parent cbcdbde commit 38daf3b

File tree

1,755 files changed

+861260
-165160
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

1,755 files changed

+861260
-165160
lines changed

latest/404.html

Lines changed: 2128 additions & 15 deletions
Large diffs are not rendered by default.
Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1 @@
1+
f8e43c984bed2b2393e8119006e0fae46116aaed
Lines changed: 156 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,156 @@
1+
2+
# File access.h
3+
4+
5+
6+
[**FileList**](files.md) **>** [**docs**](dir_49e56c817e5e54854c35e136979f97ca.md) **>** [**sw**](dir_55721a669a8e0900d975c02921addb49.md) **>** [**include**](dir_97b4588afba69bf89bbe554642ac6431.md) **>** [**opae**](dir_ade97cd9199f278c0723672dd8647ba4.md) **>** [**access.h**](access_8h.md)
7+
8+
[Go to the source code of this file.](access_8h_source.md)
9+
10+
_Functions to acquire, release, and reset OPAE FPGA resources._
11+
12+
* `#include <opae/types.h>`
13+
14+
15+
16+
17+
18+
19+
20+
21+
22+
23+
24+
25+
26+
27+
28+
## Public Functions
29+
30+
| Type | Name |
31+
| ---: | :--- |
32+
| [**fpga\_result**](types__enum_8h.md#enum-fpga_result) | [**fpgaClose**](#function-fpgaclose) ([**fpga\_handle**](types_8h.md#typedef-fpga_handle) handle) <br>_Close a previously opened FPGA object._ |
33+
| [**fpga\_result**](types__enum_8h.md#enum-fpga_result) | [**fpgaOpen**](#function-fpgaopen) ([**fpga\_token**](types_8h.md#typedef-fpga_token) token, [**fpga\_handle**](types_8h.md#typedef-fpga_handle) \* handle, int flags) <br>_Open an FPGA object._ |
34+
| [**fpga\_result**](types__enum_8h.md#enum-fpga_result) | [**fpgaReset**](#function-fpgareset) ([**fpga\_handle**](types_8h.md#typedef-fpga_handle) handle) <br>_Reset an FPGA object._ |
35+
36+
37+
38+
39+
40+
41+
42+
43+
## Public Functions Documentation
44+
45+
46+
### function fpgaClose
47+
48+
_Close a previously opened FPGA object._
49+
```C++
50+
fpga_result fpgaClose (
51+
fpga_handle handle
52+
)
53+
```
54+
55+
56+
57+
Relinquishes ownership of a previously [**fpgaOpen()**](access_8h.md#function-fpgaopen)ed resource. This enables others to acquire ownership if the resource was opened exclusively. Also deallocates / unmaps MMIO and UMsg memory areas.
58+
59+
60+
61+
62+
**Parameters:**
63+
64+
65+
* `handle` Handle to previously opened FPGA object
66+
67+
68+
69+
**Returns:**
70+
71+
FPGA\_OK on success. FPGA\_INVALID\_PARAM if handle does not refer to an acquired resource, or if handle is NULL. FPGA\_EXCEPTION if an internal error occurred while accessing the handle.
72+
73+
74+
75+
76+
77+
78+
79+
### function fpgaOpen
80+
81+
_Open an FPGA object._
82+
```C++
83+
fpga_result fpgaOpen (
84+
fpga_token token,
85+
fpga_handle * handle,
86+
int flags
87+
)
88+
```
89+
90+
91+
92+
Acquires ownership of the FPGA resource referred to by 'token'.
93+
94+
95+
Most often this will be used to open an accelerator object to directly interact with an accelerator function, or to open an FPGA object to perform management functions.
96+
97+
98+
99+
100+
**Parameters:**
101+
102+
103+
* `token` Pointer to token identifying resource to acquire ownership of
104+
* `handle` Pointer to preallocated memory to place a handle in. This handle will be used in subsequent API calls.
105+
* `flags` One of the following flags:
106+
* FPGA\_OPEN\_SHARED allows the resource to be opened multiple times (not supported in ASE) Shared resources (including buffers) are released when all associated handles have been closed (either explicitly with [**fpgaClose()**](access_8h.md#function-fpgaclose) or by process termination).
107+
108+
109+
110+
111+
112+
**Returns:**
113+
114+
FPGA\_OK on success. FPGA\_NOT\_FOUND if the resource for 'token' could not be found. FPGA\_INVALID\_PARAM if 'token' does not refer to a resource that can be opened, or if either argument is NULL or invalid. FPGA\_EXCEPTION if an internal exception occurred while creating the handle. FPGA\_NO\_DRIVER if the driver is not loaded. FPGA\_BUSY if trying to open a resource that has already been opened in exclusive mode. FPGA\_NO\_ACCESS if the current process' privileges are not sufficient to open the resource.
115+
116+
117+
118+
119+
120+
121+
122+
### function fpgaReset
123+
124+
_Reset an FPGA object._
125+
```C++
126+
fpga_result fpgaReset (
127+
fpga_handle handle
128+
)
129+
```
130+
131+
132+
133+
Performs an accelerator reset.
134+
135+
136+
137+
138+
**Parameters:**
139+
140+
141+
* `handle` Handle to previously opened FPGA object
142+
143+
144+
145+
**Returns:**
146+
147+
FPGA\_OK on success. FPGA\_INVALID\_PARAM if handle does not refer to an acquired resource or to a resource that cannot be reset. FPGA\_EXCEPTION if an internal error occurred while trying to access the handle or resetting the resource.
148+
149+
150+
151+
152+
153+
154+
155+
------------------------------
156+
The documentation for this class was generated from the following file `docs/sw/include/opae/access.h`
Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,58 @@
1+
2+
# File access.h
3+
4+
[**File List**](files.md) **>** [**docs**](dir_49e56c817e5e54854c35e136979f97ca.md) **>** [**sw**](dir_55721a669a8e0900d975c02921addb49.md) **>** [**include**](dir_97b4588afba69bf89bbe554642ac6431.md) **>** [**opae**](dir_ade97cd9199f278c0723672dd8647ba4.md) **>** [**access.h**](access_8h.md)
5+
6+
[Go to the documentation of this file.](access_8h.md)
7+
8+
```C++
9+
10+
// Copyright(c) 2017, Intel Corporation
11+
//
12+
// Redistribution and use in source and binary forms, with or without
13+
// modification, are permitted provided that the following conditions are met:
14+
//
15+
// * Redistributions of source code must retain the above copyright notice,
16+
// this list of conditions and the following disclaimer.
17+
// * Redistributions in binary form must reproduce the above copyright notice,
18+
// this list of conditions and the following disclaimer in the documentation
19+
// and/or other materials provided with the distribution.
20+
// * Neither the name of Intel Corporation nor the names of its contributors
21+
// may be used to endorse or promote products derived from this software
22+
// without specific prior written permission.
23+
//
24+
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25+
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26+
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27+
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28+
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29+
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30+
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31+
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32+
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33+
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34+
// POSSIBILITY OF SUCH DAMAGE.
35+
36+
#ifndef __FPGA_ACCESS_H__
37+
#define __FPGA_ACCESS_H__
38+
39+
#include <opae/types.h>
40+
41+
#ifdef __cplusplus
42+
extern "C" {
43+
#endif
44+
45+
fpga_result fpgaOpen(fpga_token token, fpga_handle *handle,
46+
int flags);
47+
48+
fpga_result fpgaClose(fpga_handle handle);
49+
50+
fpga_result fpgaReset(fpga_handle handle);
51+
52+
#ifdef __cplusplus
53+
} // extern "C"
54+
#endif // __cplusplus
55+
56+
#endif // __FPGA_ACCESS_H__
57+
58+
```
Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,58 @@
1+
# Class List
2+
3+
Here are the classes, structs, unions and interfaces with brief descriptions:
4+
5+
6+
* **struct** [**\_fpga\_token\_header**](struct__fpga__token__header.md) _Internal token type header._
7+
* **struct** [**\_opae\_hash\_map**](struct__opae__hash__map.md) _Hash map object._
8+
* **struct** [**\_opae\_hash\_map\_item**](struct__opae__hash__map__item.md) _List link item._
9+
* **struct** [**cache\_line**](structcache__line.md)
10+
* **struct** [**config**](structconfig.md)
11+
* **struct** [**fpga\_error\_info**](structfpga__error__info.md)
12+
* **struct** [**fpga\_metric**](structfpga__metric.md) _Metric struct._
13+
* **struct** [**fpga\_metric\_info**](structfpga__metric__info.md) _Metric info struct._
14+
* **struct** [**fpga\_version**](structfpga__version.md) _Semantic version._
15+
* **struct** [**mem\_alloc**](structmem__alloc.md)
16+
* **struct** [**mem\_link**](structmem__link.md) _Provides an API for allocating/freeing a logical address space._
17+
* **struct** [**metric\_threshold**](structmetric__threshold.md)
18+
* **union** [**metric\_value**](unionmetric__value.md) _Metric value union._
19+
* **namespace** [**opae**](namespaceopae.md)
20+
* **namespace** [**fpga**](namespaceopae_1_1fpga.md)
21+
* **namespace** [**types**](namespaceopae_1_1fpga_1_1types.md)
22+
* **class** [**busy**](classopae_1_1fpga_1_1types_1_1busy.md) _busy exception_
23+
* **namespace** [**detail**](namespaceopae_1_1fpga_1_1types_1_1detail.md)
24+
* **class** [**error**](classopae_1_1fpga_1_1types_1_1error.md) _An error object represents an error register for a resource._
25+
* **class** [**event**](classopae_1_1fpga_1_1types_1_1event.md) _Wraps fpga event routines in OPAE C._
26+
* **struct** [**type\_t**](structopae_1_1fpga_1_1types_1_1event_1_1type__t.md) _C++ struct that is interchangeable with fpga\_event\_type enum._
27+
* **class** [**except**](classopae_1_1fpga_1_1types_1_1except.md) _Generic OPAE exception._
28+
* **class** [**exception**](classopae_1_1fpga_1_1types_1_1exception.md) _exception exception_
29+
* **struct** [**guid\_t**](structopae_1_1fpga_1_1types_1_1guid__t.md) _Representation of the guid member of a properties object._
30+
* **class** [**handle**](classopae_1_1fpga_1_1types_1_1handle.md) _An allocated accelerator resource._
31+
* **class** [**invalid\_param**](classopae_1_1fpga_1_1types_1_1invalid__param.md) [_**invalid\_param**_](classopae_1_1fpga_1_1types_1_1invalid__param.md) _exception_
32+
* **class** [**no\_access**](classopae_1_1fpga_1_1types_1_1no__access.md) [_**no\_access**_](classopae_1_1fpga_1_1types_1_1no__access.md) _exception_
33+
* **class** [**no\_daemon**](classopae_1_1fpga_1_1types_1_1no__daemon.md) [_**no\_daemon**_](classopae_1_1fpga_1_1types_1_1no__daemon.md) _exception_
34+
* **class** [**no\_driver**](classopae_1_1fpga_1_1types_1_1no__driver.md) [_**no\_driver**_](classopae_1_1fpga_1_1types_1_1no__driver.md) _exception_
35+
* **class** [**no\_memory**](classopae_1_1fpga_1_1types_1_1no__memory.md) [_**no\_memory**_](classopae_1_1fpga_1_1types_1_1no__memory.md) _exception_
36+
* **class** [**not\_found**](classopae_1_1fpga_1_1types_1_1not__found.md) [_**not\_found**_](classopae_1_1fpga_1_1types_1_1not__found.md) _exception_
37+
* **class** [**not\_supported**](classopae_1_1fpga_1_1types_1_1not__supported.md) [_**not\_supported**_](classopae_1_1fpga_1_1types_1_1not__supported.md) _exception_
38+
* **class** [**properties**](classopae_1_1fpga_1_1types_1_1properties.md) _Wraps an OPAE fpga\_properties object._
39+
* **struct** [**pvalue**](structopae_1_1fpga_1_1types_1_1pvalue.md) _Wraps OPAE properties defined in the OPAE C API by associating an_ `fpga_properties` _reference with the getters and setters defined for a property._
40+
* **class** [**reconf\_error**](classopae_1_1fpga_1_1types_1_1reconf__error.md) [_**reconf\_error**_](classopae_1_1fpga_1_1types_1_1reconf__error.md) _exception_
41+
* **class** [**shared\_buffer**](classopae_1_1fpga_1_1types_1_1shared__buffer.md) _Host/AFU shared memory blocks._
42+
* **class** [**src\_location**](classopae_1_1fpga_1_1types_1_1src__location.md) _Identify a particular line in a source file._
43+
* **class** [**sysobject**](classopae_1_1fpga_1_1types_1_1sysobject.md) _Wraps the OPAE fpga\_object primitive._
44+
* **class** [**token**](classopae_1_1fpga_1_1types_1_1token.md) _Wraps the OPAE fpga\_token primitive._
45+
* **class** [**version**](classopae_1_1fpga_1_1types_1_1version.md)
46+
* **struct** [**opae\_uio**](structopae__uio.md) _OPAE UIO device abstraction._
47+
* **struct** [**opae\_uio\_device\_region**](structopae__uio__device__region.md) _MMIO region info._
48+
* **struct** [**opae\_vfio**](structopae__vfio.md) _OPAE VFIO device abstraction._
49+
* **struct** [**opae\_vfio\_buffer**](structopae__vfio__buffer.md) _System DMA buffer._
50+
* **struct** [**opae\_vfio\_device**](structopae__vfio__device.md) _VFIO device._
51+
* **struct** [**opae\_vfio\_device\_irq**](structopae__vfio__device__irq.md) _Interrupt info._
52+
* **struct** [**opae\_vfio\_device\_region**](structopae__vfio__device__region.md) _MMIO region info._
53+
* **struct** [**opae\_vfio\_group**](structopae__vfio__group.md) _VFIO group._
54+
* **struct** [**opae\_vfio\_iova\_range**](structopae__vfio__iova__range.md) _IO Virtual Address Range._
55+
* **struct** [**opae\_vfio\_sparse\_info**](structopae__vfio__sparse__info.md) _MMIO sparse-mappable region info._
56+
* **struct** [**ras\_inject\_error**](structras__inject__error.md)
57+
* **namespace** [**std**](namespacestd.md)
58+
* **struct** [**threshold**](structthreshold.md) _Threshold struct._

0 commit comments

Comments
 (0)