CHANGES.TXT

Bitvis UART - Overview on Versions and Changes
==============================================================


v1.1.6
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Released: 2021-10-22
- Updated ghdl_compile_all_and_simulate.sh with new uvvm_util 
  packages.

v1.1.5
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Released: 2019-11-21
- Fixed an issue when receiving back-to-back transactions 
  could cause the DUT to issue an alert.
- Updated LICENSE.TXT

v1.1.4
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Released: 2019-06-06
- Minor changes to scripts.
- Renamed demo testbench.

v1.1.3
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Released: 2018-09-28
- Minor documentation changes

v1.1.2
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Released: 2018-08-30
- Scripts updated to work with Riviera Pro

v1.1.1
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Released: 2017-12-20
- Removed log() overload from TB.

v1.1.0
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Released: 2017-10-16
- Added compile library name to compile_order.txt for use in compile_src.do
  script and GHDL compile scripts.
- Added generic parameter to set the number of equal samples needed per bit.
- Fixed bug that made insert_delay() override inter_bfm_delay in VVC executor.
- Updated VVC quick reference PDF.

v1.0.4
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Released: 2017-06-08
- Added compile order file to script folder