create red pitaya hardware module

[mvbnano]

A Red Pitaya hardware module will be useful for many things. Our immediate applications will be to control the galvo mirrors and to trigger the SMIQ ODMR sequence.

[mvbnano]

Looks like by using a combination of the RPyC (Remote Python Call) and PyRedPitaya packages you can connect to RP boards from the terminal

from rpyc import connect
from PyRedPitaya.pc import RedPitaya

conn = connect(REDPITAYA_IP, port=18861)
redpitaya = RedPitaya(conn)

print redpitaya.ams.temp # Read property
redpitaya.hk.led = 0b10101010 # Write property

from time import sleep
from pylab import *

redpitaya.scope.setup(frequency = 100, trigger_source=1)
sleep(100E-3)
plot(redpitaya.scope.times, redpitaya.scope.data_ch1)
show()

[mvbnano]

Upon completion of remote connecting test and satisfies oscilloscope requirements for @CyLap , then purchase 3x Red Pitayas.

Can be easily purchased through RS Components.

[latchr]

Today we had a chat about the convergence of this task with the similar one for using the TimeTagger for ODMR. It is important to think of the Red Pitaya module separately from the counting (which will be done using the TimeTagger).

The code that is needed here is:

1. Hardware module to drive the Red Pitaya as a "general scanner"
2. Interface defined for general scanner.
3. Interface defined for hardware trigger.
4. In the Red Pitaya hw module we need to import the hardware trigger interface and pass it through to the RP class. This will look like the opening lines of the NI X-series hw module.
5. There will need to be a separate "triggered counter" interface and HW module created (Create "triggered counter" #43)
6. We will need an interfuse which connects the "general scanner" (RP), "hardware trigger" (RP), "triggered counter" (TT) into a "confocal scanner". In particular this will revolve around the scan_line method.

The final config will look a bit like this

hardware:
    rp_scanner:
        module.Class: 'red_pitaya.RedPitaya'
        ...V output channels...
        trigger_channel: 'D0'

    mytimetagger:
        module.Class: 'timetagger.TimeTagger'
        
logic:

    rp_tt_interfuse:
        module.Class: 'interfuse.scanner_trigger_counter_interfuse.ScannerTriggerCounterInterfuse'
        connect:
            scanner: 'rp_scanner'
            trigger: 'rp_scanner'
            counter: 'mytimetagger'

    scannerlogic:
        module.Class: 'confocal_logic.ConfocalLogic'
        connect:
            confocalscanner1: 'rp_tt_interfuse'
            savelogic: 'savelogic'

[latchr]

To get there from where we are now:

1. The scan_line() method in hw.red_pitaya already has trigger built into it. I think this method should be moved to the scanner_trigger_counter_interfuse.py file. In the RP hw file we need a method called "set_up_line()"
2. The interfuse file now gets the scan_line() method. It starts by calling rp.set_up_line(...) Then it calls tt.set_up_counter(...). Then it calls trigger.fire(). Then it would have to wait and I'm not sure where this needs to happen, maybe just a well-calculated time.sleep(). Then it calls tt.get_counts() and then it can return the arrray of counts which correspond to positions along the line.
3. To do this, we probably need to make the _set_up_line() method public. In fact, this is the method needed in step 1 above!

[latchr]

To do step 6 (create interfuse) I suggest starting with the confocal_scanner_interface.py file. Then look at the opening lines of interfuse/confocal_scanner_spectrometer_interfuse.py file for ideas. We will end up with 3 hw devices essentially defined in on_activate: "self._scanner_hw", "self._trigger_hw", "self._counter_hw".

Then, simply pass through as required. The exception is for scan_line, which is where you stitch together as metioned above.