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Note on upcoming refactor of memory layout #38

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GiggleLiu opened this issue Nov 29, 2019 · 0 comments
Open

Note on upcoming refactor of memory layout #38

GiggleLiu opened this issue Nov 29, 2019 · 0 comments

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@GiggleLiu
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GiggleLiu commented Nov 29, 2019

To improve the performance of batched registers, we will swith the storage to batch-as-row layout.

Some unpleasant changes

  • for batch-as-row storage, the input matrix should be transpose to be multiplied on left.
  • it is more effective to focus on last n bits rather than first n bits.
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