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b_u585i_iot02a_bus.c
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/**
******************************************************************************
* @file b_u585i_iot02a_bus.c
* @author MCD Application Team
* @brief This file provides a set of firmware functions to communicate
* with external devices available on B_U585I_IOT02A board
* from STMicroelectronics.
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "b_u585i_iot02a_bus.h"
#include "b_u585i_iot02a_errno.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup B_U585I_IOT02A
* @{
*/
/** @defgroup B_U585I_IOT02A_BUS BUS
* @{
*/
/** @defgroup B_U585I_IOT02A_BUS_Private_Constants BUS Private Constants
* @{
*/
#ifndef I2C_VALID_TIMING_NBR
#define I2C_VALID_TIMING_NBR 128U
#endif /* I2C_VALID_TIMING_NBR */
#define I2C_SPEED_FREQ_STANDARD 0U /* 100 kHz */
#define I2C_SPEED_FREQ_FAST 1U /* 400 kHz */
#define I2C_SPEED_FREQ_FAST_PLUS 2U /* 1 MHz */
#define I2C_ANALOG_FILTER_DELAY_MIN 50U /* ns */
#define I2C_ANALOG_FILTER_DELAY_MAX 260U /* ns */
#define I2C_USE_ANALOG_FILTER 1U
#define I2C_DIGITAL_FILTER_COEF 0U
#define I2C_PRESC_MAX 16U
#define I2C_SCLDEL_MAX 16U
#define I2C_SDADEL_MAX 16U
#define I2C_SCLH_MAX 256U
#define I2C_SCLL_MAX 256U
#define SEC2NSEC 1000000000UL
/**
* @}
*/
/** @defgroup B_U585I_IOT02A_BUS_Private_Types BUS Private Types
* @{
*/
typedef struct
{
uint32_t freq; /* Frequency in Hz */
uint32_t freq_min; /* Minimum frequency in Hz */
uint32_t freq_max; /* Maximum frequency in Hz */
uint32_t hddat_min; /* Minimum data hold time in ns */
uint32_t vddat_max; /* Maximum data valid time in ns */
uint32_t sudat_min; /* Minimum data setup time in ns */
uint32_t lscl_min; /* Minimum low period of the SCL clock in ns */
uint32_t hscl_min; /* Minimum high period of SCL clock in ns */
uint32_t trise; /* Rise time in ns */
uint32_t tfall; /* Fall time in ns */
uint32_t dnf; /* Digital noise filter coefficient */
} I2C_Charac_t;
typedef struct
{
uint32_t presc; /* Timing prescaler */
uint32_t tscldel; /* SCL delay */
uint32_t tsdadel; /* SDA delay */
uint32_t sclh; /* SCL high period */
uint32_t scll; /* SCL low period */
} I2C_Timings_t;
/**
* @}
*/
/** @defgroup B_U585I_IOT02A_BUS_Private_Constants BUS Private Constants
* @{
*/
static const I2C_Charac_t I2C_Charac[] =
{
[I2C_SPEED_FREQ_STANDARD] =
{
.freq = 100000,
.freq_min = 80000,
.freq_max = 120000,
.hddat_min = 0,
.vddat_max = 3450,
.sudat_min = 250,
.lscl_min = 4700,
.hscl_min = 4000,
.trise = 640,
.tfall = 20,
.dnf = I2C_DIGITAL_FILTER_COEF,
},
[I2C_SPEED_FREQ_FAST] =
{
.freq = 400000,
.freq_min = 320000,
.freq_max = 480000,
.hddat_min = 0,
.vddat_max = 900,
.sudat_min = 100,
.lscl_min = 1300,
.hscl_min = 600,
.trise = 250,
.tfall = 100,
.dnf = I2C_DIGITAL_FILTER_COEF,
},
[I2C_SPEED_FREQ_FAST_PLUS] =
{
.freq = 1000000,
.freq_min = 800000,
.freq_max = 1200000,
.hddat_min = 0,
.vddat_max = 450,
.sudat_min = 50,
.lscl_min = 500,
.hscl_min = 260,
.trise = 60,
.tfall = 100,
.dnf = I2C_DIGITAL_FILTER_COEF,
},
};
/**
* @}
*/
/** @defgroup B_U585I_IOT02A_BUS_Private_Variables BUS Private Variables
* @{
*/
#if (USE_HAL_I2C_REGISTER_CALLBACKS > 0)
static uint32_t IsI2c1MspCbValid = 0;
static uint32_t IsI2c2MspCbValid = 0;
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
static uint32_t I2c1InitCounter = 0;
static uint32_t I2c2InitCounter = 0;
static I2C_Timings_t I2c_valid_timing[I2C_VALID_TIMING_NBR];
static uint32_t I2c_valid_timing_nbr = 0;
#if defined(BSP_USE_CMSIS_OS)
static osSemaphoreId BspI2cSemaphore = 0;
#endif /* BSP_USE_CMSIS_OS */
/**
* @}
*/
/** @defgroup B_U585I_IOT02A_BUS_Exported_Variables BUS Exported Variables
* @{
*/
I2C_HandleTypeDef hbus_i2c1;
I2C_HandleTypeDef hbus_i2c2;
/**
* @}
*/
/** @defgroup B_U585I_IOT02A_BUS_Private_FunctionPrototypes BUS Private FunctionPrototypes
* @{
*/
static void I2C1_MspInit(const I2C_HandleTypeDef *hI2c);
static void I2C1_MspDeInit(const I2C_HandleTypeDef *hI2c);
static int32_t I2C1_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C1_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C1_Recv(uint16_t DevAddr, uint8_t *pData, uint16_t Length);
static int32_t I2C1_Send(uint16_t DevAddr, uint8_t *pData, uint16_t Length);
static void I2C2_MspInit(const I2C_HandleTypeDef *hI2c);
static void I2C2_MspDeInit(const I2C_HandleTypeDef *hI2c);
static int32_t I2C2_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C2_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C2_Recv(uint16_t DevAddr, uint8_t *pData, uint16_t Length);
static int32_t I2C2_Send(uint16_t DevAddr, uint8_t *pData, uint16_t Length);
static uint32_t I2C_GetTiming(uint32_t clock_src_freq, uint32_t i2c_freq);
static uint32_t I2C_Compute_SCLL_SCLH(uint32_t clock_src_freq, uint32_t I2C_speed);
static void I2C_Compute_PRESC_SCLDEL_SDADEL(uint32_t clock_src_freq, uint32_t I2C_speed);
/**
* @}
*/
/** @defgroup B_U585I_IOT02A_BUS_Exported_Functions BUS Exported Functions
* @{
*/
/**
* @brief Initializes I2C1 HAL.
* @retval BSP status
*/
int32_t BSP_I2C1_Init(void)
{
int32_t ret = BSP_ERROR_NONE;
hbus_i2c1.Instance = BUS_I2C1;
if (I2c1InitCounter == 0U)
{
I2c1InitCounter++;
if (HAL_I2C_GetState(&hbus_i2c1) == HAL_I2C_STATE_RESET)
{
#if defined(BSP_USE_CMSIS_OS)
if (BspI2cSemaphore == NULL)
{
/* Create semaphore to prevent multiple I2C access */
osSemaphoreDef(BSP_I2C_SEM);
BspI2cSemaphore = osSemaphoreCreate(osSemaphore(BSP_I2C_SEM), 1);
}
#endif /* BSP_USE_CMSIS_OS */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
/* Init the I2C1 Msp */
I2C1_MspInit(&hbus_i2c1);
#else
if (IsI2c2MspCbValid == 0U)
{
if (BSP_I2C1_RegisterDefaultMspCallbacks() != BSP_ERROR_NONE)
{
ret = BSP_ERROR_MSP_FAILURE;
}
}
if (ret == BSP_ERROR_NONE)
{
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
if (MX_I2C1_Init(&hbus_i2c1, I2C_GetTiming(HAL_RCC_GetPCLK1Freq(), BUS_I2C1_FREQUENCY)) != HAL_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
#if (USE_HAL_I2C_REGISTER_CALLBACKS > 0)
}
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
return ret;
}
/**
* @brief DeInitializes I2C HAL.
* @retval BSP status
*/
int32_t BSP_I2C1_DeInit(void)
{
int32_t ret = BSP_ERROR_NONE;
I2c1InitCounter--;
if (I2c1InitCounter == 0U)
{
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
I2C1_MspDeInit(&hbus_i2c1);
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 0) */
/* Init the I2C */
if (HAL_I2C_DeInit(&hbus_i2c1) != HAL_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
}
return ret;
}
/**
* @brief MX I2C1 initialization.
* @param hI2c I2C handle
* @param timing I2C timing
* @retval HAL status
*/
__weak HAL_StatusTypeDef MX_I2C1_Init(I2C_HandleTypeDef *hI2c, uint32_t timing)
{
HAL_StatusTypeDef status = HAL_OK;
hI2c->Init.Timing = timing;
hI2c->Init.OwnAddress1 = 0;
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hI2c->Init.OwnAddress2 = 0;
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(hI2c) != HAL_OK)
{
status = HAL_ERROR;
}
else
{
uint32_t analog_filter;
analog_filter = I2C_ANALOGFILTER_ENABLE;
if (HAL_I2CEx_ConfigAnalogFilter(hI2c, analog_filter) != HAL_OK)
{
status = HAL_ERROR;
}
else
{
if (HAL_I2CEx_ConfigDigitalFilter(hI2c, I2C_DIGITAL_FILTER_COEF) != HAL_OK)
{
status = HAL_ERROR;
}
}
}
return status;
}
/**
* @brief Write a 8bit value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length buffer size to be written
* @retval BSP status
*/
int32_t BSP_I2C1_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read a 8bit register of the device through BUS
* @param DevAddr Device address on BUS
* @param Reg The target register address to read
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C1_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Write a 16bit value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length buffer size to be written
* @retval BSP status
*/
int32_t BSP_I2C1_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read a 16bit register of the device through BUS
* @param DevAddr Device address on BUS
* @param Reg The target register address to read
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C1_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read data
* @param DevAddr Device address on BUS
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C1_Recv(uint16_t DevAddr, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_Recv(DevAddr, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Send data
* @param DevAddr Device address on BUS
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C1_Send(uint16_t DevAddr, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_Send(DevAddr, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Checks if target device is ready for communication.
* @note This function is used with Memory devices
* @param DevAddr Target device address
* @param Trials Number of trials
* @retval BSP status
*/
int32_t BSP_I2C1_IsReady(uint16_t DevAddr, uint32_t Trials)
{
int32_t ret = BSP_ERROR_NONE;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (HAL_I2C_IsDeviceReady(&hbus_i2c1, DevAddr, Trials, 1000) != HAL_OK)
{
ret = BSP_ERROR_BUSY;
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
#if (USE_HAL_I2C_REGISTER_CALLBACKS > 0)
/**
* @brief Register Default I2C1 Bus Msp Callbacks
* @retval BSP status
*/
int32_t BSP_I2C1_RegisterDefaultMspCallbacks(void)
{
int32_t ret = BSP_ERROR_NONE;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
__HAL_I2C_RESET_HANDLE_STATE(&hbus_i2c1);
/* Register default MspInit/MspDeInit Callback */
if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPINIT_CB_ID, I2C1_MspInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPDEINIT_CB_ID, I2C1_MspDeInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsI2c2MspCbValid = 1U;
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
/* BSP status */
return ret;
}
/**
* @brief Register I2C1 Bus Msp Callback registering
* @param Callbacks pointer to I2C1 MspInit/MspDeInit callback functions
* @retval BSP status
*/
int32_t BSP_I2C1_RegisterMspCallbacks(BSP_I2C_Cb_t *Callback)
{
int32_t ret = BSP_ERROR_NONE;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
__HAL_I2C_RESET_HANDLE_STATE(&hbus_i2c1);
/* Register MspInit/MspDeInit Callbacks */
if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPINIT_CB_ID, Callback->pMspI2cInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPDEINIT_CB_ID, Callback->pMspI2cDeInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsI2c2MspCbValid = 1U;
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
/* BSP status */
return ret;
}
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
/**
* @brief Initializes I2C2 HAL.
* @retval BSP status
*/
int32_t BSP_I2C2_Init(void)
{
int32_t ret = BSP_ERROR_NONE;
hbus_i2c2.Instance = BUS_I2C2;
if (I2c2InitCounter == 0U)
{
I2c2InitCounter++;
if (HAL_I2C_GetState(&hbus_i2c2) == HAL_I2C_STATE_RESET)
{
#if defined(BSP_USE_CMSIS_OS)
if (BspI2cSemaphore == NULL)
{
/* Create semaphore to prevent multiple I2C access */
osSemaphoreDef(BSP_I2C_SEM);
BspI2cSemaphore = osSemaphoreCreate(osSemaphore(BSP_I2C_SEM), 1);
}
#endif /* BSP_USE_CMSIS_OS */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
/* Init the I2C2 Msp */
I2C2_MspInit(&hbus_i2c2);
#else
if (IsI2c2MspCbValid == 0U)
{
if (BSP_I2C2_RegisterDefaultMspCallbacks() != BSP_ERROR_NONE)
{
ret = BSP_ERROR_MSP_FAILURE;
}
}
if (ret == BSP_ERROR_NONE)
{
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
if (MX_I2C2_Init(&hbus_i2c2, I2C_GetTiming(HAL_RCC_GetPCLK1Freq(), BUS_I2C2_FREQUENCY)) != HAL_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
#if (USE_HAL_I2C_REGISTER_CALLBACKS > 0)
}
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
return ret;
}
/**
* @brief DeInitializes I2C HAL.
* @retval BSP status
*/
int32_t BSP_I2C2_DeInit(void)
{
int32_t ret = BSP_ERROR_NONE;
I2c2InitCounter--;
if (I2c2InitCounter == 0U)
{
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
I2C2_MspDeInit(&hbus_i2c2);
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 0) */
/* Init the I2C */
if (HAL_I2C_DeInit(&hbus_i2c2) != HAL_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
}
return ret;
}
/**
* @brief MX I2C2 initialization.
* @param hI2c I2C handle
* @param timing I2C timing
* @retval HAL status
*/
__weak HAL_StatusTypeDef MX_I2C2_Init(I2C_HandleTypeDef *hI2c, uint32_t timing)
{
HAL_StatusTypeDef status = HAL_OK;
hI2c->Init.Timing = timing;
hI2c->Init.OwnAddress1 = 0;
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hI2c->Init.OwnAddress2 = 0;
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(hI2c) != HAL_OK)
{
status = HAL_ERROR;
}
else
{
uint32_t analog_filter;
analog_filter = I2C_ANALOGFILTER_ENABLE;
if (HAL_I2CEx_ConfigAnalogFilter(hI2c, analog_filter) != HAL_OK)
{
status = HAL_ERROR;
}
else
{
if (HAL_I2CEx_ConfigDigitalFilter(hI2c, I2C_DIGITAL_FILTER_COEF) != HAL_OK)
{
status = HAL_ERROR;
}
}
}
return status;
}
/**
* @brief Write a 8bit value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length buffer size to be written
* @retval BSP status
*/
int32_t BSP_I2C2_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C2_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read a 8bit register of the device through BUS
* @param DevAddr Device address on BUS
* @param Reg The target register address to read
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C2_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C2_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Write a 16bit value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length buffer size to be written
* @retval BSP status
*/
int32_t BSP_I2C2_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C2_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read a 16bit register of the device through BUS
* @param DevAddr Device address on BUS
* @param Reg The target register address to read
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C2_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C2_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read data
* @param DevAddr Device address on BUS
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C2_Recv(uint16_t DevAddr, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C2_Recv(DevAddr, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Send data
* @param DevAddr Device address on BUS
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C2_Send(uint16_t DevAddr, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C2_Send(DevAddr, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */