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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
| 2 | + |
| 3 | +#include "mt7620a.dtsi" |
| 4 | + |
| 5 | +#include <dt-bindings/gpio/gpio.h> |
| 6 | +#include <dt-bindings/input/input.h> |
| 7 | +#include <dt-bindings/leds/common.h> |
| 8 | +#include <dt-bindings/mtd/partitions/uimage.h> |
| 9 | + |
| 10 | +/ { |
| 11 | + compatible = "bolt,bl100", "ralink,mt7620a-soc"; |
| 12 | + model = "Bolt BL100"; |
| 13 | + |
| 14 | + aliases { |
| 15 | + led-boot = &led_reset; |
| 16 | + led-failsafe = &led_reset; |
| 17 | + led-running = &led_power; |
| 18 | + led-upgrade = &led_reset; |
| 19 | + label-mac-device = ðernet; |
| 20 | + }; |
| 21 | + |
| 22 | + chosen { |
| 23 | + bootargs = "console=ttyS0,57600"; |
| 24 | + }; |
| 25 | + |
| 26 | + leds { |
| 27 | + compatible = "gpio-leds"; |
| 28 | + |
| 29 | + led_reset: reset { |
| 30 | + function = LED_FUNCTION_BOOT; |
| 31 | + color = <LED_COLOR_ID_RED>; |
| 32 | + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; |
| 33 | + }; |
| 34 | + |
| 35 | + led_power: power { |
| 36 | + function = LED_FUNCTION_POWER; |
| 37 | + color = <LED_COLOR_ID_BLUE>; |
| 38 | + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; |
| 39 | + }; |
| 40 | + |
| 41 | + led_lte1 { |
| 42 | + label = "blue:lte1"; |
| 43 | + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; |
| 44 | + }; |
| 45 | + |
| 46 | + led_lte2 { |
| 47 | + label = "blue:lte2"; |
| 48 | + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; |
| 49 | + }; |
| 50 | + |
| 51 | + led_lte3 { |
| 52 | + label = "blue:lte3"; |
| 53 | + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
| 54 | + }; |
| 55 | + |
| 56 | + led_lte4 { |
| 57 | + label = "blue:lte4"; |
| 58 | + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; |
| 59 | + }; |
| 60 | + |
| 61 | + led_lte5 { |
| 62 | + label = "red:lte5"; |
| 63 | + gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; |
| 64 | + }; |
| 65 | + |
| 66 | + led_lte6 { |
| 67 | + label = "red:lte6"; |
| 68 | + gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; |
| 69 | + }; |
| 70 | + |
| 71 | + led_wps { |
| 72 | + function = LED_FUNCTION_WPS; |
| 73 | + color = <LED_COLOR_ID_BLUE>; |
| 74 | + gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; |
| 75 | + }; |
| 76 | + |
| 77 | + led_voip { |
| 78 | + label = "blue:voip"; |
| 79 | + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; |
| 80 | + }; |
| 81 | + |
| 82 | + led_wlan2 { |
| 83 | + function = LED_FUNCTION_WLAN_2GHZ; |
| 84 | + color = <LED_COLOR_ID_BLUE>; |
| 85 | + gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; |
| 86 | + linux,default-trigger = "phy1tpt"; |
| 87 | + }; |
| 88 | + |
| 89 | + led_wlan5 { |
| 90 | + function = LED_FUNCTION_WLAN_5GHZ; |
| 91 | + color = <LED_COLOR_ID_BLUE>; |
| 92 | + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; |
| 93 | + linux,default-trigger = "phy0tpt"; |
| 94 | + }; |
| 95 | + |
| 96 | + led_lan { |
| 97 | + function = LED_FUNCTION_LAN; |
| 98 | + color = <LED_COLOR_ID_GREEN>; |
| 99 | + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; |
| 100 | + }; |
| 101 | + |
| 102 | + led_wan { |
| 103 | + function = LED_FUNCTION_WAN; |
| 104 | + color = <LED_COLOR_ID_GREEN>; |
| 105 | + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; |
| 106 | + }; |
| 107 | + }; |
| 108 | + |
| 109 | + keys { |
| 110 | + compatible = "gpio-keys"; |
| 111 | + |
| 112 | + wps { |
| 113 | + label = "WPS"; |
| 114 | + linux,code = <KEY_WPS_BUTTON>; |
| 115 | + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; |
| 116 | + }; |
| 117 | + |
| 118 | + reset { |
| 119 | + label = "RST"; |
| 120 | + linux,code = <KEY_RESTART>; |
| 121 | + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; |
| 122 | + }; |
| 123 | + }; |
| 124 | +}; |
| 125 | + |
| 126 | +&gpio0 { |
| 127 | + status = "okay"; |
| 128 | +}; |
| 129 | + |
| 130 | +&gpio1 { |
| 131 | + status = "okay"; |
| 132 | +}; |
| 133 | + |
| 134 | +&gpio2 { |
| 135 | + status = "okay"; |
| 136 | +}; |
| 137 | + |
| 138 | +&gpio3 { |
| 139 | + status = "okay"; |
| 140 | +}; |
| 141 | + |
| 142 | +&spi0 { |
| 143 | + status = "okay"; |
| 144 | + |
| 145 | + flash@0 { |
| 146 | + compatible = "jedec,spi-nor"; |
| 147 | + reg = <0>; |
| 148 | + spi-max-frequency = <70000000>; |
| 149 | + |
| 150 | + partitions { |
| 151 | + compatible = "fixed-partitions"; |
| 152 | + #address-cells = <1>; |
| 153 | + #size-cells = <1>; |
| 154 | + |
| 155 | + partition@0 { |
| 156 | + label = "u-boot"; |
| 157 | + reg = <0x0 0x30000>; |
| 158 | + read-only; |
| 159 | + }; |
| 160 | + |
| 161 | + partition@30000 { |
| 162 | + label = "u-boot-env"; |
| 163 | + reg = <0x30000 0x10000>; |
| 164 | + }; |
| 165 | + |
| 166 | + partition@40000 { |
| 167 | + compatible = "nvmem-cells"; |
| 168 | + label = "factory"; |
| 169 | + reg = <0x40000 0x10000>; |
| 170 | + read-only; |
| 171 | + |
| 172 | + nvmem-layout { |
| 173 | + compatible = "fixed-layout"; |
| 174 | + #address-cells = <1>; |
| 175 | + #size-cells = <1>; |
| 176 | + |
| 177 | + eeprom_factory_0: eeprom@0 { |
| 178 | + reg = <0x0 0x200>; |
| 179 | + }; |
| 180 | + |
| 181 | + eeprom_factory_8000: eeprom@8000 { |
| 182 | + reg = <0x8000 0x200>; |
| 183 | + }; |
| 184 | + |
| 185 | + macaddr_factory_28: macaddr@28 { |
| 186 | + compatible = "mac-base"; |
| 187 | + reg = <0x28 0x6>; |
| 188 | + #nvmem-cell-cells = <1>; |
| 189 | + }; |
| 190 | + }; |
| 191 | + }; |
| 192 | + |
| 193 | + partition@50000 { |
| 194 | + label = "firmware"; |
| 195 | + reg = <0x50000 0xf80000>; |
| 196 | + compatible = "openwrt,uimage", "denx,uimage"; |
| 197 | + openwrt,ih-magic = <0x26112015>; |
| 198 | + }; |
| 199 | + |
| 200 | + partition@fd0000 { |
| 201 | + label = "crash"; |
| 202 | + reg = <0xfd0000 0x10000>; |
| 203 | + }; |
| 204 | + |
| 205 | + partition@fe0000 { |
| 206 | + label = "reserved"; |
| 207 | + reg = <0xfe0000 0x10000>; |
| 208 | + read-only; |
| 209 | + }; |
| 210 | + |
| 211 | + partition@ff0000 { |
| 212 | + label = "Bdata"; |
| 213 | + reg = <0xff0000 0x10000>; |
| 214 | + }; |
| 215 | + }; |
| 216 | + }; |
| 217 | +}; |
| 218 | + |
| 219 | +&ehci { |
| 220 | + status = "okay"; |
| 221 | +}; |
| 222 | + |
| 223 | +&ohci { |
| 224 | + status = "okay"; |
| 225 | +}; |
| 226 | + |
| 227 | +ðernet { |
| 228 | + nvmem-cells = <&macaddr_factory_28>; |
| 229 | + nvmem-cell-names = "mac-address"; |
| 230 | + |
| 231 | + mediatek,portmap = "llllw"; |
| 232 | +}; |
| 233 | + |
| 234 | +&wmac { |
| 235 | + nvmem-cells = <&eeprom_factory_0>; |
| 236 | + nvmem-cell-names = "eeprom"; |
| 237 | + |
| 238 | + pinctrl-names = "default", "pa_gpio"; |
| 239 | + pinctrl-0 = <&pa_pins>; |
| 240 | + pinctrl-1 = <&pa_gpio_pins>; |
| 241 | +}; |
| 242 | + |
| 243 | +&pcie { |
| 244 | + status = "okay"; |
| 245 | +}; |
| 246 | + |
| 247 | +&pcie0 { |
| 248 | + mt76@0,0 { |
| 249 | + reg = <0x0000 0 0 0 0>; |
| 250 | + nvmem-cells = <&eeprom_factory_8000>; |
| 251 | + nvmem-cell-names = "eeprom"; |
| 252 | + ieee80211-freq-limit = <5000000 6000000>; |
| 253 | + }; |
| 254 | +}; |
| 255 | + |
| 256 | +&state_default { |
| 257 | + gpio { |
| 258 | + groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd"; |
| 259 | + function = "gpio"; |
| 260 | + }; |
| 261 | +}; |
| 262 | + |
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