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Let's take AVRxxDD14: we have AVDD on pin 14 and VDDIO2 on pin 9. |
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Huh? You MUST connect them both to power/gnd (and each should have a cap.) |
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VDDA and VDD are the same on all modern AVRs. Discussed in the datasheet under power supply guidelines - AVDD was going to be a separate analog power domain like on many classic AVRs that was to be connected externally to power and ground, optionally through an inductor to reduce noise. Pretty sure that translates as "Huh, I really thought that inductor was going to make a big difference" but they prototyped it and found that it didn't actually help or discovered that they'd painted themselved into a corner at some point and that something didn't like when the analog power domain was not at exactly the same voltage as VDD, and that's why they internally connected them, because they realized it was going to be a BFD to disentangle them, and they had too many other BFD's on their to-do list). This may at some point be at the top of the list, and maybe in the Fx-series or Gx-series (I suspect the reason it hasn't been done is that it's a big deal such that they'd put it with other major changes - maybe when they Reunify the Winners (ie, release a part with the Dx-series core and the Ex-series ADC and MVIO and a version with opamps), they'll have managed to separate the AVDD (analog power domain supply) rail from VDD (though on these future parts it is highly likely that some parts will keep the internal AVDD VDD connection, namely the low pincount (14/20), we don't want to lose another I/O pin for Vdd!). Personally, I'm looking forward to a future Fx-series part with native USB, just for the part numbers the system would imply ;-) Somehow, I think F will be skipped as a series letter, though ! But yeah, if MVIO is on in fuses, they can be powered by different voltages, and PORTC acts normally except that VDDIO2 takes the place of VDD. If MVIO is off in fuses, they should be powered by the same voltage though if this is misconfigured there is no internal connection (so accidentally turning off MVIO does not short the supplies together through the chip, likely instantly destroying it) - but it also removes the interlocks against undefined behavior. MVIO seems to do two things - when enabled, it disabled analog functions of PORTC ,and it a BOD-like voltage monitor on the VDDIO2 rail that tristates PORTC when insufficient voltage is seen. The ports will exhibit undefined behavior when VDDIO2 is below 1.8V or so and MVIO is disabled and will be running outside of spec if VDD != VDDIO2 and MVIO is disabled |
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I would have loved to just ignore VDDIO2 and leave it unconnected, but I guess I can not. |
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Is there a particular reason that you want to use a DD chip? The 14pin chips without MVIO only have a single power pin. |
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Huh? You MUST connect them both to power/gnd (and each should have a cap.)
On the MVIO parts (DB, DD, etc) the VDDIO2 can have a different voltage than the other Vdd Pin(s)