diff --git a/AU_915_928_FSB_1.yml b/AU_915_928_FSB_1.yml
index bf08a66..fc3ccc9 100644
--- a/AU_915_928_FSB_1.yml
+++ b/AU_915_928_FSB_1.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 915900000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_2.yml b/AU_915_928_FSB_2.yml
index 7b673a1..a0f4b68 100644
--- a/AU_915_928_FSB_2.yml
+++ b/AU_915_928_FSB_2.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 917500000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_3.yml b/AU_915_928_FSB_3.yml
index 735063f..51029ed 100644
--- a/AU_915_928_FSB_3.yml
+++ b/AU_915_928_FSB_3.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 919100000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_4.yml b/AU_915_928_FSB_4.yml
index 5288827..6cddff7 100644
--- a/AU_915_928_FSB_4.yml
+++ b/AU_915_928_FSB_4.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 920700000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_5.yml b/AU_915_928_FSB_5.yml
index 5e4e918..3a6475b 100644
--- a/AU_915_928_FSB_5.yml
+++ b/AU_915_928_FSB_5.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 922300000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_6.yml b/AU_915_928_FSB_6.yml
index ae9ac65..e291b5a 100644
--- a/AU_915_928_FSB_6.yml
+++ b/AU_915_928_FSB_6.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 923900000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_7.yml b/AU_915_928_FSB_7.yml
index da3307b..0eee06f 100644
--- a/AU_915_928_FSB_7.yml
+++ b/AU_915_928_FSB_7.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 925500000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/AU_915_928_FSB_8.yml b/AU_915_928_FSB_8.yml
index 97b6514..7e8fa05 100644
--- a/AU_915_928_FSB_8.yml
+++ b/AU_915_928_FSB_8.yml
@@ -36,6 +36,8 @@ lora-standard-channel:
   frequency: 927100000
   data-rate: 12
   radio: 0
+dwell-time:
+  downlinks: false
 radios:
 - enable: true
   chip-type: SX1257
diff --git a/CODEOWNERS b/CODEOWNERS
index 44d093a..0e370cd 100644
--- a/CODEOWNERS
+++ b/CODEOWNERS
@@ -1 +1 @@
-* @johanstokking @htdvisser
+* @johanstokking @adriansmares