Width of operands to logical operations are mismatched in HLIL

[fuzyll]

Version and Platform (required):

• Binary Ninja Version: 4.3.6756-dev
• OS: macOS
• OS Version: 15.2
• CPU Architecture: aarch64

Bug Description:
At 0x0041ec5e in the provided x86_64 binary, the LHS of an & operation is 64-bit and the RHS is 32-bit, the result of which is stored in a 64-bit variable. Something similar occurs at 0x44a75c as well in a slightly more complicated scenario. In both cases, the and instruction appears to be using 32-bit values (using ecx, edx, and/or eax) in the instruction.

There are more at 0x463754 (|), and 0x43ce74 (^).

Steps To Reproduce:

1. Go to the addresses above
2. Observe the issue

Expected Behavior:
At 0x0041ec5e, for example, we should see the zx.q surround the entire rest of the line, since the assignment is to a 64-bit value.

Screenshots/Video Recording:

Binary:
Vector 35 employees can search for massive unruffled decoy curtain to find the binary.

Additional Information:
Reported by a user in our public Slack.

[plafosse]

@fuzyll Are you sure this is only in HLIL? Have you checked the constant size in LLIL/MLIL?

[seekbytes]

If I see correctly, the constant size in LLIL/MLIL seems sound (locally), as soon as we switch to HLIL (during upgrade of types from 32 to 64), the problem is presented. (source: I have binaries)