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parmigggianaparmigggiana
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fix ram-type
1 parent f157dd1 commit be4db62

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7 files changed

+17
-17
lines changed

7 files changed

+17
-17
lines changed

‎src/peracotta/constants.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212
"source_code": "https://github.com/WEEE-Open/peracotta",
1313
}
1414

15-
VERSION = "2.5.7"
15+
VERSION = "2.5.8"
1616

1717
PATH = {
1818
"UI": "assets/interface.ui",

‎src/peracotta/parsers/read_decode_dimms.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ def parse_decode_dimms(dimms: str, interactive: bool = False) -> List[dict]:
3737
fallback_manufacturer_data_type = None
3838
for line in dimm.splitlines():
3939
if line.startswith("Fundamental Memory type"):
40-
dimms[i]["ram-type"] = line.split(" ")[-2].upper()
40+
dimms[i]["ram-type"] = line.split(" ")[-2].lower()
4141
if dimms[i]["ram-type"] == "UNKNOWN":
4242
del dimms[i]["ram-type"]
4343

‎src/peracotta/parsers/read_udevadm.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ def parse_udevadm(file_content: str) -> List[dict]:
4949
dimm = {
5050
"type": "ram",
5151
"working": "yes",
52-
"ram-type": device["TYPE"].upper(),
52+
"ram-type": device["TYPE"].lower(),
5353
"frequency-hertz": int(device["SPEED_MTS"]) * 1000 * 1000,
5454
"capacity-byte": int(device["SIZE"]),
5555
"brand": device["MANUFACTURER"],

‎tests/parsers/test_dimms.py

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ def test_ecc_ram1():
1616
"sn": "3375612524",
1717
"frequency-hertz": 667000000,
1818
"capacity-byte": 2147483648,
19-
"ram-type": "DDR2",
19+
"ram-type": "ddr2",
2020
"ram-ecc": "yes",
2121
"ram-timings": "5-5-5-15",
2222
},
@@ -28,7 +28,7 @@ def test_ecc_ram1():
2828
"sn": "3392385900",
2929
"frequency-hertz": 667000000,
3030
"capacity-byte": 2147483648,
31-
"ram-type": "DDR2",
31+
"ram-type": "ddr2",
3232
"ram-ecc": "yes",
3333
"ram-timings": "5-5-5-15",
3434
},
@@ -49,7 +49,7 @@ def test_ecc_ram1_not_an_hex():
4949
"sn": "0F00xb4r",
5050
"frequency-hertz": 667000000,
5151
"capacity-byte": 2147483648,
52-
"ram-type": "DDR2",
52+
"ram-type": "ddr2",
5353
"ram-ecc": "yes",
5454
"ram-timings": "5-5-5-15",
5555
},
@@ -61,7 +61,7 @@ def test_ecc_ram1_not_an_hex():
6161
"sn": "0xCA33B3RC",
6262
"frequency-hertz": 667000000,
6363
"capacity-byte": 2147483648,
64-
"ram-type": "DDR2",
64+
"ram-type": "ddr2",
6565
"ram-ecc": "yes",
6666
"ram-timings": "5-5-5-15",
6767
},
@@ -80,7 +80,7 @@ def test_ecc_ram2():
8080
"sn": "2853609420",
8181
"frequency-hertz": 667000000,
8282
"capacity-byte": 1073741824,
83-
"ram-type": "DDR2",
83+
"ram-type": "ddr2",
8484
"ram-ecc": "yes",
8585
"ram-timings": "5-5-5-15",
8686
},
@@ -91,7 +91,7 @@ def test_ecc_ram2():
9191
"sn": "2836829644",
9292
"frequency-hertz": 667000000,
9393
"capacity-byte": 1073741824,
94-
"ram-type": "DDR2",
94+
"ram-type": "ddr2",
9595
"ram-ecc": "yes",
9696
"ram-timings": "5-5-5-15",
9797
},
@@ -111,7 +111,7 @@ def test_ram1():
111111
"sn": "16416",
112112
"frequency-hertz": 800000000,
113113
"capacity-byte": 1073741824,
114-
"ram-type": "DDR2",
114+
"ram-type": "ddr2",
115115
"ram-ecc": "no",
116116
"ram-timings": "6-6-6-18",
117117
},
@@ -123,7 +123,7 @@ def test_ram1():
123123
"sn": "8224",
124124
"frequency-hertz": 800000000,
125125
"capacity-byte": 1073741824,
126-
"ram-type": "DDR2",
126+
"ram-type": "ddr2",
127127
"ram-ecc": "no",
128128
"ram-timings": "6-6-6-18",
129129
},
@@ -135,7 +135,7 @@ def test_ram1():
135135
"sn": "12320",
136136
"frequency-hertz": 800000000,
137137
"capacity-byte": 1073741824,
138-
"ram-type": "DDR2",
138+
"ram-type": "ddr2",
139139
"ram-ecc": "no",
140140
"ram-timings": "6-6-6-18",
141141
},
@@ -147,7 +147,7 @@ def test_ram1():
147147
"sn": "8225",
148148
"frequency-hertz": 800000000,
149149
"capacity-byte": 1073741824,
150-
"ram-type": "DDR2",
150+
"ram-type": "ddr2",
151151
"ram-ecc": "no",
152152
"ram-timings": "6-6-6-18",
153153
},

‎tests/parsers/test_rottame.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ def test_ram():
5050
"sn": "2972574626",
5151
"frequency-hertz": 533000000,
5252
"capacity-byte": 536870912,
53-
"ram-type": "DDR2",
53+
"ram-type": "ddr2",
5454
"ram-ecc": "no",
5555
"ram-timings": "5-4-4-12",
5656
}

‎tests/parsers/test_travasato.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ def test_ram():
5050
"sn": "3375612238",
5151
"frequency-hertz": 667000000,
5252
"capacity-byte": 2147483648,
53-
"ram-type": "DDR2",
53+
"ram-type": "ddr2",
5454
"ram-ecc": "yes",
5555
"ram-timings": "5-5-5-15",
5656
},
@@ -62,7 +62,7 @@ def test_ram():
6262
"sn": "3392385358",
6363
"frequency-hertz": 667000000,
6464
"capacity-byte": 2147483648,
65-
"ram-type": "DDR2",
65+
"ram-type": "ddr2",
6666
"ram-ecc": "yes",
6767
"ram-timings": "5-5-5-15",
6868
},

‎tests/parsers/test_viavai.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ def test_ram():
5050
"sn": "3072778780",
5151
"frequency-hertz": 667000000,
5252
"capacity-byte": 1073741824,
53-
"ram-type": "DDR2",
53+
"ram-type": "ddr2",
5454
"ram-ecc": "yes",
5555
"ram-timings": "5-5-5-15",
5656
}

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