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Confusion regarding Load/Store operations #32
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This is described in the documentation PDF, always attached to the latest release: https://github.com/Wren6991/Hazard3/releases/latest |
Is there a specific part of the source code that you have read and feel unclear on? |
I would like to know what signals are being used in load/store operations from the decoder setting d_memop after receiving a load instruction to bus_haddr_d being written to. I'm trying to make a vector extension for the processor and I would like to be able to use the existing interface for loading/storing data instead of having a separate interface. |
Sorry, did not mean to close the issue. |
I was wondering if you could provide some documentation and/or a diagram as to what signals and wires are being used for loading and storing data from memory. I specifically want to know how the load/store ports work and how they take input from the decoder.
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