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vga_demo.bld
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vga_demo.bld
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Release 14.7 ngdbuild P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\ngdbuild.exe
-intstyle ise -dd _ngo -nt timestamp -uc nexys3.ucf -p xc6slx16-csg324-3
vga_demo.ngc vga_demo.ngd
Reading NGO file
"C:/Users/YutongGu/College/Programming/Xilinx/FinalProject2/vga_demo.ngc" ...
Gathering constraint information from source properties...
Done.
Annotating constraints to design from ucf file "nexys3.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
Done...
Checking expanded design ...
Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------
NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 0
Total memory usage is 224872 kilobytes
Writing NGD file "vga_demo.ngd" ...
Total REAL time to NGDBUILD completion: 4 sec
Total CPU time to NGDBUILD completion: 4 sec
Writing NGDBUILD log file "vga_demo.bld"...