From 9ebfbd4802bed4550faeb8a43e6ed5e50123c952 Mon Sep 17 00:00:00 2001 From: Zhouqi Jiang Date: Sat, 12 Oct 2024 15:12:56 +0800 Subject: [PATCH] [rust] upgrade to latest allwinner-hal smhc peripherals Signed-off-by: Zhouqi Jiang --- Cargo.lock | 6 +++--- board/100ask-d1-h-rs/src/main.rs | 11 +++++++++-- rust/src/soc/sun20iw1.rs | 28 +++++++++++++++++++--------- 3 files changed, 31 insertions(+), 14 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 5e32694a..b1c5a9a3 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -14,7 +14,7 @@ dependencies = [ [[package]] name = "allwinner-hal" version = "0.0.0" -source = "git+https://github.com/rustsbi/allwinner-hal#e9a687731f2a6ad5442571567d70ce3593e2c439" +source = "git+https://github.com/rustsbi/allwinner-hal#57b24112326ed270499d784b97d361bd34e36418" dependencies = [ "embedded-hal", "embedded-io", @@ -27,7 +27,7 @@ dependencies = [ [[package]] name = "allwinner-rt" version = "0.0.0" -source = "git+https://github.com/rustsbi/allwinner-hal#e9a687731f2a6ad5442571567d70ce3593e2c439" +source = "git+https://github.com/rustsbi/allwinner-hal#57b24112326ed270499d784b97d361bd34e36418" dependencies = [ "allwinner-hal", "allwinner-rt-macros", @@ -40,7 +40,7 @@ dependencies = [ [[package]] name = "allwinner-rt-macros" version = "0.0.0" -source = "git+https://github.com/rustsbi/allwinner-hal#e9a687731f2a6ad5442571567d70ce3593e2c439" +source = "git+https://github.com/rustsbi/allwinner-hal#57b24112326ed270499d784b97d361bd34e36418" dependencies = [ "proc-macro2", "quote", diff --git a/board/100ask-d1-h-rs/src/main.rs b/board/100ask-d1-h-rs/src/main.rs index aee3565a..03db89e8 100644 --- a/board/100ask-d1-h-rs/src/main.rs +++ b/board/100ask-d1-h-rs/src/main.rs @@ -65,9 +65,16 @@ fn main(p: Peripherals, _c: Clocks) { let d2 = p.gpio.pf5.into_function::<2>(); (clk, cmd, d0, d1, d2, d3) }; + unsafe { + p.ccu + .smhc_bgr + .modify(|val| val.gate_pass::<0>().deassert_reset::<0>()); + // p.ccu.smhc_clk[0].modify(|val| val.unmask_clock()); + p.smhc0 + .global_control + .modify(|val| val.set_dma_reset().set_fifo_reset().set_software_reset()); + }; /* - p.ccu.smhc_bgr.modify(|val| val.gate_pass::<0>().deassert_reset::<0>()); // 0 == sdhci->id - p.ccu.smhc0_clk.modify(|val| val.unmask_clock()); // let sdhci = p.smhc0.smhc(sdmmc_pins) // sdhci.detect_sdcard() // TODO or: detect_mmc() p.smhc0.global_control.modify(|val| val.set_dma_reset().set_fifo_reset().set_software_reset()); diff --git a/rust/src/soc/sun20iw1.rs b/rust/src/soc/sun20iw1.rs index cc99d953..a84c8d6a 100644 --- a/rust/src/soc/sun20iw1.rs +++ b/rust/src/soc/sun20iw1.rs @@ -3,22 +3,29 @@ use allwinner_hal::{ ccu::{Clocks, CpuClockSource}, gpio::{Disabled, Function}, }; -use allwinner_rt::soc::d1::{CCU, COM, GPIO, PHY, PLIC, SPI0, UART0}; +use allwinner_rt::soc::d1::{CCU, COM, GPIO, PHY, PLIC, SMHC0, SMHC1, SMHC2, SPI0, UART0}; use embedded_time::rate::Extensions; /// SyterKit runtime peripheral ownership and configurations. pub struct Peripherals<'a> { /// General Purpose Input/Output peripheral. pub gpio: Pads<'a>, + /// Clock control unit peripheral. + pub ccu: CCU, // uart0 is removed; it is occupied by stdin/stdout `Serial` structure. /// Serial Peripheral Interface peripheral 0. - pub spi0: SPI0, - /// Memory controller physical layer (PHY) of DDR SDRAM. - pub phy: PHY, /// Common control peripheral of DDR SDRAM. pub com: COM, - /// Clock control unit peripheral. - pub ccu: CCU, + /// Memory controller physical layer (PHY) of DDR SDRAM. + pub phy: PHY, + /// SD/MMC Host Controller peripheral 0. + pub smhc0: SMHC0, + /// SD/MMC Host Controller peripheral 1. + pub smhc1: SMHC1, + /// SD/MMC Host Controller peripheral 2. + pub smhc2: SMHC2, + /// Serial Peripheral Interface peripheral 0. + pub spi0: SPI0, /// Platform-local Interrupt Controller. pub plic: PLIC, } @@ -39,10 +46,13 @@ impl<'a> Peripherals<'a> { let uart0 = src.uart0; let p = Self { gpio: Pads::__init(), - spi0: src.spi0, - phy: src.phy, - com: src.com, ccu: src.ccu, + com: src.com, + phy: src.phy, + smhc0: src.smhc0, + smhc1: src.smhc1, + smhc2: src.smhc2, + spi0: src.spi0, plic: src.plic, }; (p, uart0, pb8, pb9)