Skip to content

Commit bbf88a6

Browse files
SamulKyullSamulKyull
SamulKyull
authored and
SamulKyull
committed
[board] add avaota 86box boot support
1 parent f282cef commit bbf88a6

File tree

11 files changed

+814
-7
lines changed

11 files changed

+814
-7
lines changed

‎board/avaota-86box/CMakeLists.txt

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,3 +8,7 @@ set(APP_COMMON_SOURCE
88
add_subdirectory(hello_world)
99

1010
add_subdirectory(boot)
11+
12+
add_subdirectory(memtest)
13+
14+
add_subdirectory(usb_test)

‎board/avaota-86box/board.c

Lines changed: 85 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -81,6 +81,71 @@ sunxi_spi_t sunxi_spi0 = {
8181
.dma_handle = &sunxi_dma,
8282
};
8383

84+
#if defined(CONFIG_CHIP_MMC_V2)
85+
sunxi_sdhci_t sdhci0 = {
86+
.name = "sdhci0",
87+
.id = MMC_CONTROLLER_0,
88+
.reg_base = SUNXI_SMHC0_BASE,
89+
.sdhci_mmc_type = MMC_TYPE_SD,
90+
.max_clk = 50000000,
91+
.width = SMHC_WIDTH_4BIT,
92+
.dma_des_addr = SDRAM_BASE + 0x30080000,
93+
.pinctrl = {
94+
.gpio_clk = {GPIO_PIN(GPIO_PORTF, 2), GPIO_PERIPH_MUX2},
95+
.gpio_cmd = {GPIO_PIN(GPIO_PORTF, 3), GPIO_PERIPH_MUX2},
96+
.gpio_d0 = {GPIO_PIN(GPIO_PORTF, 1), GPIO_PERIPH_MUX2},
97+
.gpio_d1 = {GPIO_PIN(GPIO_PORTF, 0), GPIO_PERIPH_MUX2},
98+
.gpio_d2 = {GPIO_PIN(GPIO_PORTF, 5), GPIO_PERIPH_MUX2},
99+
.gpio_d3 = {GPIO_PIN(GPIO_PORTF, 4), GPIO_PERIPH_MUX2},
100+
.gpio_cd = {GPIO_PIN(GPIO_PORTF, 6), GPIO_INPUT},
101+
.cd_level = GPIO_LEVEL_LOW,
102+
},
103+
.clk_ctrl = {
104+
.gate_reg_base = CCU_BASE + CCU_SMHC_BGR_REG,
105+
.gate_reg_offset = SDHCI_DEFAULT_CLK_GATE_OFFSET(0),
106+
.rst_reg_base = CCU_BASE + CCU_SMHC_BGR_REG,
107+
.rst_reg_offset = SDHCI_DEFAULT_CLK_RST_OFFSET(0),
108+
},
109+
.sdhci_clk = {
110+
.reg_base = CCU_BASE + CCU_SMHC0_CLK_REG,
111+
.reg_factor_n_offset = SDHCI_DEFAULT_CLK_FACTOR_N_OFFSET,
112+
.reg_factor_m_offset = SDHCI_DEFAULT_CLK_FACTOR_M_OFFSET,
113+
.clk_sel = 0x1,
114+
.parent_clk = 300000000,
115+
},
116+
};
117+
118+
sunxi_sdhci_t sdhci2 = {
119+
.name = "sdhci2",
120+
.id = MMC_CONTROLLER_2,
121+
.reg_base = SUNXI_SMHC2_BASE,
122+
.sdhci_mmc_type = MMC_TYPE_EMMC,
123+
.max_clk = 50000000,
124+
.width = SMHC_WIDTH_4BIT,
125+
.dma_des_addr = SDRAM_BASE + 0x20080000,
126+
.pinctrl = {
127+
.gpio_clk = {GPIO_PIN(GPIO_PORTC, 2), GPIO_PERIPH_MUX3},
128+
.gpio_cmd = {GPIO_PIN(GPIO_PORTC, 3), GPIO_PERIPH_MUX3},
129+
.gpio_d0 = {GPIO_PIN(GPIO_PORTC, 6), GPIO_PERIPH_MUX3},
130+
.gpio_d1 = {GPIO_PIN(GPIO_PORTC, 5), GPIO_PERIPH_MUX3},
131+
.gpio_d2 = {GPIO_PIN(GPIO_PORTC, 4), GPIO_PERIPH_MUX3},
132+
.gpio_d3 = {GPIO_PIN(GPIO_PORTC, 7), GPIO_PERIPH_MUX3},
133+
},
134+
.clk_ctrl = {
135+
.gate_reg_base = CCU_BASE + CCU_SMHC_BGR_REG,
136+
.gate_reg_offset = SDHCI_DEFAULT_CLK_GATE_OFFSET(2),
137+
.rst_reg_base = CCU_BASE + CCU_SMHC_BGR_REG,
138+
.rst_reg_offset = SDHCI_DEFAULT_CLK_RST_OFFSET(2),
139+
},
140+
.sdhci_clk = {
141+
.reg_base = CCU_BASE + CCU_SMHC2_CLK_REG,
142+
.reg_factor_n_offset = SDHCI_DEFAULT_CLK_FACTOR_N_OFFSET,
143+
.reg_factor_m_offset = SDHCI_DEFAULT_CLK_FACTOR_M_OFFSET,
144+
.clk_sel = 0x1,
145+
.parent_clk = 300000000,
146+
},
147+
};
148+
#else
84149
sdhci_t sdhci0 = {
85150
.name = "sdhci0",
86151
.id = 0,
@@ -100,6 +165,26 @@ sdhci_t sdhci0 = {
100165
.gpio_d3 = {GPIO_PIN(GPIO_PORTF, 4), GPIO_PERIPH_MUX2},
101166
};
102167

168+
sdhci_t sdhci2 = {
169+
.name = "sdhci2",
170+
.id = 0,
171+
.reg = (sdhci_reg_t *) 0x04022000,
172+
.voltage = MMC_VDD_27_36,
173+
.width = MMC_BUS_WIDTH_4,
174+
.clock = MMC_CLK_50M,
175+
.removable = 0,
176+
.isspi = FALSE,
177+
.skew_auto_mode = TRUE,
178+
.sdhci_pll = CCU_MMC_CTRL_PLL_PERIPH1X,
179+
.gpio_clk = {GPIO_PIN(GPIO_PORTC, 2), GPIO_PERIPH_MUX3},
180+
.gpio_cmd = {GPIO_PIN(GPIO_PORTC, 3), GPIO_PERIPH_MUX3},
181+
.gpio_d0 = {GPIO_PIN(GPIO_PORTC, 6), GPIO_PERIPH_MUX3},
182+
.gpio_d1 = {GPIO_PIN(GPIO_PORTC, 5), GPIO_PERIPH_MUX3},
183+
.gpio_d2 = {GPIO_PIN(GPIO_PORTC, 4), GPIO_PERIPH_MUX3},
184+
.gpio_d3 = {GPIO_PIN(GPIO_PORTC, 7), GPIO_PERIPH_MUX3},
185+
};
186+
#endif
187+
103188
dram_para_t dram_para = {
104189
.dram_clk = 1008,
105190
.dram_type = 3,

‎board/avaota-86box/boot/main.c

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,13 @@ extern sunxi_serial_t uart_dbg;
8080

8181
extern sunxi_spi_t sunxi_spi0;
8282

83+
#if defined(CONFIG_CHIP_MMC_V2)
84+
extern sunxi_sdhci_t sdhci0;
85+
extern sunxi_sdhci_t sdhci2;
86+
#else
8387
extern sdhci_t sdhci0;
88+
extern sdhci_t sdhci2;
89+
#endif
8490

8591
extern dram_para_t dram_para;
8692

@@ -597,15 +603,15 @@ int main(void) {
597603
strcpy(image.config_filename, CONFIG_CONFIG_FILENAME);
598604

599605
/* Initialize the SD host controller. */
600-
if (sunxi_sdhci_init(&sdhci0) != 0) {
601-
printk_error("SMHC: %s controller init failed\n", sdhci0.name);
606+
if (sunxi_sdhci_init(&sdhci2) != 0) {
607+
printk_error("SMHC: %s controller init failed\n", sdhci2.name);
602608
goto _shell;
603609
} else {
604-
printk_info("SMHC: %s controller v%x initialized\n", sdhci0.name, sdhci0.reg->vers);
610+
printk_info("SMHC: %s controller initialized\n", sdhci2.name);
605611
}
606612

607613
/* Initialize the SD card and check if initialization is successful. */
608-
if (sdmmc_init(&card0, &sdhci0) != 0) {
614+
if (sdmmc_init(&card0, &sdhci2) != 0) {
609615
printk_warning("SMHC: init failed\n");
610616
goto _shell;
611617
}

‎board/avaota-86box/memtest/CMakeLists.txt

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# SPDX-License-Identifier: GPL-2.0+
2+
3+
add_syterkit_app(memtest
4+
main.c
5+
)

‎board/avaota-86box/memtest/main.c

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
/* SPDX-License-Identifier: GPL-2.0+ */
2+
3+
#include <stdbool.h>
4+
#include <stddef.h>
5+
#include <stdint.h>
6+
#include <types.h>
7+
8+
#include <config.h>
9+
#include <log.h>
10+
#include <timer.h>
11+
12+
#include <common.h>
13+
#include <jmp.h>
14+
#include <mmu.h>
15+
#include <smalloc.h>
16+
#include <sstdlib.h>
17+
#include <string.h>
18+
19+
#include <cli.h>
20+
#include <cli_shell.h>
21+
#include <cli_termesc.h>
22+
23+
#include "sys-dram.h"
24+
#include "sys-rtc.h"
25+
#include "sys-sdcard.h"
26+
#include "sys-sid.h"
27+
#include "sys-spi.h"
28+
29+
#include "memtester.c"
30+
31+
extern sunxi_serial_t uart_dbg;
32+
33+
extern dram_para_t dram_para;
34+
35+
/*
36+
* main function for the bootloader. Initializes and sets up the system, loads the kernel and device tree binary from
37+
* an SD card, sets boot arguments, and boots the kernel. If the kernel fails to boot, the function jumps to FEL mode.
38+
*/
39+
int main(void) {
40+
/* Initialize the debug serial interface. */
41+
sunxi_serial_init(&uart_dbg);
42+
43+
/* Display the bootloader banner. */
44+
show_banner();
45+
46+
/* Initialize the system clock. */
47+
sunxi_clk_init();
48+
49+
/* Initialize the DRAM and enable memory management unit (MMU). */
50+
uint32_t dram_size = sunxi_dram_init(&dram_para);
51+
arm32_mmu_enable(SDRAM_BASE, dram_size);
52+
53+
/* Debug message to indicate that MMU is enabled. */
54+
printk_debug("enable mmu ok\n");
55+
56+
/* Dump information about the system clocks. */
57+
sunxi_clk_dump();
58+
59+
#define DRAM_TEST_SIZE 32 * 1024 * 1024
60+
#define DRAM_SIZE_BYTE dram_size * 1024 * 1024
61+
62+
static int i = 0;
63+
while (1) {
64+
do_memtester((uint64_t) SDRAM_BASE, DRAM_SIZE_BYTE, DRAM_TEST_SIZE, i);
65+
i++;
66+
}
67+
68+
_shell:
69+
syterkit_shell_attach(NULL);
70+
71+
_fel:
72+
/* If the kernel boot fails, jump to FEL mode. */
73+
jmp_to_fel();
74+
75+
/* Return 0 to indicate successful execution. */
76+
return 0;
77+
}

0 commit comments

Comments
 (0)