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projects/ad408x_fmc_evb: Initial commit for ZedBoard
The project instantiates: -the axi_ad408x interface IP -a DMA for the 20bit conversion data stream -a DMA for the 80bit uncorrected sample data stream Signed-off-by: PopPaul2021 <paul.pop@analog.com>
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‎projects/ad408x_fmc_evb/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2024 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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include ../scripts/project-toplevel.mk

‎projects/ad408x_fmc_evb/README.md

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# AD408X-FMC-EVB HDL Project
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Here are some pointers to help you:
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* [Board Product Page](https://www.analog.com/AD408X-FMC-EVB)
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* Parts : [AD4080, 20-Bit, 40MSPS, Differential SAR ADC](https://www.analog.com/ad4080)
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* Parts : [ADF4350, Wideband Synthesizer with Integrated VCO](https://www.analog.com/adf4350)
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* Parts : [AD9508, 1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust](https://www.analog.com/ad9508)
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* Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad408x_evb
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* HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad408x_evb
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* Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers-all

‎projects/ad408x_fmc_evb/common/ad408x_fmc.txt

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FMC_pin FMC_port Schematic_name System_top_name IOSTANDARD Termination
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# ad408x
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H4 FMC_CLK0_M2C_P DCO_P dco_p LVDS_25 DIFF_TERM 1
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H5 FMC_CLK0_M2C_N DCO_N dco_n LVDS_25 DIFF_TERM 1
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G2 FMC_CLK1_M2C_P FPGACLK_P fpgaclk_p LVDS_25 DIFF_TERM 1
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G3 FMC_CLK1_M2C_N FPGACLK_N fpgaclk_n LVDS_25 DIFF_TERM 1
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D8 FMC_LA01_CC_P CLK_P clk_p LVDS_25 DIFF_TERM 1
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D9 FMC_LA01_CC_N CLK_N clk_n LVDS_25 DIFF_TERM 1
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H7 FMC_LA02_P DA_P da_p LVDS_25 DIFF_TERM 1
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H8 FMC_LA02_N DA_N da_n LVDS_25 DIFF_TERM 1
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G9 FMC_LA03_P DB_P db_p LVDS_25 DIFF_TERM 1
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G10 FMC_LA03_N DB_N db_n LVDS_25 DIFF_TERM 1
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H13 FMC_LA07_P GPIO0_FMC gpio0_fmc LVCMOS25 #N/A
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C11 FMC_LA06_N GPIO1_FMC gpio1_fmc LVCMOS25 #N/A
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D14 FMC_LA09_P GPIO2_FMC gpio2_fmc LVCMOS25 #N/A
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D15 FMC_LA09_N GPIO3_FMC gpio3_fmc LVCMOS25 #N/A
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H16 FMC_LA11_P GP0_DIR gp0_dir LVCMOS25 #N/A
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C15 FMC_LA10_N GP1_DIR gp1_dir LVCMOS25 #N/A
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G15 FMC_LA12_P GP2_DIR gp2_dir LVCMOS25 #N/A
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H17 FMC_LA11_N GP3_DIR gp3_dir LVCMOS25 #N/A
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H19 FMC_LA15_P EN_PSU en_psu LVCMOS25 #N/A
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H20 FMC_LA15_N PWRGD pwrgd LVCMOS25 #N/A
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H22 FMC_LA19_P PD_V33B pd_v33b LVCMOS25 #N/A
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G16 FMC_LA12_N OSC_EN osc_en LVCMOS25 #N/A
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G12 FMC_LA08_P CS_N_SRC cs_n_src LVCMOS25 #N/A
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G13 FMC_LA08_N SDIO_SRC sdio_src LVCMOS25 #N/A
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H14 FMC_LA07_N SCLK_SRC sclk_src LVCMOS25 #N/A
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C19 FMC_LA14_N CS1_0 cs1_0 LVCMOS25 #N/A
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C22 FMC_LA18_CC_P CS1_1 cs1_1 LVCMOS25 #N/A
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D17 FMC_LA13_P SDO_1 sdo_1 LVCMOS25 #N/A
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D18 FMC_LA13_N SCLK1 sclk1 LVCMOS25 #N/A
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C18 FMC_LA14_P SDIN1 sdin1 LVCMOS25 #N/A
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D20 FMC_LA17_CC_P DOA_FMC doa_fmc LVCMOS25 #N/A
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D21 FMC_LA17_CC_N DOB_FMC dob_fmc LVCMOS25 #N/A
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G18 FMC_LA16_P DOC_FMC doc_fmc LVCMOS25 #N/A
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G19 FMC_LA16_N DOD_FMC dod_fmc LVCMOS25 #N/A
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H23 FMC_LA19_N PBIO<0> pbio[0] LVCMOS25 #N/A
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G21 FMC_LA20_P PBIO<1> pbio[1] LVCMOS25 #N/A
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G22 FMC_LA20_N PBIO<2> pbio[2] LVCMOS25 #N/A
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H25 FMC_LA21_P PBIO<3> pbio[3] LVCMOS25 #N/A
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H26 FMC_LA21_N PBIO<4> pbio[4] LVCMOS25 #N/A
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G24 FMC_LA22_P PBIO<5> pbio[5] LVCMOS25 #N/A
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G25 FMC_LA22_N PBIO<6> pbio[6] LVCMOS25 #N/A
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D23 FMC_LA23_P PBIO<7> pbio[7] LVCMOS25 #N/A
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D24 FMC_LA23_N PBIO<8> pbio[8] LVCMOS25 #N/A
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C10 FMC_LA06_P AD9508_SYNC ad9508_sync LVCMOS25 #N/A
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C23 FMC_LA18_CC_N ADF435X_LOCK adf435x_lock LVCMOS25 #N/A

‎projects/ad408x_fmc_evb/common/ad408x_fmc_evb_bd.tcl

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###############################################################################
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## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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# ad4080 interface
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create_bd_port -dir I dco_p
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create_bd_port -dir I dco_n
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create_bd_port -dir I da_p
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create_bd_port -dir I da_n
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create_bd_port -dir I db_p
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create_bd_port -dir I db_n
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create_bd_port -dir I uncorrected_mode
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create_bd_port -dir I sync_n
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create_bd_port -dir O sys_cpu_out_clk
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# axi_ad408x
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ad_ip_instance axi_ad408x axi_ad4080_adc
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ad_ip_parameter axi_ad4080_adc CONFIG.NUM_OF_CHANNELS 1
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ad_ip_parameter axi_ad4080_adc CONFIG.HAS_DELAY_CTRL 1
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ad_ip_parameter axi_ad4080_adc CONFIG.DELAY_CTRL_NUM_LANES 2
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ad_ip_parameter axi_ad4080_adc CONFIG.DDR_SUPPORT 1
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# dma for rx1
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ad_ip_instance axi_dmac axi_ad4080_dma
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ad_ip_parameter axi_ad4080_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter axi_ad4080_dma CONFIG.DMA_TYPE_DEST 0
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ad_ip_parameter axi_ad4080_dma CONFIG.CYCLIC 0
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ad_ip_parameter axi_ad4080_dma CONFIG.SYNC_TRANSFER_START 0
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ad_ip_parameter axi_ad4080_dma CONFIG.AXI_SLICE_SRC 0
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ad_ip_parameter axi_ad4080_dma CONFIG.AXI_SLICE_DEST 0
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ad_ip_parameter axi_ad4080_dma CONFIG.DMA_2D_TRANSFER 0
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ad_ip_parameter axi_ad4080_dma CONFIG.DMA_DATA_WIDTH_SRC 32
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# dma for uncorrected
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ad_ip_instance axi_dmac axi_ad4080_uc_dma
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.DMA_TYPE_DEST 0
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.CYCLIC 0
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.SYNC_TRANSFER_START 0
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.AXI_SLICE_SRC 0
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.AXI_SLICE_DEST 0
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.DMA_2D_TRANSFER 0
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ad_ip_parameter axi_ad4080_uc_dma CONFIG.DMA_DATA_WIDTH_SRC 128
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# connect interface to axi_ad4080_adc
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ad_connect dco_p axi_ad4080_adc/dclk_in_p
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ad_connect dco_n axi_ad4080_adc/dclk_in_n
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ad_connect da_p axi_ad4080_adc/data_a_in_p
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ad_connect da_n axi_ad4080_adc/data_a_in_n
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ad_connect db_p axi_ad4080_adc/data_b_in_p
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ad_connect db_n axi_ad4080_adc/data_b_in_n
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ad_connect sync_n axi_ad4080_adc/sync_n
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ad_connect uncorrected_mode axi_ad4080_adc/uncorrected_mode
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ad_connect $sys_iodelay_clk axi_ad4080_adc/delay_clk
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# connect datapath
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ad_connect axi_ad4080_adc/adc_data axi_ad4080_dma/fifo_wr_din
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ad_connect axi_ad4080_adc/adc_valid axi_ad4080_dma/fifo_wr_en
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ad_connect axi_ad4080_adc/adc_uncor_data axi_ad4080_uc_dma/fifo_wr_din
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ad_connect axi_ad4080_adc/adc_uncor_valid axi_ad4080_uc_dma/fifo_wr_en
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# system runs on phy's received clock
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ad_connect axi_ad4080_adc/adc_clk axi_ad4080_dma/fifo_wr_clk
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ad_connect axi_ad4080_adc/adc_clk axi_ad4080_uc_dma/fifo_wr_clk
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ad_connect $sys_cpu_clk sys_cpu_out_clk
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ad_connect $sys_cpu_resetn axi_ad4080_dma/m_dest_axi_aresetn
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ad_connect $sys_cpu_resetn axi_ad4080_uc_dma/m_dest_axi_aresetn
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ad_cpu_interconnect 0x44A00000 axi_ad4080_adc
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ad_cpu_interconnect 0x44A30000 axi_ad4080_dma
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ad_cpu_interconnect 0x44A40000 axi_ad4080_uc_dma
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ad_mem_hp1_interconnect $sys_cpu_clk sys_ps7/S_AXI_HP1
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ad_mem_hp1_interconnect $sys_cpu_clk axi_ad4080_dma/m_dest_axi
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ad_mem_hp1_interconnect $sys_cpu_clk axi_ad4080_uc_dma/m_dest_axi
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ad_cpu_interrupt ps-13 mb-12 axi_ad4080_dma/irq
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ad_cpu_interrupt ps-12 mb-12 axi_ad4080_uc_dma/irq
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‎projects/ad408x_fmc_evb/zed/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2024 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := ad408x_fmc_evb_zed
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M_DEPS += ../common/ad408x_fmc_evb_bd.tcl
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/zed/zed_system_constr.xdc
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M_DEPS += ../../common/zed/zed_system_bd.tcl
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M_DEPS += ../../../library/common/ad_iobuf.v
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LIB_DEPS += axi_ad408x
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LIB_DEPS += axi_clkgen
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_hdmi_tx
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LIB_DEPS += axi_i2s_adi
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LIB_DEPS += axi_spdif_tx
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LIB_DEPS += axi_sysid
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LIB_DEPS += sysid_rom
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LIB_DEPS += util_i2c_mixer
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include ../../scripts/project-xilinx.mk

‎projects/ad408x_fmc_evb/zed/system_bd.tcl

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###############################################################################
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## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
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source ../common/ad408x_fmc_evb_bd.tcl
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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#system ID
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set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;
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ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
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ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
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ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
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sysid_gen_sys_init_file

‎projects/ad408x_fmc_evb/zed/system_constr.xdc

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###############################################################################
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## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports dco_p] ; ## H4 FMC_CLK0_M2C_P IO_L12P_T1_MRCC_34
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set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports dco_n] ; ## H5 FMC_CLK0_M2C_N IO_L12N_T1_MRCC_34
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set_property -dict {PACKAGE_PIN D18 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports fpgaclk_p] ; ## G2 FMC_CLK1_M2C_P IO_L12P_T1_MRCC_35
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set_property -dict {PACKAGE_PIN C19 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports fpgaclk_n] ; ## G3 FMC_CLK1_M2C_N IO_L12N_T1_MRCC_35
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set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports clk_p] ; ## D8 FMC_LA01_CC_P IO_L14P_T2_SRCC_34
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set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports clk_n] ; ## D9 FMC_LA01_CC_N IO_L14N_T2_SRCC_34
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set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports da_p] ; ## H7 FMC_LA02_P IO_L20P_T3_34
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set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports da_n] ; ## H8 FMC_LA02_N IO_L20N_T3_34
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set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports db_p] ; ## G9 FMC_LA03_P IO_L16P_T2_34
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set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports db_n] ; ## G10 FMC_LA03_N IO_L16N_T2_34
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set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports gpio0_fmc] ; ## H13 FMC_LA07_P IO_L21P_T3_DQS_34
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set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS25} [get_ports gpio1_fmc] ; ## C11 FMC_LA06_N IO_L10N_T1_34
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set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS25} [get_ports gpio2_fmc] ; ## D14 FMC_LA09_P IO_L17P_T2_34
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set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVCMOS25} [get_ports gpio3_fmc] ; ## D15 FMC_LA09_N IO_L17N_T2_34
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set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS25} [get_ports gp0_dir] ; ## H16 FMC_LA11_P IO_L5P_T0_34
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set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS25} [get_ports gp1_dir] ; ## C15 FMC_LA10_N IO_L22N_T3_34
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set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS25} [get_ports gp2_dir] ; ## G15 FMC_LA12_P IO_L18P_T2_34
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set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS25} [get_ports gp3_dir] ; ## H17 FMC_LA11_N IO_L5N_T0_34
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set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS25} [get_ports en_psu] ; ## H19 FMC_LA15_P IO_L2P_T0_34
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set_property -dict {PACKAGE_PIN J17 IOSTANDARD LVCMOS25} [get_ports pwrgd] ; ## H20 FMC_LA15_N IO_L2N_T0_34
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set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS25} [get_ports pd_v33b] ; ## H22 FMC_LA19_P IO_L4P_T0_35
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set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS25} [get_ports osc_en] ; ## G16 FMC_LA12_N IO_L18N_T2_34
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set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS25} [get_ports cs_n_src] ; ## G12 FMC_LA08_P IO_L8P_T1_34
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set_property -dict {PACKAGE_PIN J22 IOSTANDARD LVCMOS25} [get_ports sdio_src] ; ## G13 FMC_LA08_N IO_L8N_T1_34
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set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports sclk_src] ; ## H14 FMC_LA07_N IO_L21N_T3_DQS_34
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set_property -dict {PACKAGE_PIN K20 IOSTANDARD LVCMOS25} [get_ports cs1_0] ; ## C19 FMC_LA14_N IO_L11N_T1_SRCC_34
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set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS25} [get_ports cs1_1] ; ## C22 FMC_LA18_CC_P IO_L14P_T2_AD4P_SRCC_35
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set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS25} [get_ports sdo_1] ; ## D17 FMC_LA13_P IO_L4P_T0_34
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set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVCMOS25} [get_ports sclk1] ; ## D18 FMC_LA13_N IO_L4N_T0_34
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set_property -dict {PACKAGE_PIN K19 IOSTANDARD LVCMOS25} [get_ports sdin1] ; ## C18 FMC_LA14_P IO_L11P_T1_SRCC_34
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set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS25} [get_ports doa_fmc] ; ## D20 FMC_LA17_CC_P IO_L13P_T2_MRCC_35
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set_property -dict {PACKAGE_PIN B20 IOSTANDARD LVCMOS25} [get_ports dob_fmc] ; ## D21 FMC_LA17_CC_N IO_L13N_T2_MRCC_35
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set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports doc_fmc] ; ## G18 FMC_LA16_P IO_L9P_T1_DQS_34
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set_property -dict {PACKAGE_PIN K21 IOSTANDARD LVCMOS25} [get_ports dod_fmc] ; ## G19 FMC_LA16_N IO_L9N_T1_DQS_34
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set_property -dict {PACKAGE_PIN G16 IOSTANDARD LVCMOS25} [get_ports pbio[0]] ; ## H23 FMC_LA19_N IO_L4N_T0_35
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set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS25} [get_ports pbio[1]] ; ## G21 FMC_LA20_P IO_L22P_T3_AD7P_35
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set_property -dict {PACKAGE_PIN G21 IOSTANDARD LVCMOS25} [get_ports pbio[2]] ; ## G22 FMC_LA20_N IO_L22N_T3_AD7N_35
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set_property -dict {PACKAGE_PIN E19 IOSTANDARD LVCMOS25} [get_ports pbio[3]] ; ## H25 FMC_LA21_P IO_L21P_T3_DQS_AD14P_35
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set_property -dict {PACKAGE_PIN E20 IOSTANDARD LVCMOS25} [get_ports pbio[4]] ; ## H26 FMC_LA21_N IO_L21N_T3_DQS_AD14N_35
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set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports pbio[5]] ; ## G24 FMC_LA22_P IO_L20P_T3_AD6P_35
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set_property -dict {PACKAGE_PIN F19 IOSTANDARD LVCMOS25} [get_ports pbio[6]] ; ## G25 FMC_LA22_N IO_L20N_T3_AD6N_35
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set_property -dict {PACKAGE_PIN E15 IOSTANDARD LVCMOS25} [get_ports pbio[7]] ; ## D23 FMC_LA23_P IO_L3P_T0_DQS_AD1P_35
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set_property -dict {PACKAGE_PIN D15 IOSTANDARD LVCMOS25} [get_ports pbio[8]] ; ## D24 FMC_LA23_N IO_L3N_T0_DQS_AD1N_35
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set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS25} [get_ports ad9508_sync] ; ## C10 FMC_LA06_P IO_L10P_T1_34
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set_property -dict {PACKAGE_PIN C20 IOSTANDARD LVCMOS25} [get_ports adf435x_lock] ; ## C23 FMC_LA18_CC_N IO_L14N_T2_AD4N_SRCC_35
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# clocks
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create_clock -period 2.500 -name dco_clk [get_ports dco_p]

‎projects/ad408x_fmc_evb/zed/system_project.tcl

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###############################################################################
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## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source ../../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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adi_project ad408x_fmc_evb_zed
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adi_project_files ad408x_fmc_evb_zed [list \
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"$ad_hdl_dir/library/common/ad_iobuf.v" \
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"$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc" \
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"system_constr.xdc" \
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"system_top.v" ]
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adi_project_run ad408x_fmc_evb_zed
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