+ +
+

AD4052-ARDZ HDL project

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+

Overview

+

The HDL reference design for the AD4050, AD4052, AD4056, and +AD4058 . +They are versatile, 16-bit/12-bit, successive approximation register (SAR) +analog-to-digital converters (ADCs) that enable low-power, high-density data +acquisition solutions without sacrificing precision. These ADCs offer a unique +balance of performance and power efficiency, plus innovative features for +seamlessly switching between high-resolution and low-power modes tailored to the +immediate needs of the system.

+

The AD4050/AD4052/AD4056/AD4058 are ideal for +battery-powered, compact data acquisition and edge sensing applications.

+

The EVAL-AD4050-ARDZ/EVAL-AD4052-ARDZ evaluation boards enable +quick and easy evaluation of the performance and features of the AD4050 +or the AD4052, respectively. +The AD4050 and AD4052 are compact, low power, 12-bit or 16-bit (respectively) +Easy Drive successive approximation register (SAR) analog-to-digital converters +(ADCs).

+

This project has a SPI Engine instance to control and acquire data from +the precision ADC. +This instance provides support for capturing continuous samples at the maximum +sample rate.

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Supported boards

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Supported devices

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Supported carriers

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Block design

+

The data path and clock domains are depicted in the below diagram:

+AD4052-ARDZ block diagram +
+

CPU/Memory interconnects addresses

+

The addresses are dependent on the architecture of the FPGA, having an offset +added to the base address from HDL (see more at HDL Architecture).

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+ + + + + + + + + + + + + + + + + + + + + + + + +
Cora Z7S

Instance

Address

spi_adc_axi_regmap

0x44A0_0000

spi_adc_dmac

0x44A3_0000

axi_iic_eeprom

0x44A4_0000

spi_clkgen

0x44A7_0000

adc_trigger_gen

0x44B0_0000

+
+
+ + + + + + + + + + + + + + + + + + + + + +
DE10-Nano

Instance

Address

axi_dmac_0

0x0002_0000

axi_spi_engine_0

0x0003_0000

pwm_trigger

0x0004_0000

spi_clk_pll_reconfig

0x0005_0000

+
+
+
+

I2C connections

+
+ + + + + + + + + + + + + + + + + + + + +
Cora Z7s

I2C type

I2C manager instance

Alias

Address

Device Address

I2C subordinate

PS

axi_iic_eeprom

axi_iic_eeprom_io

0x44A4_0000

0x52

EEPROM

+
+
+ + + + + + + + + + + + + + + + + + + + +
DE10-Nano

I2C type

I2C manager instance

Alias

Address

Device Address

I2C subordinate

PS

i2c1

sys_hps_i2c1

—

0x52

—

+
+

Device address considering the EEPROM address pins A0=0, A1=1, A2=0.

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+
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SPI connections

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+ ++++++ + + + + + + + + + + + + + + +

SPI type

SPI manager instance

SPI subordinate

CS

PL

axi_spi_engine

ad4052

0

+
+
+
+

GPIOs

+

The Software GPIO number is calculated as follows:

+
    +

  • Cora Z7S: the offset is 54

    • +
+
+ ++++++ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

GPIO signal

Direction

HDL GPIO EMIO

Software GPIO

(from FPGA view)

Zynq-7000

adc_cnv

OUTPUT

34

88

adc_gp1

INOUT

33

87

adc_gp0

INOUT

32

86

+
+
    +

  • DE10-Nano: the offset is 32

    • +
+
+ ++++++ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

GPIO signal

Direction

HDL GPIO EMIO

Software GPIO

(from FPGA view)

DE10-Nano

adc_cnv

OUTPUT

34

2

adc_gp1

INPUT

33

1

adc_gp0

INPUT

32

0

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Interrupts

+

Below are the Programmable Logic interrupts used in this project.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + +

Instance name

HDL

Linux Zynq

Actual Zynq

axi_adc_dma

13

57

89

spi_adc_axi_regmap

12

56

88

axi_iic_eeprom

11

55

87

+
+
+ + + + + + + + + + + + + + + + + + + + +

Instance name

HDL

Linux DE10-Nano

Actual DE10-Nano

axi_dmac_0

4

44

76

axi_spi_engine_0

3

43

75

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+
+
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Building the HDL project

+

The design is built upon ADI’s generic HDL reference design framework. +ADI distributes the bit/elf files of these projects as part of the +ADI Kuiper Linux. +If you want to build the sources, ADI makes them available on the +HDL repository. To get the source you must +clone +the HDL repository, and then build the project as follows:

+

Linux/Cygwin/WSL

+
~$
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cd hdl/projects/ad4052_ardz/coraz7s
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+
+
~/hdl/projects/ad4052_ardz/coraz7s$
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+
+
make
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+
+
~$
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+
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cd hdl/projects/ad4052_ardz/de10nano
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+
+
~/hdl/projects/ad4052_ardz/de10nano$
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+
+
make
+
+
+

A more comprehensive build guide can be found in the Build an HDL project user guide.

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Resources

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More information

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Support

+

Analog Devices, Inc. will provide limited online support for anyone +using the reference design with ADI components via the +EngineerZone FPGA reference designs forum.

+

For questions regarding the ADI Linux device drivers, device trees, etc. +from our Linux GitHub repository, the team will offer support +on the EngineerZone Linux software drivers forum.

+

For questions concerning the ADI No-OS drivers, from our +No-OS GitHub repository, the team will offer support on the +EngineerZone microcontroller No-OS drivers forum.

+

It should be noted, that the older the tools’ versions and release branches +are, the lower the chances to receive support from ADI engineers.

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