From afce5b5d84b3d6dbfdd28cebe7e5914aa08d0eaa Mon Sep 17 00:00:00 2001
From: sarpadi <sergiu.arpadi@analog.com>
Date: Thu, 10 Oct 2024 15:26:23 +0300
Subject: [PATCH] ad7124: Change SPI mode and SPI target clk

---
 projects/ad7124_asdz/de10nano/system_qsys.tcl | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/projects/ad7124_asdz/de10nano/system_qsys.tcl b/projects/ad7124_asdz/de10nano/system_qsys.tcl
index 599c2208c6..28d1ea4401 100755
--- a/projects/ad7124_asdz/de10nano/system_qsys.tcl
+++ b/projects/ad7124_asdz/de10nano/system_qsys.tcl
@@ -11,8 +11,9 @@ set_instance_parameter_value sys_gpio_in {edgeType} {FALLING}
 set_instance_parameter_value sys_gpio_in {generateIRQ} {true}
 set_instance_parameter_value sys_gpio_in {irqType} {EDGE}
 
-set_instance_parameter_value sys_spi {clockPolarity} {0}
-set_instance_parameter_value sys_spi {targetClockRate} {20000000.0}
+set_instance_parameter_value sys_spi {targetClockRate} {5000000.0}
+set_instance_parameter_value sys_spi {clockPhase} {1}
+set_instance_parameter_value sys_spi {clockPolarity} {1}
 
 #system ID
 set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}