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iio: adc: adrv9002: api: fix multi device support
One some functions of the API, in order to avoid huge arrays in the stack (which is problematic for the kernel), we just made those arrays global and move them into the data section. Well, if we have more than one adr9002 instantiated in one system, we'll be in trouble. Hence, to fix it just create some local global locks to protect that data. None of the affected paths is a fast path and the contention should be minimal to the point of being neglectable (and can only exist in case we do have multiple devices in the system). This way we do not need to increase the adi_adrv9001_Device struct which is already huge. Signed-off-by: Nuno Sa <nuno.sa@analog.com>
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5 files changed

+184
-141
lines changed

5 files changed

+184
-141
lines changed

drivers/iio/adc/navassa/devices/adrv9001/private/src/adrv9001_arm.c

Lines changed: 38 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,11 @@
3737
#include "adrv9001_bf.h"
3838
#include "adi_adrv9001_hal.h"
3939
#ifdef __KERNEL__
40+
#include <linux/cleanup.h>
41+
#include <linux/mutex.h>
4042
#include <linux/string.h>
43+
44+
static DEFINE_MUTEX(dma_wr_lock);
4145
#endif
4246

4347
/* Header files related to libraries */
@@ -103,8 +107,8 @@ const char* const adrv9001_error_table_CmdCtrlMboxCmdError[] =
103107
"Command error"
104108
};
105109

106-
const char* const adrv9001_error_table_CmdError[] =
107-
{
110+
const char* const adrv9001_error_table_CmdError[] =
111+
{
108112
"Error occurred during an Init Calibration. Check that no signal is being applied to the Rx ports. Check that "
109113
"correct external LOs are applied, and synchronized, where appropriate",
110114
"Error occurred during a Tracking Calibration. Disable tracking calibrations, reset and program. If enabled "
@@ -253,7 +257,7 @@ static __maybe_unused int32_t adrv9001_DmaMemReadByte(adi_adrv9001_Device_t *dev
253257
}
254258

255259
regRead |= ADRV9001_DMA_CTL_LEGACY_MODE;
256-
260+
257261
/* bus size, 2'b00=byte; 2'b01=half-word; 2'b10=full-word; 2'b11=invalid */
258262
/* core_bf.bus_size.write(bf_status, 2'b10); */
259263
regRead |= ADRV9001_BF_ENCODE(0, ADRV9001_DMA_CTL_BUS_SIZE_MASK, ADRV9001_DMA_CTL_BUS_SIZE_SHIFT);
@@ -325,7 +329,7 @@ static __maybe_unused int32_t adrv9001_DmaMemReadByte(adi_adrv9001_Device_t *dev
325329
returnData[i + 1] = dataRead0;
326330
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_2", ADRV9001_ADDR_ARM_DMA_DATA2, &dataRead0);
327331
returnData[i + 2] = dataRead0;
328-
332+
329333
/* 'single_instruction' has to be cleared before reading DMA_DATA3 and set back after */
330334
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x0);
331335
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_3", ADRV9001_ADDR_ARM_DMA_DATA3, &dataRead0);
@@ -1042,7 +1046,7 @@ static void adrv9001_LoadSsiConfig(adi_adrv9001_Device_t *device, uint32_t *offs
10421046
cfgData[tempOffset++] = (uint8_t)ssiConfig->cmosClkInversionEn;
10431047

10441048
cfgData[tempOffset++] = (uint8_t)ssiConfig->ddrEn;
1045-
1049+
10461050
cfgData[tempOffset++] = (uint8_t)ssiConfig->rxMaskStrobeEn;
10471051

10481052
/* 4 bytes of padding is needed for alignment */
@@ -1563,15 +1567,15 @@ typedef struct
15631567
duplexMode_e duplexMode;
15641568
uint8_t fhModeOn;
15651569
uint8_t reserved1[1u]; //< Reserved for future feature
1566-
uint8_t numDynamicProfile; // Number of Profile. =1 means only one profile and no switching
1570+
uint8_t numDynamicProfile; // Number of Profile. =1 means only one profile and no switching
15671571
mcsMode_e mcsMode; // MCS mode selection: 0 - Disable, 1 - MCS Only, 2 - MCS + RFPLL phase sync
1568-
adcType_e adcTypeMonitor; // ADC type used in Monitor Mode
1569-
uint16_t pllLockTime_us; // Required lock time in microseconds for PLLs, based on ref_clk and loop bandwidth
1570-
pllModulus_t pllModuli; // PLL moduli
1571-
uint16_t pllPhaseSyncWait_us; // Worst case phase sync wait time in FH
1572-
mcsInf_e mcsInterfaceType; // 0-Disabled, 1-CMOS, 2-LVDS
1573-
uint8_t warmBootEnable; // Enable WarmBoot - Load initCal cefficients instead of running initCals
1574-
uint32_t reserved[1u]; // Reserved for future feature
1572+
adcType_e adcTypeMonitor; // ADC type used in Monitor Mode
1573+
uint16_t pllLockTime_us; // Required lock time in microseconds for PLLs, based on ref_clk and loop bandwidth
1574+
pllModulus_t pllModuli; // PLL moduli
1575+
uint16_t pllPhaseSyncWait_us; // Worst case phase sync wait time in FH
1576+
mcsInf_e mcsInterfaceType; // 0-Disabled, 1-CMOS, 2-LVDS
1577+
uint8_t warmBootEnable; // Enable WarmBoot - Load initCal cefficients instead of running initCals
1578+
uint32_t reserved[1u]; // Reserved for future feature
15751579
} deviceSysConfig_t;
15761580
*/
15771581
static void adrv9001_DeviceSysConfigWrite(adi_adrv9001_Device_t *device, const adi_adrv9001_DeviceSysConfig_t *sysConfig, uint8_t cfgData[], uint32_t *offset)
@@ -1609,13 +1613,13 @@ static void adrv9001_DeviceSysConfigWrite(adi_adrv9001_Device_t *device, const a
16091613
{
16101614
adrv9001_LoadFourBytes(&tempOffset, cfgData, sysConfig->pllModulus.dmModulus[i]);
16111615
}
1612-
1616+
16131617
/* PLL phase sync wait time in us */
16141618
adrv9001_LoadTwoBytes(&tempOffset, cfgData, sysConfig->pllPhaseSyncWait_us);
16151619

16161620
cfgData[tempOffset++] = sysConfig->mcsInterfaceType;
16171621
cfgData[tempOffset++] = sysConfig->warmBootEnable;
1618-
1622+
16191623
/* 4 bytes padding; Reserved for future use */
16201624
tempOffset += 4;
16211625

@@ -1994,7 +1998,7 @@ int32_t adrv9001_DmaMemWrite(adi_adrv9001_Device_t *device, uint32_t address, co
19941998
int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
19951999
uint8_t singleInstruction = 0;
19962000
uint8_t spiMode = 0;
1997-
2001+
19982002
ADI_ENTRY_PTR_ARRAY_EXPECT(device, data, byteCount);
19992003

20002004
ADRV9001_DMAINFO("ARM_MEM_WRITE", armMemAddress, byteCount);
@@ -2015,7 +2019,7 @@ int32_t adrv9001_DmaMemWrite(adi_adrv9001_Device_t *device, uint32_t address, co
20152019
/* If Address is not on word boundary, Or ByteCount is not on Word boundary */
20162020
if (((armMemAddress & 0x00000003) > 0) || ((byteCount & 0x00000003) > 0))
20172021
{
2018-
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
2022+
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
20192023
(ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STREAMING_BYTES_4 == spiWriteMode))
20202024
{
20212025
ADI_ERROR_REPORT(&device->common,
@@ -2059,7 +2063,7 @@ int32_t adrv9001_DmaMemWrite(adi_adrv9001_Device_t *device, uint32_t address, co
20592063

20602064
/* setting up the DMA control register for a write */
20612065
ADRV9001_SPIWRITEBYTEDMA(device, "ARM_DMA_CTL", ADRV9001_ADDR_ARM_DMA_CTL, regWrite);
2062-
2066+
20632067
/* Enable single instruction and disable SPI streaming mode by default.
20642068
* If ADRV9001 SPI streming mode is selected, then single instruction and single instruction are disbled */
20652069
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x1);
@@ -2194,14 +2198,15 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
21942198
static uint8_t addrLsbArray[ADI_ADRV9001_FREQ_HOPPING_MAX_NUM_BYTES];
21952199
static uint8_t dataArray[ADI_ADRV9001_FREQ_HOPPING_MAX_NUM_BYTES];
21962200

2201+
guard(mutex)(&dma_wr_lock);
21972202
memset(addrMsbArray, 0, sizeof(addrMsbArray));
21982203
memset(addrLsbArray, 0, sizeof(addrLsbArray));
21992204
memset(dataArray, 0, sizeof(dataArray));
22002205
#endif
22012206

22022207
ADI_ENTRY_PTR_ARRAY_EXPECT(device, numHopTableEntries, numHopTableEntriesByteCount);
22032208
ADI_ENTRY_PTR_ARRAY_EXPECT(device, hopTableBufferData, hopTableBufferDataByteCount);
2204-
2209+
22052210
/* Trigger appropriate SPI Interrupt upon table load */
22062211
if (hopSignal == ADI_ADRV9001_FH_HOP_SIGNAL_1)
22072212
{
@@ -2217,7 +2222,7 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
22172222
}
22182223

22192224
ADRV9001_DMAINFO("ARM_MEM_WRITE", armMemAddress, byteCount);
2220-
2225+
22212226
regWrite &= ~ADRV9001_DMA_CTL_RD_WRB;
22222227
regWrite |= ADRV9001_DMA_CTL_SYS_CODEB;
22232228
regWrite |= ADRV9001_BF_ENCODE(2, ADRV9001_DMA_CTL_BUS_SIZE_MASK, ADRV9001_DMA_CTL_BUS_SIZE_SHIFT);
@@ -2227,7 +2232,7 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
22272232
{
22282233
regWrite |= ADRV9001_DMA_CTL_AUTO_INCR;
22292234
}
2230-
2235+
22312236
/* setting up the DMA control register for a write */
22322237
addrMsbArray[addrIndex] = (uint8_t)(((ADRV9001_SPI_WRITE_POLARITY & 0x01) << 7) | ((ADRV9001_ADDR_ARM_DMA_CTL >> 8) & 0x7F));
22332238
addrLsbArray[addrIndex] = (uint8_t)ADRV9001_ADDR_ARM_DMA_CTL;
@@ -2267,7 +2272,7 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
22672272
dataArray[addrIndex] = numHopTableEntries[dataIndex];
22682273
addrIndex++;
22692274
}
2270-
2275+
22712276
addrMsbArray[addrIndex] = (uint8_t)(((ADRV9001_SPI_WRITE_POLARITY & 0x01) << 7) | ((ADRV9001_ADDR_ARM_DMA_ADDR3 >> 8) & 0x7F));
22722277
addrLsbArray[addrIndex] = (uint8_t)ADRV9001_ADDR_ARM_DMA_ADDR3;
22732278
dataArray[addrIndex] = (uint8_t)((hopTableBufferAddress) >> ADRV9001_ADDR_ARM_DMA_ADDR3_BYTE_SHIFT);
@@ -2421,7 +2426,7 @@ int32_t adrv9001_DmaMemRead(adi_adrv9001_Device_t *device, uint32_t address, uin
24212426
returnData[i + 2] = dataRead;
24222427
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_1", ADRV9001_ADDR_ARM_DMA_DATA1, &dataRead);
24232428
returnData[i + 1] = dataRead;
2424-
2429+
24252430
/* 'single_instruction' has to be cleared before reading DMA_DATA3 and set back after */
24262431
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x0);
24272432
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_0", ADRV9001_ADDR_ARM_DMA_DATA0, &dataRead);
@@ -2491,7 +2496,7 @@ int32_t adrv9001_FlexStreamProcessorMemWrite(adi_adrv9001_Device_t *device,
24912496
/* If Address is not on word boundary, Or ByteCount is not on Word boundary */
24922497
if (((flexSpAddress & 0x00000003) > 0) || ((byteCount & 0x00000003) > 0))
24932498
{
2494-
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
2499+
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
24952500
(ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STREAMING_BYTES_4 == spiWriteMode))
24962501
{
24972502
ADI_ERROR_REPORT(&device->common,
@@ -2526,7 +2531,7 @@ int32_t adrv9001_FlexStreamProcessorMemWrite(adi_adrv9001_Device_t *device,
25262531

25272532
/* setting up the flex SP DMA control register for a write */
25282533
ADRV9001_SPIWRITEBYTEDMA(device, "FLEX_SP_ARM_DMA_CTL", ADRV9001_ADDR_FLEX_SP_ARM_DMA_CTL, regWrite);
2529-
2534+
25302535
/* Enable single instruction and disable SPI streaming mode by default.
25312536
* If ADRV9001 SPI streming mode is selected, then single instruction and single instruction are disbled */
25322537
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x1);
@@ -2792,7 +2797,7 @@ static const char* adrv9001_CmdErrMsgGet(uint32_t errCode)
27922797
{
27932798
return adrv9001_error_table_CmdError[6];
27942799
}
2795-
2800+
27962801
return NULL;
27972802
}
27982803

@@ -2849,7 +2854,7 @@ int32_t adrv9001_ArmCmdErrorHandler(adi_adrv9001_Device_t *device, uint32_t detE
28492854

28502855
ADI_EXPECT(adrv9001_ArmMailBoxErrCodeGet, device, &mailboxErrCode);
28512856
errorString = adrv9001_CmdErrMsgGet(mailboxErrCode);
2852-
2857+
28532858
ADI_ERROR_REPORT(&device->common,
28542859
ADI_ADRV9001_SRC_ARMCMD,
28552860
mailboxErrCode,
@@ -2951,7 +2956,7 @@ static uint32_t adrv9001_ArmProfileWrite_Validate(adi_adrv9001_Device_t *device,
29512956
ADI_ERROR_RETURN(device->common.error.newAction);
29522957
}
29532958
}
2954-
2959+
29552960
/* Range check parameters in adi_adrv9001_TxSettings_t */
29562961
for (i = 0; i < ADI_ADRV9001_MAX_TXCHANNELS; i++)
29572962
{
@@ -2967,7 +2972,7 @@ static uint32_t adrv9001_ArmProfileWrite_Validate(adi_adrv9001_Device_t *device,
29672972
ADI_RANGE_CHECK(device, init->tx.txProfile[i].txSsiConfig.ssiDataFormatSel, ADI_ADRV9001_SSI_FORMAT_2_BIT_SYMBOL_DATA, ADI_ADRV9001_SSI_FORMAT_22_BIT_I_Q_DATA_1_BIT_GAIN_CHANGE_8_BIT_GAIN_INDEX);
29682973
ADI_RANGE_CHECK(device, init->tx.txProfile[i].txSsiConfig.numLaneSel, ADI_ADRV9001_SSI_1_LANE, ADI_ADRV9001_SSI_4_LANE);
29692974
ADI_RANGE_CHECK(device, init->tx.txProfile[i].txSsiConfig.strobeType, ADI_ADRV9001_SSI_SHORT_STROBE, ADI_ADRV9001_SSI_LONG_STROBE);
2970-
2975+
29712976
if ((ADI_ADRV9001_SSI_TYPE_LVDS == init->tx.txProfile[i].txSsiConfig.ssiType) &&
29722977
(false == init->tx.txProfile[i].txSsiConfig.ddrEn) &&
29732978
(init->tx.txProfile[i].txInterfaceSampleRate_Hz > 30720000))
@@ -3144,7 +3149,7 @@ int32_t adrv9001_ArmProfileWrite(adi_adrv9001_Device_t *device, const adi_adrv90
31443149
cfgData[offset++] = (uint8_t)(init->clocks.armPowerSavingClkDiv - 1);
31453150

31463151
cfgData[offset++] = (uint8_t)init->clocks.refClockOutEnable;
3147-
3152+
31483153
cfgData[offset++] = (uint8_t)init->clocks.auxPllPower;
31493154
cfgData[offset++] = (uint8_t)init->clocks.clkPllPower;
31503155

@@ -3203,14 +3208,14 @@ int32_t adrv9001_ArmProfileWrite(adi_adrv9001_Device_t *device, const adi_adrv90
32033208
if (ADRV9001_BF_EQUAL(device->devStateInfo.profilesValid, ADI_ADRV9001_TX_PROFILE_VALID))
32043209
{
32053210
armChannels |= (init->tx.txInitChannelMask & (ADI_ADRV9001_TX1 | ADI_ADRV9001_TX2));
3206-
3211+
32073212
/* Tx channels must have a valid and enabled ILB channel unless the signaling is Direct FM/FSK */
32083213
if(ADRV9001_BF_EQUAL(init->tx.txInitChannelMask, ADI_ADRV9001_TX1) &&
32093214
(init->tx.txProfile[0].outputSignaling != ADI_ADRV9001_TX_DIRECT_FM_FSK))
32103215
{
32113216
armChannels |= (init->rx.rxInitChannelMask & ADI_ADRV9001_ILB1);
32123217
}
3213-
3218+
32143219
if (ADRV9001_BF_EQUAL(init->tx.txInitChannelMask, ADI_ADRV9001_TX2) &&
32153220
(init->tx.txProfile[1].outputSignaling != ADI_ADRV9001_TX_DIRECT_FM_FSK))
32163221
{
@@ -3499,7 +3504,7 @@ int32_t adrv9001_DynamicProfile_Write(adi_adrv9001_Device_t *device,
34993504
int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
35003505
uint32_t offset = 0;
35013506
uint8_t cfgData[ADRV9001_DYNAMIC_PROFILE_BLOB_SIZE] = { 0 };
3502-
3507+
35033508
cfgData[offset++] = dynamicProfile->dynamicProfileIndex;
35043509
cfgData[offset++] = 0; // padding
35053510
cfgData[offset++] = 0; // padding

drivers/iio/adc/navassa/devices/adrv9001/public/src/adi_adrv9001_cals.c

Lines changed: 23 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -25,10 +25,15 @@
2525
#include "adrv9001_arm_macros.h"
2626
#include "adrv9001_init.h"
2727
#include "adrv9001_reg_addr_macros.h"
28+
#include "linux/mutex.h"
2829
#include "object_ids.h"
2930

3031
#ifdef __KERNEL__
32+
#include <linux/cleanup.h>
33+
#include <linux/mutex.h>
3134
#include <linux/string.h>
35+
36+
static DEFINE_MUTEX(warmboot_lock);
3237
#else
3338
#include <string.h>
3439
#endif
@@ -84,7 +89,7 @@ int32_t adi_adrv9001_cals_InitCals_Run(adi_adrv9001_Device_t *adrv9001,
8489

8590
/* Mode to select the Init calibration algorithms to run */
8691
payload[1] = (uint8_t)(initCals->calMode);
87-
92+
8893
/* A value of true will force all enabled calibrations to re-run */
8994
payload[2] = (uint8_t)(initCals->force);
9095

@@ -596,15 +601,15 @@ int32_t adi_adrv9001_cals_InternalPathDelay_Get_Validate(adi_adrv9001_Device_t *
596601
{
597602
static uint8_t MAX_NUM_PROFILE = 6;
598603
adi_adrv9001_ChannelState_e state = ADI_ADRV9001_CHANNEL_STANDBY;
599-
604+
600605
ADI_RANGE_CHECK(adrv9001, port, ADI_RX, ADI_TX);
601606
ADI_RANGE_CHECK(adrv9001, channel, ADI_CHANNEL_1, ADI_CHANNEL_2);
602607
ADI_NULL_PTR_RETURN(&adrv9001->common, internalPathDelays_ns);
603608
ADI_RANGE_CHECK(adrv9001, length, 1, MAX_NUM_PROFILE);
604609
ADI_EXPECT(adi_adrv9001_Radio_Channel_State_Get, adrv9001, port, channel, &state);
605610
if (ADI_ADRV9001_CHANNEL_STANDBY == state)
606611
{
607-
ADI_ERROR_REPORT(&adrv9001->common,
612+
ADI_ERROR_REPORT(&adrv9001->common,
608613
ADI_COMMON_ERRSRC_API,
609614
ADI_COMMON_ERR_INV_PARAM,
610615
ADI_COMMON_ACT_ERR_CHECK_PARAM,
@@ -736,7 +741,7 @@ int32_t adi_adrv9001_cals_Dynamic_profiles_calibrate_Validate(adi_adrv9001_Devic
736741
ADI_ENTRY_PTR_EXPECT(adrv9001, initCals);
737742
ADI_NULL_PTR_RETURN(&adrv9001->common, errorFlag);
738743

739-
ADI_NULL_PTR_RETURN(&adrv9001->common, dynamicProfile);
744+
ADI_NULL_PTR_RETURN(&adrv9001->common, dynamicProfile);
740745
ADI_RANGE_CHECK(adrv9001, length, 1, MAX_NUM_PROFILE);
741746

742747
for (port = ADI_RX; port <= ADI_TX; port++)
@@ -774,7 +779,7 @@ int32_t adi_adrv9001_cals_Dynamic_profiles_calibrate(adi_adrv9001_Device_t *adrv
774779
{
775780
int8_t i = 0;
776781
ADI_EXPECT(adi_adrv9001_cals_Dynamic_profiles_calibrate_Validate, adrv9001, initCals, errorFlag, dynamicProfile, length);
777-
782+
778783
for (i = 0; i <= (length - 1); i++)
779784
{
780785
ADI_EXPECT(adi_adrv9001_arm_NextDynamicProfile_Set, adrv9001, &dynamicProfile[i]);
@@ -796,14 +801,16 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_UniqueEnabledCals_Get(adi_adrv9001_D
796801
#else
797802
static uint32_t tblSize[4];
798803
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_VECTOR_TABLE_WORDS];
804+
805+
guard(mutex)(&warmboot_lock);
799806
#endif
800807
int calNo;
801808
int arrayIndex = 0;
802809
calNumbers->numberUniqueEnabledCals = 0;
803810

804811
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020000, tblSize, sizeof(tblSize), 0);
805812
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020004, vecTbl, tblSize[0] * 16, 1);
806-
813+
807814
for (calNo = 0; calNo < tblSize[0]; calNo++)
808815
{
809816
uint32_t initMask = vecTbl[(4*calNo) + 2];
@@ -850,12 +857,14 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_MaxArray_Get(adi_adrv90
850857
static uint32_t tblSize[4];
851858
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
852859
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
860+
861+
guard(mutex)(&warmboot_lock);
853862
#endif
854863
int calNo;
855864

856865
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020000, tblSize, sizeof(tblSize), 0);
857866
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020004, vecTbl, tblSize[0] * 16, 1);
858-
867+
859868
for (calNo = 0; calNo < tblSize[0]; calNo++)
860869
{
861870
uint32_t addr = vecTbl[4*calNo];
@@ -906,11 +915,13 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_UniqueArray_Get(adi_adr
906915
static uint32_t tblSize[4];
907916
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
908917
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
918+
919+
guard(mutex)(&warmboot_lock);
909920
#endif
910921
int calNo;
911922
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020000, tblSize, sizeof(tblSize), 0);
912923
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020004, vecTbl, tblSize[0] * 16, 1);
913-
924+
914925
for (calNo = 0; calNo < tblSize[0]; calNo++)
915926
{
916927
uint32_t addr = vecTbl[4*calNo];
@@ -958,6 +969,8 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_MaxArray_Set(adi_adrv90
958969
static uint32_t tblSize[4];
959970
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
960971
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
972+
973+
guard(mutex)(&warmboot_lock);
961974
#endif
962975
int calNo;
963976

@@ -1014,6 +1027,8 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_UniqueArray_Set(adi_adr
10141027
static uint32_t tblSize[4];
10151028
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
10161029
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
1030+
1031+
guard(mutex)(&warmboot_lock);
10171032
#endif
10181033
int calNo;
10191034

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