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word-area.lst
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Sat May 7 2016 20:07 Page 1
***************************************
** WDC 65C816 Macro Assembler **
** **
** Version 3.49.1- Feb 6 2006 **
***************************************
1 ;===============================================================================
2 ; _ _ _ ____ _____ _ _ _ ___ _ __
3 ; / \ | \ | / ___| | ___|__ _ __| |_| |__ ( )( _ )/ |/ /_
4 ; / _ \ | \| \___ \ | |_ / _ \| '__| __| '_ \ |/ / _ \| | '_ \
5 ; / ___ \| |\ |___) | | _| (_) | | | |_| | | | | (_) | | (_) |
6 ; /_/ \_\_| \_|____/ |_| \___/|_| \__|_| |_| \___/|_|\___/
7 ;
8 ; A Direct Threaded ANS Forth for the WDC 65C816
9 ;-------------------------------------------------------------------------------
10 ; Copyright (C)2015-2016 HandCoded Software Ltd.
11 ; All rights reserved.
12 ;
13 ; This work is made available under the terms of the Creative Commons
14 ; Attribution-NonCommercial-ShareAlike 4.0 International license. Open the
15 ; following URL to see the details.
16 ;
17 ; http://creativecommons.org/licenses/by-nc-sa/4.0/
18 ;
19 ;===============================================================================
20 ; Notes:
21 ;
22 ; This implementation is designed to run in the 65C816's native mode with both
23 ; the accumulator and index registers in 16-bit mode except when the word needs
24 ; 8-bit memory access.
25 ;
26 ; The DP register is used for the Forth data stack is values can be accessed
27 ; using the direct-page addressing modes. The code uses the same offsets as
28 ; would be used with the stack relative instructions (i.e <1, <3, etc.).
29 ;
30 ; The Y register holds the forth instruction pointer leaving X free for general
31 ; use in words. Some words push Y if they need an extra register.
32 ;
33 ; Some of the high-level definitions are based on Bradford J. Rodriguez's
34 ; CamelForth implementations.
35 ;
36 ;-------------------------------------------------------------------------------
37
38 pw 132
39 inclist on
40 maclist off
41
42 chip 65816
43 longi off
44 longa off
45
46 include "w65c816.inc"
1 ;==============================================================================
2 ; __ ____ ____ ____ ___ _ __
3 ; \ \ / / /_| ___| / ___( _ )/ |/ /_
4 ; \ \ /\ / / '_ \___ \| | / _ \| | '_ \
5 ; \ V V /| (_) |__) | |__| (_) | | (_) |
6 ; \_/\_/ \___/____/ \____\___/|_|\___/
Sat May 7 2016 20:07 Page 2
7 ;
8 ; Western Design Center W65C816 device definitions
9 ;------------------------------------------------------------------------------
10 ; Copyright (C)2015 HandCoded Software Ltd.
11 ; All rights reserved.
12 ;
13 ; This work is made available under the terms of the Creative Commons
14 ; Attribution-NonCommercial-ShareAlike 4.0 International license. Open the
15 ; following URL to see the details.
16 ;
17 ; http://creativecommons.org/licenses/by-nc-sa/4.0/
18 ;
19 ;===============================================================================
20 ; Notes:
21 ;
22 ; Various macros and definitions for the W65C816 microprocessor.
23 ;
24 ;===============================================================================
25 ; Revision History:
26 ;
27 ; 2015-12-18 AJ Initial version
28 ;-------------------------------------------------------------------------------
29 ; $Id$
30 ;-------------------------------------------------------------------------------
31
32 ;==============================================================================
33 ; Status Register Bits
34 ;------------------------------------------------------------------------------
35
36 00000080 N_FLAG equ 1<<7
37 00000040 V_FLAG equ 1<<6
38 00000020 M_FLAG equ 1<<5
39 00000010 X_FLAG equ 1<<4
40 00000010 B_FLAG equ 1<<4
41 00000008 D_FLAG equ 1<<3
42 00000004 I_FLAG equ 1<<2
43 00000002 Z_FLAG equ 1<<1
44 00000001 C_FLAG equ 1<<0
45
46 ;==============================================================================
47 ; Macros
48 ;------------------------------------------------------------------------------
49
50 ; Puts the processor in emulation mode. A, X and Y become 8-bits and the stack
51 ; is fixed at $0100-$01ff.
52
53 emulate macro
54 sec
55 xce
56 longa off
57 longi off
58 endm
59
60 ; Puts the processor in native mode. The size of the memory and index register
61 ; operations is not controlled by the M & X bits in the status register.
62
63 native macro
64 clc
Sat May 7 2016 20:07 Page 3
65 xce
66 endm
67
68 ; Resets the M bit making the accumulator and memory accesses 16-bits wide.
69
70 long_a macro
71 rep #M_FLAG
72 longa on
73 endm
74
75 ; Resets the X bit making the index registers 16-bits wide
76
77 long_i macro
78 rep #X_FLAG
79 longi on
80 endm
81
82 ; Resets the M and X bits making the accumulator, memory accesses and index
83 ; registers 16-bits wide.
84
85 long_ai macro
86 rep #M_FLAG|X_FLAG
87 longa on
88 longi on
89 endm
90
91 ; Sets the M bit making the accumulator and memory accesses 8-bits wide.
92
93 short_a macro
94 sep #M_FLAG
95 longa off
96 endm
97
98 ; Sets the X bit making the index registers 8-bits wide.
99
100 short_i macro
101 sep #X_FLAG
102 longi off
103 endm
104
105 ; Sets the M & X bits making the accumulator, memory accesses and index
106 ; registers 8-bits wide.
107
108 short_ai macro
109 sep #M_FLAG|X_FLAG
110 longa off
111 longi off
112 endm
47
48 ;===============================================================================
49 ;-------------------------------------------------------------------------------
50
51 udata
52
53 public NEXT_WORD
54
55 00:0000: NEXT_WORD: ds 4096;
56
Sat May 7 2016 20:07 Page 4
57 end
Lines assembled: 169
Errors: 0