From 010bfdbe78b357db4dc206442311901145474e25 Mon Sep 17 00:00:00 2001 From: Kevin Phoenix Date: Tue, 31 Oct 2023 16:50:43 -0700 Subject: [PATCH] Fix ARM32 -> ARM --- tests/test_lift.py | 2 +- tests/test_pyvex.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/test_lift.py b/tests/test_lift.py index cf441be9..6a0416ab 100644 --- a/tests/test_lift.py +++ b/tests/test_lift.py @@ -50,7 +50,7 @@ def test_skipstmts_toomanyexits(self): "3069C059B4C93049B4E9350ABCDF834C1CDF83CE185E8030094" "E803004B9683E8030015A94498C4F7E2EA " ) - arch = pyvex.ARCH_ARM32_LE + arch = pyvex.ARCH_ARM_LE # Lifting the first four bytes will not cause any problem. Statements should be skipped as expected b = IRSB(bytes_[:34], 0xC6951, arch, opt_level=1, bytes_offset=5, skip_stmts=True) assert len(b.exit_statements) > 0 diff --git a/tests/test_pyvex.py b/tests/test_pyvex.py index 1ce18abd..c92dc959 100644 --- a/tests/test_pyvex.py +++ b/tests/test_pyvex.py @@ -75,7 +75,7 @@ def test_irsb_empty(self): self.assertRaises(Exception, pyvex.IRSB, data="", arch=pyvex.ARCH_AMD64, mem_addr=0) def test_irsb_arm(self): - irsb = pyvex.IRSB(data=b"\x33\xff\x2f\xe1", mem_addr=0, arch=pyvex.ARCH_ARM32_BE) + irsb = pyvex.IRSB(data=b"\x33\xff\x2f\xe1", mem_addr=0, arch=pyvex.ARCH_ARM_BE) assert len([i for i in irsb.statements if type(i) == pyvex.IRStmt.IMark]) == 1 def test_irsb_popret(self):