diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h
index a5ecdb0e6bcc2a..339f8f96c236b2 100644
--- a/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/llvm/include/llvm/BinaryFormat/ELF.h
@@ -895,7 +895,10 @@ enum : unsigned {
 
 // SBF specific e_flags
 enum : unsigned {
-  EF_SBF_V2 = 0x20,
+  EF_SBF_V0 = 0x00,
+  EF_SBF_V1 = 0x01,
+  EF_SBF_V2 = 0x02,
+  EF_SBF_V3 = 0x03,
 };
 
 // ELF Relocation types for SBF.
diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp b/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
index 2090878d20c1b8..628a82d2354400 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
@@ -26,7 +26,6 @@ class SBFAsmBackend : public MCAsmBackend {
 public:
   SBFAsmBackend(endianness Endian, const MCSubtargetInfo &STI)
       : MCAsmBackend(Endian),
-        isSBFv2(STI.getCPU() == "sbfv2"),
         relocAbs64(STI.hasFeature(SBF::FeatureRelocAbs64)) {}
   ~SBFAsmBackend() override = default;
 
@@ -50,7 +49,6 @@ class SBFAsmBackend : public MCAsmBackend {
   bool writeNopData(raw_ostream &OS, uint64_t Count,
                     const MCSubtargetInfo *STI) const override;
 private:
-  bool isSBFv2;
   bool relocAbs64;
 };
 
@@ -107,7 +105,7 @@ void SBFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
 
 std::unique_ptr<MCObjectTargetWriter>
 SBFAsmBackend::createObjectTargetWriter() const {
-  return createSBFELFObjectWriter(0, relocAbs64, isSBFv2);
+  return createSBFELFObjectWriter(0, relocAbs64);
 }
 
 MCAsmBackend *llvm::createSBFAsmBackend(const Target &T,
diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp b/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
index ea5307ed13767e..15c1ae681402de 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
@@ -22,7 +22,7 @@ namespace {
 
 class SBFELFObjectWriter : public MCELFObjectTargetWriter {
 public:
-  SBFELFObjectWriter(uint8_t OSABI, bool relocAbs64, bool isSBFv2);
+  SBFELFObjectWriter(uint8_t OSABI, bool relocAbs64);
   ~SBFELFObjectWriter() override = default;
 
 protected:
@@ -47,10 +47,8 @@ bool SBFELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
   return true;
 }
 
-SBFELFObjectWriter::SBFELFObjectWriter(uint8_t OSABI,
-                                       bool relocAbs64, bool isSBFv2)
-  : MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI,
-                            isSBFv2 ? ELF::EM_SBF : ELF::EM_BPF,
+SBFELFObjectWriter::SBFELFObjectWriter(uint8_t OSABI, bool relocAbs64)
+  : MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI,ELF::EM_SBF,
                             /*HasRelocationAddend*/ false),
       relocAbs64(relocAbs64) {}
 
@@ -110,6 +108,6 @@ unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
 }
 
 std::unique_ptr<MCObjectTargetWriter>
-llvm::createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64, bool isSBFv2) {
-  return std::make_unique<SBFELFObjectWriter>(OSABI, useRelocAbs64, isSBFv2);
+llvm::createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64) {
+  return std::make_unique<SBFELFObjectWriter>(OSABI, useRelocAbs64);
 }
diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.cpp b/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.cpp
index e92e2fcb534e4e..621145e1165946 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.cpp
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.cpp
@@ -67,9 +67,18 @@ static MCStreamer *createSBFMCStreamer(const Triple &T, MCContext &Ctx,
   if (RelaxAll)
     S->getAssembler().setRelaxAll(true);
   const MCSubtargetInfo *STI = Ctx.getSubtargetInfo();
-  if (STI->getCPU() == "sbfv2") {
-    S->getAssembler().setELFHeaderEFlags(llvm::ELF::EF_SBF_V2);
+
+  StringRef CPU = STI->getCPU();
+  unsigned EFlag = llvm::ELF::EF_SBF_V0;
+  if (CPU == "v1") {
+    EFlag = llvm::ELF::EF_SBF_V1;
+  } else if (CPU == "v2") {
+    EFlag = llvm::ELF::EF_SBF_V2;
+  } else if (CPU == "v3") {
+    EFlag = llvm::ELF::EF_SBF_V3;
   }
+  S->getAssembler().setELFHeaderEFlags(EFlag);
+
   return S;
 }
 
diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h b/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
index f6cc55b67d2473..99f04358160ed9 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
@@ -43,7 +43,7 @@ MCAsmBackend *createSBFbeAsmBackend(const Target &T, const MCSubtargetInfo &STI,
                                     const MCTargetOptions &Options);
 
 std::unique_ptr<MCObjectTargetWriter>
-createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64, bool isSBFv2);
+createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64);
 } // namespace llvm
 
 // Defines symbolic names for SBF registers.  This defines a mapping from
diff --git a/llvm/lib/Target/SBF/SBFSubtarget.cpp b/llvm/lib/Target/SBF/SBFSubtarget.cpp
index 5d3e24fef099c4..d6821041a4f5dc 100644
--- a/llvm/lib/Target/SBF/SBFSubtarget.cpp
+++ b/llvm/lib/Target/SBF/SBFSubtarget.cpp
@@ -36,10 +36,10 @@ SBFSubtarget &SBFSubtarget::initializeSubtargetDependencies(const Triple &TT,
 
 void SBFSubtarget::initializeEnvironment(const Triple &TT) {
   assert(TT.getArch() == Triple::sbf && "expected Triple::sbf");
-  HasJmpExt = false;
   UseDwarfRIS = false;
 
   // SBFv2 features
+  HasJmpExt = false;
   HasDynamicFrames = false;
   DisableNeg = false;
   ReverseSubImm = false;
@@ -50,24 +50,11 @@ void SBFSubtarget::initializeEnvironment(const Triple &TT) {
   HasAlu32 = false;
   HasExplicitSignExt = false;
   NewMemEncoding = false;
+  HasStaticSyscalls = false;
 }
 
 void SBFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
   ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
-
-  if (CPU == "v2") {
-    HasJmpExt = true;
-  }
-
-  if (CPU == "v3") {
-    HasJmpExt = true;
-    HasAlu32 = true;
-  }
-
-  if (CPU == "sbfv2") {
-    if (!HasDynamicFrames)
-      report_fatal_error("sbfv2 requires dynamic-frames\n", false);
-  }
 }
 
 SBFSubtarget::SBFSubtarget(const Triple &TT, const std::string &CPU,
diff --git a/llvm/lib/Target/SBF/SBFTargetFeatures.td b/llvm/lib/Target/SBF/SBFTargetFeatures.td
index a11b0aacbbd17c..a1ff0b940a4256 100644
--- a/llvm/lib/Target/SBF/SBFTargetFeatures.td
+++ b/llvm/lib/Target/SBF/SBFTargetFeatures.td
@@ -49,13 +49,18 @@ def FeatureExplicitSext : SubtargetFeature<"explicit-sext", "HasExplicitSignExt"
 def FeatureNewMemEncoding : SubtargetFeature<"mem-encoding", "NewMemEncoding",
                                        "true", "Enable the new encoding for memory instructions">;
 
+def FeatureJumpExt : SubtargetFeature<"jmp-ext", "HasJmpExt",
+                                       "true", "Enable jumps with less than and less than or equal">;
+
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
 def : Proc<"generic", []>;
-def : Proc<"v1", []>;
-def : Proc<"v2", []>;
-def : Proc<"v3", [ALU32]>;
-def : Proc<"sbfv2", [FeatureDynamicFrames, FeatureRelocAbs64, FeatureStaticSyscalls,
-                        FeatureDisableNeg, FeatureReverseSubImm, FeatureDisableLddw, FeatureCallxRegSrc,
-                          FeaturePqrInstr, FeatureExplicitSext]>;
\ No newline at end of file
+
+def : Proc<"v1", [FeatureDynamicFrames, FeatureStoreImm, FeatureJumpExt]>;
+def : Proc<"v2", [FeatureDynamicFrames, FeatureStoreImm, FeatureJumpExt, FeatureDisableLddw,
+                  FeatureNewMemEncoding, FeatureCallxRegSrc, FeaturePqrInstr, FeatureExplicitSext,
+                  FeatureDisableNeg, FeatureReverseSubImm, ALU32]>;
+def : Proc<"v3", [FeatureDynamicFrames, FeatureStoreImm, FeatureJumpExt, FeatureDisableLddw,
+                  FeatureNewMemEncoding, FeatureCallxRegSrc, FeaturePqrInstr, FeatureExplicitSext,
+                  FeatureDisableNeg, FeatureReverseSubImm, ALU32, FeatureStaticSyscalls, FeatureRelocAbs64]>;
\ No newline at end of file
diff --git a/llvm/test/CodeGen/BPF/reloc-abs64-sbf.ll b/llvm/test/CodeGen/BPF/reloc-abs64-sbf.ll
deleted file mode 100644
index 46318a1c36878e..00000000000000
--- a/llvm/test/CodeGen/BPF/reloc-abs64-sbf.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc -march=sbf -filetype=obj < %s | llvm-objdump -r - | tee -i /tmp/foo | FileCheck --check-prefix=CHECK-RELOC-BPF %s
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj < %s | llvm-objdump -r - | tee -i /tmp/foo | FileCheck --check-prefix=CHECK-RELOC-SBFv2 %s
-
-@.str = private unnamed_addr constant [25 x i8] c"reloc_64_relative_data.c\00", align 1
-@FILE = dso_local constant i64 ptrtoint ([25 x i8]* @.str to i64), align 8
-
-; Function Attrs: noinline nounwind optnone
-define dso_local i64 @entrypoint(i8* %input) #0 {
-entry:
-  %input.addr = alloca i8*, align 8
-  store i8* %input, i8** %input.addr, align 8
-  %0 = load volatile i64, i64* @FILE, align 8
-  ret i64 %0
-}
-
-; CHECK-RELOC-BPF:   RELOCATION RECORDS FOR [.data.rel.ro]:
-; CHECK-RELOC-BPF:   0000000000000000 R_BPF_64_64 .L.str
-
-; CHECK-RELOC-SBFv2: RELOCATION RECORDS FOR [.data.rel.ro]:
-; CHECK-RELOC-SBFv2: 0000000000000000 R_SBF_64_ABS64 .L.str
diff --git a/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll b/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll
index 91183a6a09eadb..6713375dbfa4d7 100644
--- a/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll
+++ b/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O2 -march=sbf -mattr=+alu32 < %s | FileCheck %s
-; RUN: llc -O2 -march=sbf -mcpu=v3 < %s | FileCheck %s
+; RUN: llc -O2 -march=sbf -mattr=+alu32 < %s | FileCheck --check-prefixes=CHECK,CHECK-V0 %s
+; RUN: llc -O2 -march=sbf -mcpu=v3 < %s | FileCheck --check-prefixes=CHECK,CHECK-V3 %s
 ;
 ; int mov(int a)
 ; {
@@ -130,7 +130,8 @@
 define dso_local i32 @mov(i32 returned %a) local_unnamed_addr #0 {
 entry:
   ret i32 %a
-; CHECK: mov32 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-V0: mov32 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-V3: mov64 w{{[0-9]+}}, w{{[0-9]+}}
 }
 
 ; Function Attrs: norecurse nounwind readnone
@@ -208,7 +209,8 @@ entry:
 define dso_local i32 @rem(i32 %a, i32 %b) local_unnamed_addr #0 {
 entry:
   %rem = urem i32 %a, %b
-; CHECK: mod32 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-V0: mod32 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-V3: urem32 w{{[0-9]+}}, w{{[0-9]+}}
   ret i32 %rem
 }
 
@@ -216,7 +218,8 @@ entry:
 define dso_local i32 @rem_i(i32 %a) local_unnamed_addr #0 {
 entry:
   %rem = urem i32 %a, 15
-; CHECK: mod32 w{{[0-9]+}}, 15
+; CHECK-V0: mod32 w{{[0-9]+}}, 15
+; CHECK-V3: urem32 w{{[0-9]+}}, 15
   ret i32 %rem
 }
 
@@ -320,6 +323,7 @@ entry:
 define dso_local i32 @neg(i32 %a) local_unnamed_addr #0 {
 entry:
   %sub = sub nsw i32 0, %a
-; CHECK: mov32 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-V0: mov32 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-V3: mov64 w{{[0-9]+}}, w{{[0-9]+}}
   ret i32 %sub
 }
diff --git a/llvm/test/CodeGen/SBF/32-bit-subreg-peephole.ll b/llvm/test/CodeGen/SBF/32-bit-subreg-peephole.ll
index 6ade7e00390d0c..325374059c60a0 100644
--- a/llvm/test/CodeGen/SBF/32-bit-subreg-peephole.ll
+++ b/llvm/test/CodeGen/SBF/32-bit-subreg-peephole.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -march=sbf -mcpu=v2 -mattr=+alu32 < %s | FileCheck %s
+; RUN: llc -O2 -march=sbf -mcpu=v2 < %s | FileCheck %s
 ;
 ; long long select_u(unsigned a, unsigned b, long long c, long long d)
 ; {
@@ -47,7 +47,7 @@ define dso_local i64 @select_u(i32 %a, i32 %b, i64 %c, i64 %d) local_unnamed_add
 entry:
   %cmp = icmp ugt i32 %a, %b
   %c.d = select i1 %cmp, i64 %c, i64 %d
-; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
+; CHECK: mov64 r{{[0-9]+}}, r{{[0-9]+}}
 ; CHECK-NOT: lsh32 r{{[0-9]+}}, 32
 ; CHECK-NOT: rsh32 r{{[0-9]+}}, 32
 ; CHECK: {{jlt|jgt}}  r{{[0-9]+}}, r{{[0-9]+}},
@@ -59,7 +59,7 @@ define dso_local i64 @select_u_2(i32 %a, i64 %b, i64 %c, i64 %d) local_unnamed_a
 ; CHECK-LABEL: select_u_2:
 entry:
   %conv = zext i32 %a to i64
-; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
+; CHECK: mov64 r{{[0-9]+}}, r{{[0-9]+}}
 ; CHECK-NOT: lsh32 r{{[0-9]+}}, 32
 ; CHECK-NOT: rsh32 r{{[0-9]+}}, 32
   %cmp = icmp ugt i64 %conv, %b
@@ -73,8 +73,8 @@ define dso_local i64 @select_s(i32 %a, i32 %b, i64 %c, i64 %d) local_unnamed_add
 entry:
   %cmp = icmp sgt i32 %a, %b
   %c.d = select i1 %cmp, i64 %c, i64 %d
-; CHECK: lsh64 r{{[0-9]+}}, 32
-; CHECK-NEXT: arsh64 r{{[0-9]+}}, 32
+; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
+; CHECK-NEXT: mov32 r{{[0-9]+}}, w{{[0-9]+}}
 ; CHECK: {{jslt|jsgt}} r{{[0-9]+}}, r{{[0-9]+}},
   ret i64 %c.d
 }
@@ -88,11 +88,12 @@ entry:
   %cmp = icmp ult i32 %conv, 10
 ; %call comes from function call returning i64 so the high bits will need
 ; to be cleared.
-; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
+; CHECK: and32 w{{[0-9]+}}, -1
 ; CHECK-NOT: lsh32 r{{[0-9]+}}, 32
 ; CHECK-NOT: rsh32 r{{[0-9]+}}, 32
+; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
   %b.c = select i1 %cmp, i32 %b, i32 %c
-; CHECK: {{jlt|jgt}} r{{[0-9]+}}, {{[0-9]+}},
+; CHECK: {{jlt|jgt}} r{{[0-9]+}}, 10,
   ret i32 %b.c
 }
 
@@ -103,7 +104,7 @@ define dso_local i32* @inc_p(i32* readnone %p, i32 %a) local_unnamed_addr #0 {
 ; CHECK-LABEL: inc_p:
 entry:
   %idx.ext = zext i32 %a to i64
-; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
+; CHECK: mov64 r{{[0-9]+}}, r{{[0-9]+}}
 ; CHECK-NOT: lsh32 r{{[0-9]+}}, 32
 ; CHECK-NOT: rsh32 r{{[0-9]+}}, 32
   %add.ptr = getelementptr inbounds i32, i32* %p, i64 %idx.ext
@@ -117,8 +118,8 @@ entry:
   %cmp = icmp sgt i32 %call, 6
 ; The shifts can't be optimized out because %call comes from function call
 ; return i32 so the high bits might be invalid.
-; CHECK: lsh64 r{{[0-9]+}}, 32
-; CHECK-NEXT: arsh64 r{{[0-9]+}}, 32
+; CHECK: mov64 w{{[0-9]+}}, w{{[0-9]+}}
+; CHECK: mov32 r{{[0-9]+}}, w{{[0-9]+}}
   %cond = zext i1 %cmp to i32
 ; CHECK: {{jslt|jsgt}} r{{[0-9]+}}, {{[0-9]+}},
   ret i32 %cond
diff --git a/llvm/test/CodeGen/SBF/CORE/simplifypatable-nullptr.ll b/llvm/test/CodeGen/SBF/CORE/simplifypatable-nullptr.ll
index 162f98a5902fa7..c92249161de635 100644
--- a/llvm/test/CodeGen/SBF/CORE/simplifypatable-nullptr.ll
+++ b/llvm/test/CodeGen/SBF/CORE/simplifypatable-nullptr.ll
@@ -41,7 +41,7 @@ entry:
   br i1 %tobool.not, label %if.end, label %cleanup, !dbg !42
 
 ; CHECK-LABEL: test
-; CHECK:       ldxdw r1, [r1 + 8]
+; CHECK:       ldxdw r1, [r1 + 0]
 ; CHECK:       jne r1, 0,
 
 if.end:                                           ; preds = %entry
@@ -53,7 +53,8 @@ if.end:                                           ; preds = %entry
   %tobool1.not = icmp eq ptr %7, null, !dbg !46
   br i1 %tobool1.not, label %if.then2, label %cleanup, !dbg !48
 
-; CHECK:       mov64 r1, 8
+; CHECK:       mov32 r1,
+; CHECK:       hor64 r1,
 ; CHECK:       ldxdw r1, [r1 + 0]
 ; CHECK:       jne r1, 0,
 
diff --git a/llvm/test/CodeGen/SBF/call_internal.ll b/llvm/test/CodeGen/SBF/call_internal.ll
index 8b181c5c07e776..d4e1dc7844fd40 100644
--- a/llvm/test/CodeGen/SBF/call_internal.ll
+++ b/llvm/test/CodeGen/SBF/call_internal.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -march=sbf --show-mc-encoding | FileCheck --check-prefixes=CHECK-ASM,CHECK-ASM-V0 %s
 ; RUN: llc -march=sbf --filetype=obj -o - %s | llvm-objdump -d - | FileCheck --check-prefixes=CHECK-OBJ,CHECK-OBJ-V0 %s
-; RUN: llc < %s -march=sbf -mcpu=sbfv2 --show-mc-encoding | FileCheck --check-prefixes=CHECK-ASM,CHECK-ASM-V3 %s
-; RUN: llc -march=sbf -mcpu=sbfv2 --filetype=obj -o - %s | llvm-objdump -d -
+; RUN: llc < %s -march=sbf -mcpu=v3 --show-mc-encoding | FileCheck --check-prefixes=CHECK-ASM,CHECK-ASM-V3 %s
+; RUN: llc -march=sbf -mcpu=v3 --filetype=obj -o - %s | llvm-objdump -d -
 ;                                       | FileCheck --check-prefixes=CHECK-OBJ,CHECK-OBJ-V3 %s
 
 @.str = private unnamed_addr constant [5 x i8] c"foo\0A\00", align 1
diff --git a/llvm/test/CodeGen/SBF/callx.ll b/llvm/test/CodeGen/SBF/callx.ll
index bebcf4a11d4cb3..5923cdc1558434 100644
--- a/llvm/test/CodeGen/SBF/callx.ll
+++ b/llvm/test/CodeGen/SBF/callx.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -march=sbf --show-mc-encoding \
-; RUN:      | FileCheck %s -check-prefixes=CHECK-v1
-; RUN: llc < %s -march=sbf --mcpu=sbfv2 --show-mc-encoding \
+; RUN:      | FileCheck %s -check-prefixes=CHECK-v0
+; RUN: llc < %s -march=sbf --mcpu=v2 --show-mc-encoding \
 ; RUN:      | FileCheck %s -check-prefixes=CHECK-v2
 ; source:
 ;   int test(int (*f)(void)) { return f(); }
@@ -9,7 +9,7 @@
 define dso_local i32 @test(i32 ()* nocapture %f) local_unnamed_addr #0 {
 entry:
   %call = tail call i32 %f() #1
-; CHECK-v1: callx r{{[0-9]+}} # encoding: [0x8d,0x00,0x00,0x00,0x0{{[0-9]|a|b}},0x00,0x00,0x00]
+; CHECK-v0: callx r{{[0-9]+}} # encoding: [0x8d,0x00,0x00,0x00,0x0{{[0-9]|a|b}},0x00,0x00,0x00]
 ; CHECK-v2: callx r{{[0-9]+}} # encoding: [0x8d,0x{{[0-9]}}0,0x00,0x00,0x00,0x00,0x00,0x00]
   ret i32 %call
 }
diff --git a/llvm/test/CodeGen/SBF/cc_args.ll b/llvm/test/CodeGen/SBF/cc_args.ll
index 13cee14aa0373f..8803133f574064 100644
--- a/llvm/test/CodeGen/SBF/cc_args.ll
+++ b/llvm/test/CodeGen/SBF/cc_args.ll
@@ -1,18 +1,18 @@
-; RUN: llc < %s -march=sbf -show-mc-encoding | FileCheck --check-prefix=CHECK-v1 %s
-; RUN: llc < %s -march=sbf -mcpu=sbfv2 -show-mc-encoding | FileCheck --check-prefix=CHECK-v2 %s
+; RUN: llc < %s -march=sbf -show-mc-encoding | FileCheck --check-prefix=CHECK-v0 %s
+; RUN: llc < %s -march=sbf -mcpu=v2 -show-mc-encoding | FileCheck --check-prefix=CHECK-v2 %s
 
 define void @test() #0 {
 entry:
 ; CHECK-LABEL: test:
 
-; CHECK-v1: mov64 r1, 123 # encoding: [0xb7,0x01,0x00,0x00,0x7b,0x00,0x00,0x00]
-; CHECK-v2: mov64 r1, 123
-; CHECK-v1: call f_i16
+; CHECK-v0: mov64 r1, 123 # encoding: [0xb7,0x01,0x00,0x00,0x7b,0x00,0x00,0x00]
+; CHECK-v2: mov32 w1, 123
+; CHECK-v0: call f_i16
   call void @f_i16(i16 123)
 
-; CHECK-v1: mov64 r1, 12345678 # encoding: [0xb7,0x01,0x00,0x00,0x4e,0x61,0xbc,0x00]
-; CHECK-v2: mov64 r1, 12345678
-; CHECK-v1: call f_i32
+; CHECK-v0: mov64 r1, 12345678 # encoding: [0xb7,0x01,0x00,0x00,0x4e,0x61,0xbc,0x00]
+; CHECK-v2: mov32 w1, 12345678
+; CHECK-v0: call f_i32
   call void @f_i32(i32 12345678)
 
 ; 72623859790382856 = 0x0102030405060708
@@ -22,19 +22,19 @@ entry:
 ; CHECK-v2: mov32 r1, 84281096  # encoding: [0xb4,0x01,0x00,0x00,0x08,0x07,0x06,0x05]
 ; CHECK-v2: hor64 r1, 16909060  # encoding: [0xf7,0x01,0x00,0x00,0x04,0x03,0x02,0x01]
 
-; CHECK-v1: lddw r1, 72623859790382856 # encoding: [0x18,0x01,0x00,0x00,0x08,0x07,0x06,0x05,0x00,0x00,0x00,0x00,0x04,0x03,0x02,0x01]
-; CHECK-v1: call f_i64
+; CHECK-v0: lddw r1, 72623859790382856 # encoding: [0x18,0x01,0x00,0x00,0x08,0x07,0x06,0x05,0x00,0x00,0x00,0x00,0x04,0x03,0x02,0x01]
+; CHECK-v0: call f_i64
   call void @f_i64(i64 72623859790382856)
 
-; CHECK-v1: mov64 r1, 1234
-; CHECK-v1: mov64 r2, 5678
-; CHECK-v1: call f_i32_i32
+; CHECK-v0: mov64 r1, 1234
+; CHECK-v0: mov64 r2, 5678
+; CHECK-v0: call f_i32_i32
   call void @f_i32_i32(i32 1234, i32 5678)
 
-; CHECK-v1: mov64 r1, 2
-; CHECK-v1: mov64 r2, 3
-; CHECK-v1: mov64 r3, 4
-; CHECK-v1: call f_i16_i32_i16
+; CHECK-v0: mov64 r1, 2
+; CHECK-v0: mov64 r2, 3
+; CHECK-v0: mov64 r3, 4
+; CHECK-v0: call f_i16_i32_i16
   call void @f_i16_i32_i16(i16 2, i32 3, i16 4)
 
 ; 7262385979038285 = 0x0019CD1A00809A4D
@@ -43,10 +43,10 @@ entry:
 ; CHECK-v2: mov32 r2, 8428109
 ; CHECK-v2: hor64 r2, 1690906
 
-; CHECK-v1: mov64 r1, 5
-; CHECK-v1: lddw r2, 7262385979038285
-; CHECK-v1: mov64 r3, 6
-; CHECK-v1: call f_i16_i64_i16
+; CHECK-v0: mov64 r1, 5
+; CHECK-v0: lddw r2, 7262385979038285
+; CHECK-v0: mov64 r3, 6
+; CHECK-v0: call f_i16_i64_i16
   call void @f_i16_i64_i16(i16 5, i64 7262385979038285, i16 6)
 
   ret void
@@ -57,53 +57,53 @@ entry:
 @g_i64 = common global i64 0, align 4
 
 define void @f_i16(i16 %a) #0 {
-; CHECK-v1: f_i16:
-; CHECK-v1: stxh [r2 + 0], r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
+; CHECK-v0: f_i16:
+; CHECK-v0: stxh [r2 + 0], r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
   store volatile i16 %a, i16* @g_i16, align 2
   ret void
 }
 
 define void @f_i32(i32 %a) #0 {
-; CHECK-v1: f_i32:
-; CHECK-v1: stxw [r2 + 0], r1 # encoding: [0x63,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
+; CHECK-v0: f_i32:
+; CHECK-v0: stxw [r2 + 0], r1 # encoding: [0x63,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
   store volatile i32 %a, i32* @g_i32, align 2
   ret void
 }
 
 define void @f_i64(i64 %a) #0 {
-; CHECK-v1: f_i64:
-; CHECK-v1: stxdw [r2 + 0], r1  # encoding: [0x7b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
+; CHECK-v0: f_i64:
+; CHECK-v0: stxdw [r2 + 0], r1  # encoding: [0x7b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
   store volatile i64 %a, i64* @g_i64, align 2
   ret void
 }
 
 define void @f_i32_i32(i32 %a, i32 %b) #0 {
-; CHECK-v1: f_i32_i32:
-; CHECK-v1: stxw [r3 + 0], r1
+; CHECK-v0: f_i32_i32:
+; CHECK-v0: stxw [r3 + 0], r1
   store volatile i32 %a, i32* @g_i32, align 4
-; CHECK-v1: stxw [r3 + 0], r2
+; CHECK-v0: stxw [r3 + 0], r2
   store volatile i32 %b, i32* @g_i32, align 4
   ret void
 }
 
 define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {
-; CHECK-v1: f_i16_i32_i16:
-; CHECK-v1: stxh [r4 + 0], r1
+; CHECK-v0: f_i16_i32_i16:
+; CHECK-v0: stxh [r4 + 0], r1
   store volatile i16 %a, i16* @g_i16, align 2
-; CHECK-v1: stxw [r1 + 0], r2
+; CHECK-v0: stxw [r1 + 0], r2
   store volatile i32 %b, i32* @g_i32, align 4
-; CHECK-v1: stxh [r4 + 0], r3
+; CHECK-v0: stxh [r4 + 0], r3
   store volatile i16 %c, i16* @g_i16, align 2
   ret void
 }
 
 define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {
-; CHECK-v1: f_i16_i64_i16:
-; CHECK-v1: stxh [r4 + 0], r1
+; CHECK-v0: f_i16_i64_i16:
+; CHECK-v0: stxh [r4 + 0], r1
   store volatile i16 %a, i16* @g_i16, align 2
-; CHECK-v1: stxdw [r1 + 0], r2 # encoding: [0x7b,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
+; CHECK-v0: stxdw [r1 + 0], r2 # encoding: [0x7b,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
   store volatile i64 %b, i64* @g_i64, align 8
-; CHECK-v1: stxh [r4 + 0], r3
+; CHECK-v0: stxh [r4 + 0], r3
   store volatile i16 %c, i16* @g_i16, align 2
   ret void
 }
diff --git a/llvm/test/CodeGen/SBF/many_args_new_conv.ll b/llvm/test/CodeGen/SBF/many_args_new_conv.ll
index 0fe748a6266f06..6cd295e00bfd41 100644
--- a/llvm/test/CodeGen/SBF/many_args_new_conv.ll
+++ b/llvm/test/CodeGen/SBF/many_args_new_conv.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O2 -march=sbf -mcpu=sbfv2 < %s | FileCheck %s
-; RUN: llc -O2 -march=sbf -mcpu=sbfv2 -mattr=+mem-encoding < %s | FileCheck %s
+; RUN: llc -O2 -march=sbf -mcpu=v1 < %s | FileCheck %s
+; RUN: llc -O2 -march=sbf -mcpu=v1 -mattr=+mem-encoding < %s | FileCheck %s
 
 ; Function Attrs: nounwind uwtable
 define i32 @caller_no_alloca(i32 %a, i32 %b, i32 %c) #0 {
@@ -10,16 +10,11 @@ entry:
 ; CHECK-NOT: add64 r10
 
 ; Saving arguments on the stack
-; CHECK: mov64 r4, 55
-; CHECK: stxdw [r10 - 32], r4
-; CHECK: mov64 r4, 60
-; CHECK: stxdw [r10 - 40], r4
-; CHECK: mov64 r4, 50
-; CHECK: stxdw [r10 - 24], r4
-; CHECK: mov64 r4, 4
-; CHECK: stxdw [r10 - 16], r4
-; CHECK: mov64 r4, 3
-; CHECK: stxdw [r10 - 8], r4
+; CHECK: stdw [r10 - 32], 55
+; CHECK: stdw [r10 - 40], 60
+; CHECK: stdw [r10 - 24], 50
+; CHECK: stdw [r10 - 16], 4
+; CHECK: stdw [r10 - 8], 3
 ; CHECK: mov64 r4, 1
 ; CHECK: mov64 r5, 2
 ; CHECK: call callee_alloca
@@ -35,22 +30,17 @@ define i32 @caller_alloca(i32 %a, i32 %b, i32 %c) #0 {
 ; CHECK: ldxw r1, [r10 + 60]
 
 ; Saving arguments in the callee's frame
-; CHECK: mov64 r4, 55
 
 ; Offset in the callee: frame_size - 32
-; CHECK: stxdw [r10 - 32], r4
-; CHECK: mov64 r4, 60
+; CHECK: stdw [r10 - 32], 55
 ; Offset in the callee: frame_size - 40
-; CHECK: stxdw [r10 - 40], r4
-; CHECK: mov64 r4, 50
+; CHECK: stdw [r10 - 40], 60
 ; Offset in the callee: frame_size - 24
-; CHECK: stxdw [r10 - 24], r4
-; CHECK: mov64 r4, 4
+; CHECK: stdw [r10 - 24], 50
 ; Offset in the callee: frame_size - 16
-; CHECK: stxdw [r10 - 16], r4
-; CHECK: mov64 r4, 3
+; CHECK: stdw [r10 - 16], 4
 ; Offset in the callee: frame_size - 8
-; CHECK: stxdw [r10 - 8], r4
+; CHECK: stdw [r10 - 8], 3
 ; CHECK: mov64 r4, 1
 ; CHECK: mov64 r5, 2
 ; CHECK: call callee_no_alloca
diff --git a/llvm/test/CodeGen/SBF/objdump_cond_op.ll b/llvm/test/CodeGen/SBF/objdump_cond_op.ll
index ecabfee937e28f..627f60f00876d6 100644
--- a/llvm/test/CodeGen/SBF/objdump_cond_op.ll
+++ b/llvm/test/CodeGen/SBF/objdump_cond_op.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
+; RUN: llc -march=sbf -mcpu=v2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
 
 ; Source Code:
 ; int gbl;
@@ -25,48 +25,45 @@ define i32 @test(i32, i32) local_unnamed_addr #0 {
   %6 = shl i32 %5, 1
   %7 = mul i32 %6, %5
   br label %13
-; CHECK: lsh64 r1, 0x20
-; CHECK: rsh64 r1, 0x20
-; CHECK: jne r1, 0x2, +0x6 <LBB0_2>
+; CHECK: mov32 w3, w1
+; CHECK: jne r3, 0x2, +0x6 <LBB0_2>
 
 ; <label>:8:                                      ; preds = %2
   %9 = icmp eq i32 %0, %1
   %10 = load i32, i32* @gbl, align 4
   br i1 %9, label %15, label %11
 
-; CHECK: mov32 r1, 0x0
+; CHECK: mov32 w1, 0x0
 ; CHECK: hor64 r1, 0x0
-; CHECK: ldxw r0, [r1 + 0x0]
-; CHECK: mul64 r0, r0
-; CHECK: lsh64 r0, 0x1
-; CHECK: ja +0x7 <LBB0_4>
+; CHECK: ldxw w0, [r1 + 0x0]
+; CHECK: lmul32 w0, w0
+; CHECK: lsh32 w0, 0x1
+; CHECK: ja +0x5 <LBB0_4>
 
 ; <label>:11:                                     ; preds = %8
   %12 = shl nsw i32 %10, 2
   br label %13
 
 ; CHECK-LABEL: <LBB0_2>:
-; CHECK: mov32 r3, 0x0
+; CHECK: mov32 w3, 0x0
 ; CHECK: hor64 r3, 0x0
-; CHECK: ldxw r0, [r3 + 0x0]
-; CHECK: lsh64 r2, 0x20
-; CHECK: rsh64 r2, 0x20
+; CHECK: ldxw w0, [r3 + 0x0]
 ; CHECK: jeq r1, r2, +0x4 <LBB0_5>
-; CHECK: lsh64 r0, 0x2
+; CHECK: lsh32 w0, 0x2
 
 ; <label>:13:                                     ; preds = %4, %11
   %14 = phi i32 [ %12, %11 ], [ %7, %4 ]
   store i32 %14, i32* @gbl, align 4
   br label %15
 ; CHECK-LABEL: <LBB0_4>:
-; CHECK: mov32 r1, 0x0
+; CHECK: mov32 w1, 0x0
 ; CHECK: hor64 r1, 0x0
-; CHECK: stxw [r1 + 0x0], r0
+; CHECK: stxw [r1 + 0x0], w0
 
 ; <label>:15:                                     ; preds = %8, %13
   %16 = phi i32 [ %14, %13 ], [ %10, %8 ]
   ret i32 %16
 ; CHECK-LABEL: <LBB0_5>:
-; CHECK: return
+; CHECK: exit
 }
 attributes #0 = { norecurse nounwind }
diff --git a/llvm/test/CodeGen/SBF/objdump_cond_op_2.ll b/llvm/test/CodeGen/SBF/objdump_cond_op_2.ll
index 085d617baa7922..4f01d8b2d452a8 100644
--- a/llvm/test/CodeGen/SBF/objdump_cond_op_2.ll
+++ b/llvm/test/CodeGen/SBF/objdump_cond_op_2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
+; RUN: llc -march=sbf -mcpu=v1 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
 
 ; Source Code:
 ; int test(int a, int b) {
@@ -27,12 +27,12 @@ define i32 @test(i32, i32) local_unnamed_addr #0 {
   %12 = icmp slt i32 %10, %11
   br i1 %12, label %5, label %13
 ; CHECK: mov64 r1, r3
-; CHECK: jsgt r2, r3, -0xa <LBB0_1>
+; CHECK: jslt r3, r2, -0xa <LBB0_1>
 
 ; <label>:13:                                     ; preds = %5, %2
   %14 = phi i32 [ 0, %2 ], [ %9, %5 ]
   ret i32 %14
 ; CHECK-LABEL: <LBB0_2>:
-; CHECK: return
+; CHECK: exit
 }
 attributes #0 = { norecurse nounwind readnone }
diff --git a/llvm/test/CodeGen/SBF/objdump_imm_hex.ll b/llvm/test/CodeGen/SBF/objdump_imm_hex.ll
index a840258825c799..00f4b7c4943456 100644
--- a/llvm/test/CodeGen/SBF/objdump_imm_hex.ll
+++ b/llvm/test/CodeGen/SBF/objdump_imm_hex.ll
@@ -1,6 +1,6 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck --check-prefix=CHECK-DEC %s
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d --print-imm-hex - | FileCheck --check-prefix=CHECK-HEX %s
-; RUN: llc < %s -march=sbf -mcpu=sbfv2 -show-mc-encoding | FileCheck --check-prefix=CHECK-REL %s
+; RUN: llc -march=sbf -mcpu=v2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck --check-prefix=CHECK-DEC %s
+; RUN: llc -march=sbf -mcpu=v2 -filetype=obj -o - %s | llvm-objdump -d --print-imm-hex - | FileCheck --check-prefix=CHECK-HEX %s
+; RUN: llc < %s -march=sbf -mcpu=v2 -show-mc-encoding | FileCheck --check-prefix=CHECK-REL %s
 
 ; Source Code:
 ; int gbl;
@@ -26,38 +26,38 @@ define i32 @test(i64, i64) local_unnamed_addr #0 {
 ; CHECK-LABEL: test
   %3 = icmp eq i64 %0, -6067004223159161907
   br i1 %3, label %4, label %8
-; CHECK-DEC: b4 03 00 00 cd ab cd ab	mov32 r3, -0x54325433
+; CHECK-DEC: b4 03 00 00 cd ab cd ab	mov32 w3, -0x54325433
 ; CHECK-DEC: f7 03 00 00 cd ab cd ab	hor64 r3, -0x54325433
 ; CHECK-DEC: 5d 31 07 00 00 00 00 00         jne r1, r3, +0x7
-; CHECK-HEX: b4 03 00 00 cd ab cd ab	mov32 r3, -0x54325433
+; CHECK-HEX: b4 03 00 00 cd ab cd ab	mov32 w3, -0x54325433
 ; CHECK-HEX: f7 03 00 00 cd ab cd ab	hor64 r3, -0x54325433
 ; CHECK-HEX: 5d 31 07 00 00 00 00 00         jne r1, r3, +0x7
 
 ; <label>:4:                                      ; preds = %2
-; CHECK-DEC: b4 01 00 00 00 00 00 00	mov32 r1, 0x0
+; CHECK-DEC: b4 01 00 00 00 00 00 00	mov32 w1, 0x0
 ; CHECK-DEC: f7 01 00 00 00 00 00 00	hor64 r1, 0x0
-; CHECK-HEX: b4 01 00 00 00 00 00 00	mov32 r1, 0x0
+; CHECK-HEX: b4 01 00 00 00 00 00 00	mov32 w1, 0x0
 ; CHECK-HEX: f7 01 00 00 00 00 00 00	hor64 r1, 0x0
 ; CHECK-REL:   fixup A - offset: 0, value: gbl, kind: FK_SecRel_8
   %5 = load i32, i32* @gbl, align 4
   %6 = shl i32 %5, 1
-; CHECK-DEC: 67 01 00 00 01 00 00 00         lsh64 r1, 0x1
-; CHECK-HEX: 67 01 00 00 01 00 00 00         lsh64 r1, 0x1
+; CHECK-DEC: 64 01 00 00 01 00 00 00         lsh32 w1, 0x1
+; CHECK-HEX: 64 01 00 00 01 00 00 00         lsh32 w1, 0x1
   %7 = mul i32 %6, %5
   br label %13
 
 ; <label>:8:                                      ; preds = %2
   %9 = icmp eq i64 %1, 188899839028173
-; CHECK-DEC: b4 01 00 00 cd ab cd ab	mov32 r1, -0x54325433
+; CHECK-DEC: b4 01 00 00 cd ab cd ab	mov32 w1, -0x54325433
 ; CHECK-DEC: f7 01 00 00 cd ab 00 00	hor64 r1, 0xabcd
-; CHECK-HEX: b4 01 00 00 cd ab cd ab	mov32 r1, -0x54325433
+; CHECK-HEX: b4 01 00 00 cd ab cd ab	mov32 w1, -0x54325433
 ; CHECK-HEX: f7 01 00 00 cd ab 00 00	hor64 r1, 0xabcd
   br i1 %9, label %10, label %16
 
 ; <label>:10:                                     ; preds = %8
-; CHECK-DEC: b4 01 00 00 00 00 00 00	mov32 r1, 0x0
+; CHECK-DEC: b4 01 00 00 00 00 00 00	mov32 w1, 0x0
 ; CHECK-DEC: f7 01 00 00 00 00 00 00	hor64 r1, 0x0
-; CHECK-HEX: b4 01 00 00 00 00 00 00	mov32 r1, 0x0
+; CHECK-HEX: b4 01 00 00 00 00 00 00	mov32 w1, 0x0
 ; CHECK-HEX: f7 01 00 00 00 00 00 00	hor64 r1, 0x0
 ; CHECK-REL: fixup A - offset: 0, value: gbl, kind: FK_SecRel_8
   %11 = load i32, i32* @gbl, align 4
@@ -68,8 +68,8 @@ define i32 @test(i64, i64) local_unnamed_addr #0 {
   %14 = phi i32 [ %12, %10 ], [ %7, %4 ]
   %15 = phi i32 [ 2, %10 ], [ 1, %4 ]
   store i32 %14, i32* @gbl, align 4
-; CHECK-DEC: 63 12 00 00 00 00 00 00         stxw [r2 + 0x0], r1
-; CHECK-HEX: 63 12 00 00 00 00 00 00         stxw [r2 + 0x0], r1
+; CHECK-DEC: 8f 12 00 00 00 00 00 00         stxw [r2 + 0x0], w1
+; CHECK-HEX: 8f 12 00 00 00 00 00 00         stxw [r2 + 0x0], w1
   br label %16
 
 ; <label>:16:                                     ; preds = %13, %8
diff --git a/llvm/test/CodeGen/SBF/objdump_static_var.ll b/llvm/test/CodeGen/SBF/objdump_static_var.ll
index f65e775e3afc7d..ec5c87e4e2a8ee 100644
--- a/llvm/test/CodeGen/SBF/objdump_static_var.ll
+++ b/llvm/test/CodeGen/SBF/objdump_static_var.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -dr - | FileCheck --check-prefix=CHECK %s
+; RUN: llc -march=sbf -mcpu=v2 -filetype=obj -o - %s | llvm-objdump -dr - | FileCheck --check-prefix=CHECK %s
 
 ; src:
 ;   static volatile long a = 2;
@@ -10,20 +10,20 @@
 ; Function Attrs: norecurse nounwind
 define dso_local i32 @test() local_unnamed_addr #0 {
   %1 = load volatile i64, i64* @a, align 8, !tbaa !2
-; CHECK: mov32 r1, 0x0
+; CHECK: mov32 w1, 0x0
 ; CHECK: R_SBF_64_64	a
 ; CHECK: hor64 r1, 0x0
 ; CHECK: ldxdw r1, [r1 + 0x0]
   %2 = load volatile i32, i32* @b, align 4, !tbaa !6
-; CHECK: mov32 r2, 0x0
+; CHECK: mov32 w2, 0x0
 ; CHECK: R_SBF_64_64	b
 ; CHECK: hor64 r2, 0x0
-; CHECK: ldxw r0, [r2 + 0x0]
+; CHECK: ldxw w0, [r2 + 0x0]
   %3 = trunc i64 %1 to i32
   %4 = add i32 %2, %3
-; CHECK: add64 r0, r1
+; CHECK: add32 w0, w1
   ret i32 %4
-; CHECK: return
+; CHECK: exit
 }
 
 attributes #0 = { norecurse nounwind }
diff --git a/llvm/test/CodeGen/SBF/objdump_trivial.ll b/llvm/test/CodeGen/SBF/objdump_trivial.ll
index 4cc21401983383..388c3be7a373b3 100644
--- a/llvm/test/CodeGen/SBF/objdump_trivial.ll
+++ b/llvm/test/CodeGen/SBF/objdump_trivial.ll
@@ -1,6 +1,6 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
+; RUN: llc -march=sbf -mcpu=v3 -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
 
-; CHECK: jsgt r2, r1,
+; CHECK: jslt r1, 0x0,
 ; CHECK: call 0x1
 ; CHECK: return
 ; CHECK: call 0x2
diff --git a/llvm/test/CodeGen/SBF/pqr-class.ll b/llvm/test/CodeGen/SBF/pqr-class.ll
index 5e43b15b84c2ac..279ec819d0834b 100644
--- a/llvm/test/CodeGen/SBF/pqr-class.ll
+++ b/llvm/test/CodeGen/SBF/pqr-class.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -mattr=+alu32 < %s | FileCheck --check-prefix=CHECK-v2 %s
+; RUN: llc -march=sbf -mcpu=v2 -mattr=+alu32 < %s | FileCheck --check-prefix=CHECK-v2 %s
 ; RUN: llc -march=sbf -mattr=+alu32 < %s | FileCheck --check-prefix=CHECK-v1 %s
 
 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
diff --git a/llvm/test/CodeGen/SBF/reloc-3.ll b/llvm/test/CodeGen/SBF/reloc-3.ll
index c9cecf6e1564e2..8c7dc7fb86d739 100644
--- a/llvm/test/CodeGen/SBF/reloc-3.ll
+++ b/llvm/test/CodeGen/SBF/reloc-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj -o %t.el < %s
+; RUN: llc -march=sbf -mcpu=v3 -filetype=obj -o %t.el < %s
 ; RUN: llvm-readelf -r %t.el | FileCheck %s
 
 ; source code:
diff --git a/llvm/test/CodeGen/SBF/reloc-abs64-sbf.ll b/llvm/test/CodeGen/SBF/reloc-abs64-sbf.ll
index 46318a1c36878e..a55b1307a8fd80 100644
--- a/llvm/test/CodeGen/SBF/reloc-abs64-sbf.ll
+++ b/llvm/test/CodeGen/SBF/reloc-abs64-sbf.ll
@@ -1,5 +1,5 @@
 ; RUN: llc -march=sbf -filetype=obj < %s | llvm-objdump -r - | tee -i /tmp/foo | FileCheck --check-prefix=CHECK-RELOC-BPF %s
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj < %s | llvm-objdump -r - | tee -i /tmp/foo | FileCheck --check-prefix=CHECK-RELOC-SBFv2 %s
+; RUN: llc -march=sbf -mcpu=v3 -filetype=obj < %s | llvm-objdump -r - | tee -i /tmp/foo | FileCheck --check-prefix=CHECK-RELOC-SBFv3 %s
 
 @.str = private unnamed_addr constant [25 x i8] c"reloc_64_relative_data.c\00", align 1
 @FILE = dso_local constant i64 ptrtoint ([25 x i8]* @.str to i64), align 8
@@ -14,7 +14,7 @@ entry:
 }
 
 ; CHECK-RELOC-BPF:   RELOCATION RECORDS FOR [.data.rel.ro]:
-; CHECK-RELOC-BPF:   0000000000000000 R_BPF_64_64 .L.str
+; CHECK-RELOC-BPF:   0000000000000000 R_SBF_64_64 .L.str
 
-; CHECK-RELOC-SBFv2: RELOCATION RECORDS FOR [.data.rel.ro]:
-; CHECK-RELOC-SBFv2: 0000000000000000 R_SBF_64_ABS64 .L.str
+; CHECK-RELOC-SBFv3: RELOCATION RECORDS FOR [.data.rel.ro]:
+; CHECK-RELOC-SBFv3: 0000000000000000 R_SBF_64_ABS64 .L.str
diff --git a/llvm/test/CodeGen/SBF/reloc-btf.ll b/llvm/test/CodeGen/SBF/reloc-btf.ll
index 61cdd1460005d0..579fba7cc99acb 100644
--- a/llvm/test/CodeGen/SBF/reloc-btf.ll
+++ b/llvm/test/CodeGen/SBF/reloc-btf.ll
@@ -1,4 +1,4 @@
-; RUN: llc -sbf-enable-btf-emission -march=sbf -mcpu=sbfv2 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
+; RUN: llc -sbf-enable-btf-emission -march=sbf -mcpu=v3 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
 
 ; Function Attrs: norecurse nounwind readnone
 define dso_local i32 @test() local_unnamed_addr #0 !dbg !7 {
diff --git a/llvm/test/CodeGen/SBF/reloc.ll b/llvm/test/CodeGen/SBF/reloc.ll
index 524a3da9db8366..9c0b789151321c 100644
--- a/llvm/test/CodeGen/SBF/reloc.ll
+++ b/llvm/test/CodeGen/SBF/reloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=sbfv2 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
+; RUN: llc -march=sbf -mcpu=v3 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
 
 %struct.bpf_context = type { i64, i64, i64, i64, i64, i64, i64 }
 %struct.sk_buff = type { i64, i64, i64, i64, i64, i64, i64 }
diff --git a/llvm/test/CodeGen/SBF/sdiv.ll b/llvm/test/CodeGen/SBF/sdiv.ll
index e00f751f8fc661..0be998ca25dc01 100644
--- a/llvm/test/CodeGen/SBF/sdiv.ll
+++ b/llvm/test/CodeGen/SBF/sdiv.ll
@@ -1,10 +1,10 @@
 ; RUN: llc -march=sbf < %s | FileCheck %s -check-prefixes=CHECK-SBF
-; RUN: llc -march=sbf -mcpu=sbfv2 < %s | FileCheck %s -check-prefixes=CHECK-SBFV2
+; RUN: llc -march=sbf -mcpu=v2 < %s | FileCheck %s -check-prefixes=CHECK-SBFV2
 
 ; Function Attrs: norecurse nounwind readnone
 define i32 @test(i32 %len) #0 {
   %1 = sdiv i32 %len, 15
 ; CHECK-SBF: call __divdi3
-; CHECK-SBFV2: sdiv64 r0, 15
+; CHECK-SBFV2: sdiv32 w0, 15
   ret i32 %1
 }
diff --git a/llvm/test/CodeGen/SBF/select_ri.ll b/llvm/test/CodeGen/SBF/select_ri.ll
index b21274085ce979..b9d710e268d46e 100644
--- a/llvm/test/CodeGen/SBF/select_ri.ll
+++ b/llvm/test/CodeGen/SBF/select_ri.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sbf -mcpu=v2 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=sbf -mcpu=v1 -verify-machineinstrs | FileCheck %s
 ;
 ; Source file:
 ; int b, c;
diff --git a/llvm/test/CodeGen/SBF/spill-alu32.ll b/llvm/test/CodeGen/SBF/spill-alu32.ll
index d8c6ebf83cb31e..ed96651a8b491b 100644
--- a/llvm/test/CodeGen/SBF/spill-alu32.ll
+++ b/llvm/test/CodeGen/SBF/spill-alu32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sbf -mcpu=v3 < %s | FileCheck %s
+; RUN: llc -march=sbf -mcpu=v2 < %s | FileCheck %s
 ;
 ; Source code:
 ;   void foo(int, int, int, long, int);
@@ -17,11 +17,11 @@ entry:
   tail call void @foo(i32 %a, i32 %b, i32 %c, i64 %d, i32 %e) #2
   tail call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{memory}"() #2
 
-; CHECK:        stxw [r10 - 8], w5
-; CHECK:        stxdw [r10 - 16], r4
-; CHECK:        stxw [r10 - 24], w3
-; CHECK:        stxw [r10 - 32], w2
-; CHECK:        stxw [r10 - 40], w1
+; CHECK:        stxw [r10 + 56], w5
+; CHECK:        stxdw [r10 + 48], r4
+; CHECK:        stxw [r10 + 40], w3
+; CHECK:        stxw [r10 + 32], w2
+; CHECK:        stxw [r10 + 24], w1
 ; CHECK:        call foo
 
   tail call void @foo(i32 %a, i32 %b, i32 %c, i64 %d, i32 %e) #2
diff --git a/llvm/test/CodeGen/SBF/sub_reversed_immediate.ll b/llvm/test/CodeGen/SBF/sub_reversed_immediate.ll
index 8040eb767b728e..9aff3ce8b3d8b1 100644
--- a/llvm/test/CodeGen/SBF/sub_reversed_immediate.ll
+++ b/llvm/test/CodeGen/SBF/sub_reversed_immediate.ll
@@ -1,5 +1,5 @@
 ; RUN: llc < %s -march=sbf -mattr=+alu32 | FileCheck  --check-prefix=CHECK-v1 %s
-; RUN: llc < %s -march=sbf -mattr=+alu32 -mcpu=sbfv2 | FileCheck  --check-prefix=CHECK-v2 %s
+; RUN: llc < %s -march=sbf -mcpu=v2 | FileCheck  --check-prefix=CHECK-v2 %s
 
 
 ; Function Attrs: norecurse nounwind readnone
diff --git a/llvm/test/MC/SBF/elf-flags.s b/llvm/test/MC/SBF/elf-flags.s
index 75089706a18e5c..a0a975959ccbd0 100644
--- a/llvm/test/MC/SBF/elf-flags.s
+++ b/llvm/test/MC/SBF/elf-flags.s
@@ -1,15 +1,31 @@
 # RUN: llvm-mc -triple=sbf-solana-solana -filetype=obj < %s \
 # RUN:   | llvm-readobj --file-headers - \
 # RUN:   | FileCheck -check-prefix=CHECK-NONE %s
-# RUN: llvm-mc -triple=sbf-solana-solana -mcpu=sbfv2 -filetype=obj < %s \
+# RUN: llvm-mc -triple=sbf-solana-solana -mcpu=v1 -filetype=obj < %s \
 # RUN:   | llvm-readobj --file-headers - \
-# RUN:   | FileCheck -check-prefix=CHECK-SBFV2 %s
+# RUN:   | FileCheck -check-prefix=CHECK-SBFV1 %s
+# RUN: llvm-mc -triple=sbf-solana-solana -mcpu=v1 -filetype=obj < %s \
+# RUN:   | llvm-readobj --file-headers - \
+# RUN:   | FileCheck -check-prefix=CHECK-SBFV1 %s
+# RUN: llvm-mc -triple=sbf-solana-solana -mcpu=v3 -filetype=obj < %s \
+# RUN:   | llvm-readobj --file-headers - \
+# RUN:   | FileCheck -check-prefix=CHECK-SBFV3 %s
+
 
 # CHECK-NONE:       Flags [ (0x0)
 # CHECK-NONE-NEXT:  ]
 
-# CHECK-SBFV2:       Flags [ (0x20)
-# CHECK-SBFV2-NEXT:    0x20
+# CHECK-SBFV1:       Flags [ (0x1)
+# CHECK-SBFV1-NEXT:    0x1
+# CHECK-SBFV1-NEXT:  ]
+
+# CHECK-SBFV2:       Flags [ (0x2)
+# CHECK-SBFV2-NEXT:    0x2
 # CHECK-SBFV2-NEXT:  ]
 
+# CHECK-SBFV3:       Flags [ (0x3)
+# CHECK-SBFV3-NEXT:    0x1
+# CHECK-SBFV3-NEXT:    0x2
+# CHECK-SBFV3-NEXT:  ]
+
 mov64 r0, r0
diff --git a/llvm/test/MC/SBF/elf-header.s b/llvm/test/MC/SBF/elf-header.s
index ab09d7ba99b248..526e7f729857fa 100644
--- a/llvm/test/MC/SBF/elf-header.s
+++ b/llvm/test/MC/SBF/elf-header.s
@@ -1,4 +1,8 @@
-# RUN: llvm-mc %s -filetype=obj -triple=sbf-solana-solana --mcpu=sbfv2 | llvm-readobj -h - \
+# RUN: llvm-mc %s -filetype=obj -triple=sbf-solana-solana --mcpu=v1 | llvm-readobj -h - \
+# RUN:     | FileCheck %s
+# RUN: llvm-mc %s -filetype=obj -triple=sbf-solana-solana --mcpu=v2 | llvm-readobj -h - \
+# RUN:     | FileCheck %s
+# RUN: llvm-mc %s -filetype=obj -triple=sbf-solana-solana --mcpu=v3 | llvm-readobj -h - \
 # RUN:     | FileCheck %s
 
 # CHECK: Format: elf64-sbf
@@ -16,7 +20,3 @@
 # CHECK:   Type: Relocatable (0x1)
 # CHECK:   Machine: EM_SBF (0x107)
 # CHECK:   Version: 1
-# CHECK:   Flags [ (0x20)
-# CHECK:     0x20
-# CHECK:   ]
-# CHECK: }
diff --git a/llvm/test/MC/SBF/insn-unit-32.s b/llvm/test/MC/SBF/insn-unit-32.s
index b44bbc375f40e1..a3ebffc61328c7 100644
--- a/llvm/test/MC/SBF/insn-unit-32.s
+++ b/llvm/test/MC/SBF/insn-unit-32.s
@@ -1,6 +1,6 @@
-# RUN: llvm-mc -triple sbf --mcpu=sbfv2 -filetype=obj -o %t %s
-# RUN: llvm-objdump  -d -r %t | FileCheck %s --check-prefixes=CHECK,CHECK-alu64
-# RUN: llvm-objdump  --mattr=+alu32 -d -r %t | FileCheck %s --check-prefixes=CHECK,CHECK-alu32
+# RUN: llvm-mc -triple sbf -filetype=obj -o %t %s
+# RUN: llvm-objdump  -d -r %t | FileCheck %s
+# RUN: llvm-objdump  --mattr=+alu32 -d -r %t | FileCheck %s
 
 // ======== BPF_ALU Class ========
   neg32 w1    // BPF_NEG
@@ -51,8 +51,6 @@
 // CHECK: 64 06 00 00 3f 00 00 00      lsh32 w6, 0x3f
 // CHECK: 74 07 00 00 20 00 00 00      rsh32 w7, 0x20
 // CHECK: a4 08 00 00 00 00 00 00      xor32 w8, 0x0
-// CHECK-alu64: b4 09 00 00 01 00 00 00      mov32 r9, 0x1
-// CHECK-alu64: b4 09 00 00 ff ff ff ff      mov32 r9, -0x1
-// CHECK-alu32: b4 09 00 00 01 00 00 00      mov32 w9, 0x1
-// CHECK-alu32: b4 09 00 00 ff ff ff ff      mov32 w9, -0x1
+// CHECK: b4 09 00 00 01 00 00 00      mov32 w9, 0x1
+// CHECK: b4 09 00 00 ff ff ff ff      mov32 w9, -0x1
 // CHECK: c4 0a 00 00 40 00 00 00      arsh32 w10, 0x40
diff --git a/llvm/test/MC/SBF/sbf-jmp.s b/llvm/test/MC/SBF/sbf-jmp.s
index 308e40eeeceb40..a781f9b31d1f0b 100644
--- a/llvm/test/MC/SBF/sbf-jmp.s
+++ b/llvm/test/MC/SBF/sbf-jmp.s
@@ -1,8 +1,8 @@
-# RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=sbfv2 --show-encoding \
+# RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=v3 --show-encoding \
 # RUN:     | FileCheck %s --check-prefix=CHECK-ASM-NEW
 # RUN: llvm-mc %s -triple=sbf-solana-solana --show-encoding \
 # RUN:     | FileCheck %s --check-prefix=CHECK-ASM-OLD
-# RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=sbfv2 -filetype=obj \
+# RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=v3 -filetype=obj \
 # RUN:     | llvm-objdump -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-OBJ-NEW %s
 # RUN: llvm-mc %s -triple=sbf-solana-solana -filetype=obj \
diff --git a/llvm/test/MC/SBF/sbf-return-syscall.s b/llvm/test/MC/SBF/sbf-return-syscall.s
index 9f3b9ca00004aa..1e13462e1b48ab 100644
--- a/llvm/test/MC/SBF/sbf-return-syscall.s
+++ b/llvm/test/MC/SBF/sbf-return-syscall.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -triple=sbf-solana-solana --mcpu=sbfv2 -filetype=obj -o %t %s
+# RUN: llvm-mc -triple=sbf-solana-solana --mcpu=v3 -filetype=obj -o %t %s
 # RUN: llvm-objdump -d -r %t | FileCheck --check-prefix=CHECK %s
 
 syscall 9
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
index 275433ade50765..d55b595b0c3e0a 100644
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -2447,11 +2447,22 @@ static void disassembleObject(ObjectFile *Obj, bool InlineRelocs) {
   }
 
   // The SBF target specifies the cpu type as an ELF flag, which is not parsed automatically in LLVM objdump.
-  // We must set the CPU type here so that the disassembler can decode the SBFv2 features correctly.
+  // We must set the CPU type here so that the disassembler can decode the newer SBF features correctly.
   if (MCPU.empty() && Obj->isELF() && Obj->getArch() == Triple::sbf) {
     const auto *Elf64 = dyn_cast<ELF64LEObjectFile>(Obj);
-    if (Elf64->getPlatformFlags() & ELF::EF_SBF_V2) {
-      MCPU = "sbfv2";
+    switch (Elf64->getPlatformFlags()) {
+      case llvm::ELF::EF_SBF_V1:
+        MCPU = "v1";
+        break;
+      case llvm::ELF::EF_SBF_V2:
+        MCPU = "v2";
+        break;
+      case llvm::ELF::EF_SBF_V3:
+        MCPU = "v3";
+        break;
+      default:
+        MCPU = "generic";
+        break;
     }
   }