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Makes cargo clippy happy.
1 parent cefe613 commit 41514ba

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4 files changed

+7
-8
lines changed

4 files changed

+7
-8
lines changed

.github/workflows/main.yml

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ jobs:
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strategy:
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matrix:
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os: [macos-latest, ubuntu-latest, windows-latest]
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rust: [stable, beta, nightly]
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rust: [stable, beta]
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steps:
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- uses: actions/checkout@v1
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- name: Setup Rust (rustup)
@@ -31,7 +31,7 @@ jobs:
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run: |
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cargo fmt --all -- --check
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cargo clippy --all --tests -- --deny=warnings
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if: matrix.rust == 'nightly'
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if: matrix.rust == 'beta'
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shell: bash
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- name: Build and test
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run: |
@@ -45,7 +45,7 @@ jobs:
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run: |
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cargo fmt --all --manifest-path cli/Cargo.toml -- --check
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cargo clippy --all --tests --manifest-path cli/Cargo.toml -- --deny=warnings
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if: matrix.rust == 'nightly'
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if: matrix.rust == 'beta'
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shell: bash
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- name: CLI - Build and test
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run: |
@@ -58,11 +58,11 @@ jobs:
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export RUSTFLAGS="-D warnings"
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cargo install cargo-fuzz
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cargo fuzz build
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if: matrix.rust == 'nightly' && matrix.os != 'windows-latest'
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if: matrix.rust == 'beta' && matrix.os != 'windows-latest'
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shell: bash
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- name: Benchmark
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run: RUSTFLAGS="-D warnings" cargo bench -- --nocapture
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if: matrix.rust == 'nightly' && matrix.os != 'windows-latest'
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if: matrix.rust == 'beta' && matrix.os != 'windows-latest'
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shell: bash
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coverage:

clippy.toml

Lines changed: 0 additions & 1 deletion
This file was deleted.

src/insn_builder.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ impl<I: Instruction> IntoBytes for &I {
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fn into_bytes(self) -> Self::Bytes {
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vec![
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self.opt_code_byte(),
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self.get_src() << 4 | self.get_dst(),
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(self.get_src() << 4) | self.get_dst(),
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self.get_off() as u8,
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(self.get_off() >> 8) as u8,
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self.get_imm() as u8,

src/jit.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1365,7 +1365,7 @@ impl<'a, C: ContextObject> JitCompiler<'a, C> {
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}
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}
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self.emit_ins(X86Instruction::alu_immediate(size, 0xf7, 0x4 | (division as u8) << 1 | signed as u8, REGISTER_SCRATCH, 0, None));
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self.emit_ins(X86Instruction::alu_immediate(size, 0xf7, 0x4 | ((division as u8) << 1) | signed as u8, REGISTER_SCRATCH, 0, None));
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if dst != RDX {
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if alt_dst {

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