6868#endif
6969#endif
7070
71- #ifdef NRF54L_SERIES
72- #define RADIO_IRQn RADIO_0_IRQn
73- #define RADIO_INTENCLR_ADDRESS_Msk RADIO_INTENCLR00_ADDRESS_Msk
74- #define RADIO_INTENSET_DISABLED_Msk RADIO_INTENSET00_DISABLED_Msk
75- #define RADIO_INTENCLR_DISABLED_Msk RADIO_INTENCLR00_DISABLED_Msk
76- #define RADIO_INTENSET_END_Msk RADIO_INTENSET00_END_Msk
77- #define RADIO_INTENCLR_END_Msk RADIO_INTENCLR00_END_Msk
78- #define RADIO_INTENCLR_PHYEND_Msk RADIO_INTENCLR00_PHYEND_Msk
79- #define RADIO_INTENSET_ADDRESS_Msk RADIO_INTENSET00_ADDRESS_Msk
80- #endif
81-
82- #if BABBLESIM
83- extern void tm_tick (void );
84- #endif
85-
8671#include <controller/ble_ll_pdu.h>
8772
8873/*
@@ -113,57 +98,6 @@ extern void tm_tick(void);
11398extern uint8_t g_nrf_num_irks ;
11499extern uint32_t g_nrf_irk_list [];
115100
116- /* To disable all radio interrupts */
117- #ifdef NRF54L_SERIES
118- #define NRF_RADIO_IRQ_MASK_ALL (RADIO_INTENSET00_READY_Msk | \
119- RADIO_INTENSET00_ADDRESS_Msk | \
120- RADIO_INTENSET00_PAYLOAD_Msk | \
121- RADIO_INTENSET00_END_Msk | \
122- RADIO_INTENSET00_PHYEND_Msk | \
123- RADIO_INTENSET00_DISABLED_Msk | \
124- RADIO_INTENSET00_DEVMATCH_Msk | \
125- RADIO_INTENSET00_DEVMISS_Msk | \
126- RADIO_INTENSET00_BCMATCH_Msk | \
127- RADIO_INTENSET00_CRCOK_Msk | \
128- RADIO_INTENSET00_CRCERROR_Msk)
129- #else
130- #define NRF_RADIO_IRQ_MASK_ALL (0x34FF)
131- #endif
132- /*
133- * We configure the nrf with a 1 byte S0 field, 8 bit length field, and
134- * zero bit S1 field. The preamble is 8 bits long.
135- */
136- #define NRF_LFLEN_BITS (8)
137- #define NRF_S0LEN (1)
138- #define NRF_S1LEN_BITS (0)
139- #define NRF_CILEN_BITS (2)
140- #define NRF_TERMLEN_BITS (3)
141-
142- /* Maximum length of frames */
143- #define NRF_MAXLEN (255)
144- #define NRF_BALEN (3) /* For base address of 3 bytes */
145-
146- /* NRF_RADIO->PCNF0 configuration values */
147- #define NRF_PCNF0 (NRF_LFLEN_BITS << RADIO_PCNF0_LFLEN_Pos) | \
148- (RADIO_PCNF0_S1INCL_Include << RADIO_PCNF0_S1INCL_Pos) | \
149- (NRF_S0LEN << RADIO_PCNF0_S0LEN_Pos) | \
150- (NRF_S1LEN_BITS << RADIO_PCNF0_S1LEN_Pos)
151- #define NRF_PCNF0_1M (NRF_PCNF0) | \
152- (RADIO_PCNF0_PLEN_8bit << RADIO_PCNF0_PLEN_Pos)
153- #define NRF_PCNF0_2M (NRF_PCNF0) | \
154- (RADIO_PCNF0_PLEN_16bit << RADIO_PCNF0_PLEN_Pos)
155- #define NRF_PCNF0_CODED (NRF_PCNF0) | \
156- (RADIO_PCNF0_PLEN_LongRange << RADIO_PCNF0_PLEN_Pos) | \
157- (NRF_CILEN_BITS << RADIO_PCNF0_CILEN_Pos) | \
158- (NRF_TERMLEN_BITS << RADIO_PCNF0_TERMLEN_Pos)
159-
160- #define PHY_TRANS_NONE (0)
161- #define PHY_TRANS_TO_TX (1)
162- #define PHY_TRANS_TO_RX (2)
163-
164- #define PHY_TRANS_ANCHOR_START (0)
165- #define PHY_TRANS_ANCHOR_END (1)
166-
167101/* BLE PHY data structure */
168102struct ble_phy_obj
169103{
@@ -232,56 +166,63 @@ static const uint16_t g_ble_phy_mode_pkt_start_off[BLE_PHY_NUM_MODE] = {
232166
233167#if BABBLESIM
234168/* delay between EVENTS_READY and start of tx */
235- static const uint8_t g_ble_phy_t_txdelay [BLE_PHY_NUM_MODE ] = {
169+ const uint8_t g_ble_phy_t_txdelay [BLE_PHY_NUM_MODE ] = {
170+ [BLE_PHY_MODE_1M ] = 1 ,
171+ [BLE_PHY_MODE_2M ] = 1 ,
172+ };
173+ /* delay between EVENTS_ADDRESS and txd access address */
174+ const uint8_t g_ble_phy_t_txaddrdelay [BLE_PHY_NUM_MODE ] = {
236175 [BLE_PHY_MODE_1M ] = 1 ,
237176 [BLE_PHY_MODE_2M ] = 1 ,
177+ [BLE_PHY_MODE_CODED_125KBPS ] = 1 ,
178+ [BLE_PHY_MODE_CODED_500KBPS ] = 1 ,
238179};
239180/* delay between EVENTS_END and end of txd packet */
240- static const uint8_t g_ble_phy_t_txenddelay [BLE_PHY_NUM_MODE ] = {
181+ const uint8_t g_ble_phy_t_txenddelay [BLE_PHY_NUM_MODE ] = {
241182 [BLE_PHY_MODE_1M ] = 1 ,
242183 [BLE_PHY_MODE_2M ] = 1 ,
243184};
244185/* delay between rxd access address (w/ TERM1 for coded) and EVENTS_ADDRESS */
245- static const uint8_t g_ble_phy_t_rxaddrdelay [BLE_PHY_NUM_MODE ] = {
186+ const uint8_t g_ble_phy_t_rxaddrdelay [BLE_PHY_NUM_MODE ] = {
246187 [BLE_PHY_MODE_1M ] = 9 ,
247188 [BLE_PHY_MODE_2M ] = 5 ,
248189};
249190/* delay between end of rxd packet and EVENTS_END */
250- static const uint8_t g_ble_phy_t_rxenddelay [BLE_PHY_NUM_MODE ] = {
191+ const uint8_t g_ble_phy_t_rxenddelay [BLE_PHY_NUM_MODE ] = {
251192 [BLE_PHY_MODE_1M ] = 9 ,
252193 [BLE_PHY_MODE_2M ] = 5 ,
253194};
254195#elif defined(NRF54L_SERIES )
255196/* delay between EVENTS_READY and start of tx */
256- static const uint8_t g_ble_phy_t_txdelay [BLE_PHY_NUM_MODE ] = {
197+ const uint8_t g_ble_phy_t_txdelay [BLE_PHY_NUM_MODE ] = {
257198 [BLE_PHY_MODE_1M ] = 2 , /* ~1.6us */
258199 [BLE_PHY_MODE_2M ] = 5 ,
259200 [BLE_PHY_MODE_CODED_125KBPS ] = 5 ,
260201 [BLE_PHY_MODE_CODED_500KBPS ] = 5
261202};
262203/* delay between EVENTS_ADDRESS and txd access address */
263- static const uint8_t g_ble_phy_t_txaddrdelay [BLE_PHY_NUM_MODE ] = {
204+ const uint8_t g_ble_phy_t_txaddrdelay [BLE_PHY_NUM_MODE ] = {
264205 [BLE_PHY_MODE_1M ] = 3 , /* ~3.2us */
265206 [BLE_PHY_MODE_2M ] = 5 ,
266207 [BLE_PHY_MODE_CODED_125KBPS ] = 17 ,
267208 [BLE_PHY_MODE_CODED_500KBPS ] = 17
268209};
269210/* delay between EVENTS_END and end of txd packet */
270- static const uint8_t g_ble_phy_t_txenddelay [BLE_PHY_NUM_MODE ] = {
211+ const uint8_t g_ble_phy_t_txenddelay [BLE_PHY_NUM_MODE ] = {
271212 [BLE_PHY_MODE_1M ] = 2 , /* ~2.3us */
272213 [BLE_PHY_MODE_2M ] = 4 ,
273214 [BLE_PHY_MODE_CODED_125KBPS ] = 9 ,
274215 [BLE_PHY_MODE_CODED_500KBPS ] = 3
275216};
276217/* delay between rxd access address (w/ TERM1 for coded) and EVENTS_ADDRESS */
277- static const uint8_t g_ble_phy_t_rxaddrdelay [BLE_PHY_NUM_MODE ] = {
218+ const uint8_t g_ble_phy_t_rxaddrdelay [BLE_PHY_NUM_MODE ] = {
278219 [BLE_PHY_MODE_1M ] = 9 , /* ~9.2us */
279220 [BLE_PHY_MODE_2M ] = 2 ,
280221 [BLE_PHY_MODE_CODED_125KBPS ] = 17 ,
281222 [BLE_PHY_MODE_CODED_500KBPS ] = 17
282223};
283224/* delay between end of rxd packet and EVENTS_END */
284- static const uint8_t g_ble_phy_t_rxenddelay [BLE_PHY_NUM_MODE ] = {
225+ const uint8_t g_ble_phy_t_rxenddelay [BLE_PHY_NUM_MODE ] = {
285226 [BLE_PHY_MODE_1M ] = 9 , /* ~9.1us */
286227 [BLE_PHY_MODE_2M ] = 1 ,
287228 [BLE_PHY_MODE_CODED_125KBPS ] = 27 ,
@@ -652,7 +593,7 @@ ble_phy_rxpdu_copy(uint8_t *dptr, struct os_mbuf *rxpdu)
652593 * disable states. We want to wait until that state is over before doing
653594 * anything to the radio
654595 */
655- static void
596+ void
656597nrf_wait_disabled (void )
657598{
658599 uint32_t state ;
@@ -677,7 +618,7 @@ nrf_wait_disabled(void)
677618 *
678619 *
679620 */
680- static int
621+ int
681622ble_phy_set_start_time (uint32_t cputime , uint8_t rem_us , bool tx )
682623{
683624 uint32_t next_cc ;
@@ -875,7 +816,7 @@ ble_phy_set_start_now(void)
875816 return 0 ;
876817}
877818
878- static void
819+ void
879820ble_phy_wfr_enable_at (uint32_t end_time )
880821{
881822 /* wfr_secs is the time from rxen until timeout */
@@ -1114,7 +1055,7 @@ ble_phy_rx_xcvr_setup(void)
11141055 RADIO_INTENSET_DISABLED_Msk );
11151056}
11161057
1117- static uint32_t
1058+ uint32_t
11181059ble_phy_transition_anchor_get (uint8_t tifs_anchor , uint8_t phy_state , uint8_t phy_mode )
11191060{
11201061 uint32_t time ;
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