diff --git a/hal/src/dmac/channel/mod.rs b/hal/src/dmac/channel/mod.rs
index 103974f7c09..be1193b1ff1 100644
--- a/hal/src/dmac/channel/mod.rs
+++ b/hal/src/dmac/channel/mod.rs
@@ -418,8 +418,8 @@ impl<Id: ChId> From<Channel<Id, Ready>> for Channel<Id, Uninitialized> {
 impl<Id: ChId> Channel<Id, ReadyFuture> {
     /// Begin DMA transfer using `async` operation.
     ///
-    /// If [TriggerSource::DISABLE](TriggerSource::DISABLE) is used, a software
-    /// trigger will be issued to the DMA channel to launch the transfer. Is
+    /// If [TriggerSource::DISABLE] is used, a software
+    /// trigger will be issued to the DMA channel to launch the transfer. It
     /// is therefore not necessary, in most cases, to manually issue a
     /// software trigger to the channel.
     ///
@@ -432,14 +432,12 @@ impl<Id: ChId> Channel<Id, ReadyFuture> {
     ///
     /// This means that, as an user, you **must** ensure that the [`Future`]
     /// returned by this function may never be forgotten through [`forget`].
-    /// [`Channel`]s implement [`Drop`] and will automatically s
-    ///top any ongoing transfers to guarantee that the memor
-    ///y occupied by the now-dropped buffers may
-    /// not be corrupted by running transfers. This also means
-    /// memory, memory, memory, memory, that should you [`forget`] this
-    /// [`Future`] after it is first [`poll`] call, the transfer will keep
-    /// running, ruining the now-reclaimed memory, as well as the rest of
-    /// your day.
+    /// [`Channel`]s implement [`Drop`] and will automatically stop any ongoing
+    /// transfers to guarantee that the memory occupied by the now-dropped
+    /// buffers may not be corrupted by running transfers. This also means that
+    /// should you [`forget`] this [`Future`] after its first [`poll`]
+    /// call, the transfer will keep running, ruining the now-reclaimed
+    /// memory, as well as the rest of your day.
     ///
     /// * `await`ing is fine: the [`Future`] will run to completion.
     /// * Dropping an incomplete transfer is also fine. Dropping can happen,
diff --git a/hal/src/dmac/mod.rs b/hal/src/dmac/mod.rs
index 0245c275bc2..b0925f7e9ca 100644
--- a/hal/src/dmac/mod.rs
+++ b/hal/src/dmac/mod.rs
@@ -117,7 +117,7 @@
 //! `Drop` implementation is offered for `Transfer`s.
 //!
 //! Additionally, you can (unsafely) implement your own buffer types through the
-//! unsafe [`Buffer`](transfer::Buffer) trait.
+//! unsafe [`Buffer`] trait.
 //!
 //! # Example
 //! ```
diff --git a/hal/src/dmac/transfer.rs b/hal/src/dmac/transfer.rs
index 3b3f5049cbf..e40b4b53f96 100644
--- a/hal/src/dmac/transfer.rs
+++ b/hal/src/dmac/transfer.rs
@@ -109,7 +109,7 @@ pub enum BeatSize {
 }
 
 /// Convert 8, 16 and 32 bit types
-/// into [`BeatSize`](BeatSize)
+/// into [`BeatSize`]
 ///
 /// # Safety
 ///
@@ -331,7 +331,7 @@ where
     ///
     /// # Errors
     ///
-    /// Returns [`Error::LengthMismatch`](super::Error::LengthMismatch) if both
+    /// Returns [`Error::LengthMismatch`] if both
     /// buffers have a length > 1 and are not of equal length.
     #[allow(clippy::new_ret_no_self)]
     #[inline]
@@ -478,7 +478,7 @@ where
     C: AnyChannel<Status = Ready>,
 {
     /// Begin DMA transfer in blocking mode. If
-    /// [TriggerSource::DISABLE](TriggerSource::DISABLE) is used, a software
+    /// [TriggerSource::DISABLE] is used, a software
     /// trigger will be issued to the DMA channel to launch the transfer. Is
     /// is therefore not necessary, in most cases, to manually issue a
     /// software trigger to the channel.
diff --git a/hal/src/sercom/async_dma.rs b/hal/src/sercom/async_dma.rs
index 92132d93788..3915a2cd45f 100644
--- a/hal/src/sercom/async_dma.rs
+++ b/hal/src/sercom/async_dma.rs
@@ -18,7 +18,7 @@ use super::Sercom;
 /// [`ImmutableSlice`]s should only ever be used as **source** buffers for DMA
 /// transfers, and never as destination buffers.
 #[doc(hidden)]
-pub struct ImmutableSlice<T: Beat>(Range<*mut T>);
+pub(crate) struct ImmutableSlice<T: Beat>(Range<*mut T>);
 
 impl<T: Beat> ImmutableSlice<T> {
     #[inline]
@@ -58,11 +58,10 @@ unsafe impl<T: Beat> Buffer for ImmutableSlice<T> {
 
 /// Wrapper type over Sercom instances to get around lifetime issues when using
 /// one as a DMA source/destination buffer. This is an implementation detail to
-/// make async SERCOM-DMA transfers work. Should not be used outside of this
-/// crate.
+/// make async SERCOM-DMA transfers work.
 #[doc(hidden)]
 #[derive(Clone)]
-pub struct SercomPtr<T: Beat>(pub(in super::super) *mut T);
+pub(crate) struct SercomPtr<T: Beat>(pub(in super::super) *mut T);
 
 unsafe impl<T: Beat> Buffer for SercomPtr<T> {
     type Beat = T;