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jbeaurivagejbeaurivage
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Fix SERCOM and multiple sources problem. Need to implement thumbv7 DMAC
1 parent cc6e74d commit 4d69adb

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17 files changed

+449
-602
lines changed

17 files changed

+449
-602
lines changed

‎boards/feather_m0/examples/async_dmac.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ use defmt_rtt as _;
88
use panic_probe as _;
99

1010
atsamd_hal::bind_interrupts!(struct Irqs {
11-
DMAC => atsamd_hal::dmac::async_api::InterruptHandler;
11+
DMAC => atsamd_hal::dmac::InterruptHandler;
1212
});
1313

1414
#[rtic::app(device = bsp::pac, dispatchers = [I2S])]

‎boards/feather_m0/examples/async_i2c.rs

Lines changed: 15 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -5,20 +5,25 @@
55
use defmt_rtt as _;
66
use panic_probe as _;
77

8+
use atsamd_hal::sercom::Sercom3;
9+
10+
atsamd_hal::bind_interrupts!(struct Irqs {
11+
SERCOM3 => atsamd_hal::sercom::i2c::InterruptHandler<Sercom3>;
12+
DMAC => atsamd_hal::dmac::InterruptHandler;
13+
});
14+
815
#[rtic::app(device = bsp::pac, dispatchers = [I2S])]
916
mod app {
10-
use bsp::{hal, pac};
17+
use super::*;
18+
use bsp::hal;
1119
use feather_m0 as bsp;
1220
use fugit::MillisDuration;
1321
use hal::{
1422
clock::{enable_internal_32kosc, ClockGenId, ClockSource, GenericClockController},
15-
dmac::{self, Ch0, DmaController, PriorityLevel},
23+
dmac::{Ch0, DmaController, PriorityLevel},
1624
prelude::*,
1725
rtc::{Count32Mode, Rtc},
18-
sercom::{
19-
i2c::{self, Config, I2cFutureDma},
20-
Interrupts,
21-
},
26+
sercom::i2c::{self, Config, I2cFutureDma},
2227
};
2328

2429
#[monotonic(binds = RTC, default = true)]
@@ -49,12 +54,6 @@ mod app {
4954
// Take SDA and SCL
5055
let (sda, scl) = (pins.sda, pins.scl);
5156

52-
let sercom3_irq = Interrupts::new(cortex_m_interrupt::take_nvic_interrupt!(
53-
pac::Interrupt::SERCOM3,
54-
2
55-
));
56-
// tc4_irq.set_priority(2);
57-
5857
enable_internal_32kosc(&mut peripherals.SYSCTRL);
5958
let timer_clock = clocks
6059
.configure_gclk_divider_and_source(ClockGenId::GCLK2, 1, ClockSource::OSC32K, false)
@@ -67,13 +66,9 @@ mod app {
6766

6867
// Initialize DMA Controller
6968
let dmac = DmaController::init(peripherals.DMAC, &mut peripherals.PM);
70-
// Get handle to IRQ
71-
let dmac_irq = dmac::Interrupts::new(cortex_m_interrupt::take_nvic_interrupt!(
72-
pac::Interrupt::DMAC,
73-
2
74-
));
69+
7570
// Turn dmac into an async controller
76-
let mut dmac = dmac.into_future(dmac_irq);
71+
let mut dmac = dmac.into_future(Irqs);
7772
// Get individual handles to DMA channels
7873
let channels = dmac.split();
7974

@@ -89,9 +84,9 @@ mod app {
8984
pads,
9085
sercom3_clock.freq(),
9186
)
92-
.baud(100.khz())
87+
.baud(100.kHz())
9388
.enable()
94-
.into_future(sercom3_irq)
89+
.into_future(Irqs)
9590
.with_dma_channel(channel0);
9691

9792
async_task::spawn().ok();

‎boards/feather_m0/examples/async_spi.rs

Lines changed: 15 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -5,20 +5,25 @@
55
use defmt_rtt as _;
66
use panic_probe as _;
77

8+
use atsamd_hal::sercom::Sercom4;
9+
10+
atsamd_hal::bind_interrupts!(struct Irqs {
11+
SERCOM4 => atsamd_hal::sercom::spi::InterruptHandler<Sercom4>;
12+
DMAC => atsamd_hal::dmac::InterruptHandler;
13+
});
14+
815
#[rtic::app(device = bsp::pac, dispatchers = [I2S])]
916
mod app {
10-
use bsp::{hal, pac};
17+
use super::*;
18+
use bsp::hal;
1119
use feather_m0 as bsp;
1220
use fugit::MillisDuration;
1321
use hal::{
1422
clock::{enable_internal_32kosc, ClockGenId, ClockSource, GenericClockController},
15-
dmac::{self, Ch0, Ch1, DmaController, PriorityLevel},
23+
dmac::{Ch0, Ch1, DmaController, PriorityLevel},
1624
prelude::*,
1725
rtc::{Count32Mode, Rtc},
18-
sercom::{
19-
spi::{Config, SpiFutureDuplexDma},
20-
Interrupts,
21-
},
26+
sercom::spi::{Config, SpiFutureDuplexDma},
2227
};
2328

2429
#[monotonic(binds = RTC, default = true)]
@@ -49,12 +54,6 @@ mod app {
4954
// Take SPI pins
5055
let (miso, mosi, sclk) = (pins.miso, pins.mosi, pins.sclk);
5156

52-
let sercom4_irq = Interrupts::new(cortex_m_interrupt::take_nvic_interrupt!(
53-
pac::Interrupt::SERCOM4,
54-
2
55-
));
56-
// tc4_irq.set_priority(2);
57-
5857
enable_internal_32kosc(&mut peripherals.SYSCTRL);
5958
let timer_clock = clocks
6059
.configure_gclk_divider_and_source(ClockGenId::GCLK2, 1, ClockSource::OSC32K, false)
@@ -67,13 +66,9 @@ mod app {
6766

6867
// Initialize DMA Controller
6968
let dmac = DmaController::init(peripherals.DMAC, &mut peripherals.PM);
70-
// Get handle to IRQ
71-
let dmac_irq = dmac::Interrupts::new(cortex_m_interrupt::take_nvic_interrupt!(
72-
pac::Interrupt::DMAC,
73-
2
74-
));
69+
7570
// Turn dmac into an async controller
76-
let mut dmac = dmac.into_future(dmac_irq);
71+
let mut dmac = dmac.into_future(Irqs);
7772
// Get individual handles to DMA channels
7873
let channels = dmac.split();
7974

@@ -83,14 +78,14 @@ mod app {
8378

8479
let spi = bsp::spi_master(
8580
&mut clocks,
86-
100.khz(),
81+
100.kHz(),
8782
peripherals.SERCOM4,
8883
&mut peripherals.PM,
8984
sclk,
9085
mosi,
9186
miso,
9287
)
93-
.into_future(sercom4_irq)
88+
.into_future(Irqs)
9489
.with_dma_channels(channel0, channel1);
9590

9691
async_task::spawn().ok();

‎boards/feather_m0/examples/async_uart.rs

Lines changed: 13 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -5,19 +5,26 @@
55
use defmt_rtt as _;
66
use panic_probe as _;
77

8+
use atsamd_hal::sercom::Sercom0;
9+
10+
atsamd_hal::bind_interrupts!(struct Irqs {
11+
SERCOM0 => atsamd_hal::sercom::uart::InterruptHandler<Sercom0>;
12+
DMAC => atsamd_hal::dmac::InterruptHandler;
13+
});
14+
815
#[rtic::app(device = bsp::pac, dispatchers = [I2S, AC])]
916
mod app {
10-
use bsp::{hal, pac, periph_alias, pin_alias};
17+
use super::*;
18+
use bsp::{hal, periph_alias, pin_alias};
1119
use feather_m0 as bsp;
1220
use fugit::MillisDuration;
1321
use hal::{
1422
clock::{enable_internal_32kosc, ClockGenId, ClockSource, GenericClockController},
15-
dmac::{self, Ch0, Ch1, DmaController, PriorityLevel},
23+
dmac::{Ch0, Ch1, DmaController, PriorityLevel},
1624
prelude::*,
1725
rtc::{Count32Mode, Rtc},
1826
sercom::{
1927
uart::{Config, UartFutureRxDuplexDma, UartFutureTxDuplexDma},
20-
Interrupts,
2128
},
2229
};
2330

@@ -50,11 +57,6 @@ mod app {
5057
let (uart_rx, uart_tx) = (pin_alias!(pins.uart_rx), pin_alias!(pins.uart_tx));
5158
let uart_sercom = periph_alias!(peripherals.uart_sercom);
5259

53-
let sercom0_irq = Interrupts::new(cortex_m_interrupt::take_nvic_interrupt!(
54-
pac::Interrupt::SERCOM0,
55-
4
56-
));
57-
5860
enable_internal_32kosc(&mut peripherals.SYSCTRL);
5961
let timer_clock = clocks
6062
.configure_gclk_divider_and_source(ClockGenId::GCLK2, 1, ClockSource::OSC32K, false)
@@ -63,13 +65,8 @@ mod app {
6365

6466
// Initialize DMA Controller
6567
let dmac = DmaController::init(peripherals.DMAC, &mut peripherals.PM);
66-
// Get handle to IRQ
67-
let dmac_irq = dmac::Interrupts::new(cortex_m_interrupt::take_nvic_interrupt!(
68-
pac::Interrupt::DMAC,
69-
3
70-
));
7168
// Turn dmac into an async controller
72-
let mut dmac = dmac.into_future(dmac_irq);
69+
let mut dmac = dmac.into_future(Irqs);
7370
// Get individual handles to DMA channels
7471
let channels = dmac.split();
7572

@@ -83,13 +80,13 @@ mod app {
8380

8481
let (uart_rx, uart_tx) = bsp::uart(
8582
&mut clocks,
86-
9600.hz(),
83+
9600.Hz(),
8784
uart_sercom,
8885
&mut peripherals.PM,
8986
uart_rx,
9087
uart_tx,
9188
)
92-
.into_future(sercom0_irq)
89+
.into_future(Irqs)
9390
.with_rx_dma_channel(channel0)
9491
.with_tx_dma_channel(channel1)
9592
.split();

‎boards/feather_m0/examples/dmac_embassy.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,9 +15,9 @@ atsamd_hal::bind_interrupts!(struct Irqs {
1515
use bsp::hal;
1616
use feather_m0 as bsp;
1717
use hal::{
18+
async_hal::interrupts::{Interrupt, Priority, DMAC},
1819
clock::GenericClockController,
1920
dmac::{DmaController, PriorityLevel, TriggerAction, TriggerSource},
20-
async_hal::interrupts::{Interrupt, Priority, DMAC},
2121
};
2222

2323
#[embassy_executor::main]

‎hal/Cargo.toml

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,6 @@ void = {version = "1.0", default-features = false}
5454
# Optional depdendencies
5555
#===============================================================================
5656

57-
cortex-m-interrupt = {version = "0.2.1-git", git = "https://github.com/datdenkikniet/cortex-m-interrupt.git", rev = "9baa936", optional = true}
5857
embassy-sync = {version = "0.4", optional = true}
5958
embedded-hal-alpha = {package = "embedded-hal", version = "1.0.0-rc.1"}
6059
embedded-hal-async = {version = "1.0.0-rc.2", optional = true, features = ["defmt-03"]}
@@ -194,7 +193,6 @@ unproven = ["embedded-hal/unproven"]
194193
usb = ["usb-device"]
195194
use_rtt = ["jlink_rtt"]
196195
async = [
197-
"cortex-m-interrupt",
198196
"unproven",
199197
"embassy-sync",
200198
"embedded-hal-async",

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