From 6f6aa7364f2b4916cde723cf4650c463263983b2 Mon Sep 17 00:00:00 2001 From: Bill Nguyen Date: Fri, 27 Sep 2024 15:48:10 +1000 Subject: [PATCH] pinctrl: style: remove trailling whitespaces Signed-off-by: Bill Nguyen --- drivers/pinctrl/README.md | 4 +- drivers/pinctrl/imx/create_pinctrl_config.py | 2 +- drivers/pinctrl/imx/pinctrl.c | 16 ++--- drivers/pinctrl/imx/pinctrl_driver.mk | 10 +-- .../pinctrl/meson/create_pinctrl_config.py | 68 +++++++++---------- drivers/pinctrl/meson/odroidc4.py | 52 +++++++------- drivers/pinctrl/meson/pinctrl.c | 8 +-- drivers/pinctrl/meson/pinctrl_driver.mk | 8 +-- include/sddf/pinctrl/client.h | 6 +- 9 files changed, 87 insertions(+), 87 deletions(-) diff --git a/drivers/pinctrl/README.md b/drivers/pinctrl/README.md index 55796b983..383637fef 100644 --- a/drivers/pinctrl/README.md +++ b/drivers/pinctrl/README.md @@ -8,13 +8,13 @@ Also known as pinmux driver # Terminology - Port: refers to an input or output line of a logic instance in the chip (e.g. UART, DDR, HDMI, I2C,...). For example, an I2C instance have SDA and SCL ports. Not to be confused with pad. -- Pad: refers to the physical pin on the chip package (example, ball for BGA packaged chips). +- Pad: refers to the physical pin on the chip package (example, ball for BGA packaged chips). # Overview A chip contains a limited number of pads as it is not feasable to have a one-to-one mapping between all pads and ports. Hence, most of the pads have multiple signal options. I.e. a pad can be connected to one of multiple ports at a given point in time as appropriate for the intended use case. These signal-to-pin and pin-to-signal options are selected by the input-output multiplexer called pinmux. The pinmux is also used to configure other pin characteristics, such as drive strength, bias, etc... -Even though the pinmux parameters can be set dynamically at runtime, we restrict ourselves to settings that are set in the device tree at compile time and disallow any deviations from that. +Even though the pinmux parameters can be set dynamically at runtime, we restrict ourselves to settings that are set in the device tree at compile time and disallow any deviations from that. Before the pinmux driver is built, a Python script will read the target board's device tree source file, extracting all the pinmux settings and encodes them as binary values in an assembly file. Then the driver is built and linked with the pinmux data assembly file, creating a complete pinmux driver ELF image. diff --git a/drivers/pinctrl/imx/create_pinctrl_config.py b/drivers/pinctrl/imx/create_pinctrl_config.py index 6cd7a311e..b96e2cdc5 100644 --- a/drivers/pinctrl/imx/create_pinctrl_config.py +++ b/drivers/pinctrl/imx/create_pinctrl_config.py @@ -62,7 +62,7 @@ def get_pinctrl_info(device_nodes, enabled_phandles): print("Usage: ") print("\tpython3 create_pinmux_setup.py ") exit(1) - + # Parse device tree file soc_name = sys.argv[1] devicetree = dtlib.DT(sys.argv[2], force=True) diff --git a/drivers/pinctrl/imx/pinctrl.c b/drivers/pinctrl/imx/pinctrl.c index d3a9f10c0..2bbbf283a 100644 --- a/drivers/pinctrl/imx/pinctrl.c +++ b/drivers/pinctrl/imx/pinctrl.c @@ -35,14 +35,14 @@ // Size of all registers inclusive #ifdef SOC_IMX8MQ_EVK -#define IOMUXC_DEVICE_EFFECTIVE_SIZE 0x520 +#define IOMUXC_DEVICE_EFFECTIVE_SIZE 0x520 #endif #ifdef SOC_IMX8MM_EVK #define IOMUXC_DEVICE_EFFECTIVE_SIZE 0x538 #endif uintptr_t iomuxc_dev_base; -// The registers are only within iomuxc_dev_base + IOMUXC_DEVICE_BASE_PAD and +// The registers are only within iomuxc_dev_base + IOMUXC_DEVICE_BASE_PAD and // iomuxc_dev_base + IOMUXC_DEVICE_BASE_PAD + IOMUXC_DEVICE_EFFECTIVE_SIZE // General Purpose Registers: a memory region contiguous with the iomuxc device. @@ -109,7 +109,7 @@ bool read_mux(uint32_t offset, uint32_t *ret) { if (!check_offset_bound(offset) || !check_offset_4_bytes_aligned(offset)) { return false; } - + volatile uint32_t *mux_reg_vaddr = (uint32_t *) (iomuxc_dev_base + (uintptr_t) offset); asm volatile("" : : : "memory"); @@ -143,9 +143,9 @@ void debug_dts_print() { LOG_DRIVER("nums of config is %u\n", num_iomuxc_configs); LOG_DRIVER("data dump begin...one pin per line\n"); for (uint32_t i = 0; i < num_iomuxc_configs; i += 1) { - LOG_DRIVER("mux reg: 0x%x = %u, input reg: 0x%x = %u, pad conf reg: 0x%x = %u. ", - iomuxc_configs[i].mux_reg, iomuxc_configs[i].mux_val, - iomuxc_configs[i].input_reg, iomuxc_configs[i].input_val, + LOG_DRIVER("mux reg: 0x%x = %u, input reg: 0x%x = %u, pad conf reg: 0x%x = %u. ", + iomuxc_configs[i].mux_reg, iomuxc_configs[i].mux_val, + iomuxc_configs[i].input_reg, iomuxc_configs[i].input_val, iomuxc_configs[i].conf_reg, iomuxc_configs[i].pad_setting ); @@ -261,8 +261,8 @@ microkit_msginfo protected(microkit_channel ch, microkit_msginfo msginfo) { case SDDF_PINCTRL_READ_MUX: { if (microkit_msginfo_get_count(msginfo) != READ_MUX_REQ_NUM_ARGS) { LOG_DRIVER_ERR( - "Read mux PPC from channel %u does not have the correct number of arguments %lu != %d\n", - ch, + "Read mux PPC from channel %u does not have the correct number of arguments %lu != %d\n", + ch, microkit_msginfo_get_count(msginfo), READ_MUX_REQ_NUM_ARGS ); return microkit_msginfo_new(SDDF_PINCTRL_INVALID_ARGS, 0); diff --git a/drivers/pinctrl/imx/pinctrl_driver.mk b/drivers/pinctrl/imx/pinctrl_driver.mk index 382cf5889..bae9a33c2 100644 --- a/drivers/pinctrl/imx/pinctrl_driver.mk +++ b/drivers/pinctrl/imx/pinctrl_driver.mk @@ -8,7 +8,7 @@ # # NOTES # Generates pinctrl.elf -# Has 4 parameters: +# Has 4 parameters: # SDDF: path to sddf root # PYTHON # DTS_FILE: absolute path to the device tree source file. @@ -27,15 +27,15 @@ ifndef PYTHON $(error PYTHON is not set) endif -ifndef DTS_FILE +ifndef DTS_FILE $(error DTS_FILE is not set) endif -ifndef PINMUX_DEVICE +ifndef PINMUX_DEVICE $(error PINMUX_DEVICE is not set) endif -ifndef SOC +ifndef SOC $(error SOC is not set) endif @@ -62,7 +62,7 @@ pinctrl/pinctrl_config_data.o: pinctrl/pinctrl_config_data.s pinctrl/pinctrl_config_data.s: ${DTS_FILE} ${PINCTRL_DIR}/create_pinctrl_config.py ${PYTHON} ${PINCTRL_DIR}/create_pinctrl_config.py ${SOC} ${DTS_FILE} ${PINMUX_DEVICE} pinctrl -pinctrl: +pinctrl: mkdir -p pinctrl clean:: diff --git a/drivers/pinctrl/meson/create_pinctrl_config.py b/drivers/pinctrl/meson/create_pinctrl_config.py index dd2e8bb34..0be179bc5 100644 --- a/drivers/pinctrl/meson/create_pinctrl_config.py +++ b/drivers/pinctrl/meson/create_pinctrl_config.py @@ -7,7 +7,7 @@ # $ dtc -I dtb -O dts -o input.dtb output.dts # A typical invocation might look like: -# $ python3 create_pinctrl_config.py hardkernel,odroid-c4 your_device_tree.dts build +# $ python3 create_pinctrl_config.py hardkernel,odroid-c4 your_device_tree.dts build import sys sys.dont_write_bytecode = True @@ -67,16 +67,16 @@ def fetch_enabled_devices(devicetree: dtlib.DT) -> dict[int, str]: # Each pinctrl data node inside the DTS is represented with this class. # These data are then converted into memory values for writing into pinmux registers. class PinData: - def __init__(self, + def __init__(self, phandle: int, - muxed_device_name: str, - muxed_device_property_node_name: str, - group_names: list[str], - function_name: str, - bias_enable: bool, - bias_pullup: bool, + muxed_device_name: str, + muxed_device_property_node_name: str, + group_names: list[str], + function_name: str, + bias_enable: bool, + bias_pullup: bool, drive_strength: int): - + self.phandle = phandle # for debugging: name of the device in DTS self.muxed_device_name = muxed_device_name @@ -112,7 +112,7 @@ def __str__(self): # This function extract pinmux data from the "pinctrl" node in DTS and return a list of PinData. # It will be called twice, once for peripherals and always-on GPIO chips. # Returns a list of PinData. -def get_pinctrl_data(pinmux_node: dtlib.Node, enabled_phandles: dict[int, str], func_to_group_map: dict[str, list[str]]) -> list[PinData]: +def get_pinctrl_data(pinmux_node: dtlib.Node, enabled_phandles: dict[int, str], func_to_group_map: dict[str, list[str]]) -> list[PinData]: # `pinmux_node` looks something like this: # pinctrl@40 { # compatible = "amlogic,meson-g12a-periphs-pinctrl"; @@ -160,7 +160,7 @@ def get_pinctrl_data(pinmux_node: dtlib.Node, enabled_phandles: dict[int, str], for subproperty_name in muxed_device_property_node.props: if subproperty_name == "groups": group_names = muxed_device_property_node.props[subproperty_name].to_string().split('\0') - + if subproperty_name == "function": values_list = muxed_device_property_node.props[subproperty_name].to_string().split('\0') if len(values_list) != 1: @@ -170,7 +170,7 @@ def get_pinctrl_data(pinmux_node: dtlib.Node, enabled_phandles: dict[int, str], # If for whatever reason the device defined in the DTS does not have data in our # mapping tables, drop it. This can happens for undocumented devices/pads that does not appear - # in the Linux kernel. An example is the DTS from the OdroidC4's Ubuntu image: + # in the Linux kernel. An example is the DTS from the OdroidC4's Ubuntu image: # ubuntu-20.04-4.9-minimal-odroid-c4-hc4-20220228 # Where the "cec_ao_a_ee" and "cec_ao_b_ee" groups with "cec_ao_ee" function are not defined in the Linux kernel and datasheet at all. if function_name not in func_to_group_map: @@ -184,7 +184,7 @@ def get_pinctrl_data(pinmux_node: dtlib.Node, enabled_phandles: dict[int, str], if subproperty_name == "drive-strength-microamp": drive_strength = muxed_device_property_node.props[subproperty_name].to_num() - + if bias_enable == -1: # We haven't encountered the "bias-disable" property if "bias-pull-up" in muxed_device_property_node.props: @@ -197,17 +197,17 @@ def get_pinctrl_data(pinmux_node: dtlib.Node, enabled_phandles: dict[int, str], # This isn't an error because that pin could be used for input log_warning_parser("Warning: bias undefined for device: " + muxed_device_node.name + ". Defaulting to disabling bias!\n") bias_enable = False - + if undocumented: break - result.append(PinData(muxed_device_node.props["phandle"].to_num(), - muxed_device_name, - muxed_device_property_node_name, - group_names, - function_name, - bias_enable, - bias_pullup, + result.append(PinData(muxed_device_node.props["phandle"].to_num(), + muxed_device_name, + muxed_device_property_node_name, + group_names, + function_name, + bias_enable, + bias_pullup, drive_strength) ) @@ -218,17 +218,17 @@ def zero_n_bits_at_ith_bit_of_32bits(register: int, n: int, ith: int) -> int: if n < 0 or ith < 0 or register > 0xFFFF_FFFF: log_error_parser(f"invalid arg to zero_n_bits_at_ith_bit: register = {register}, n = {n}, ith = {ith}\n") exit(1) - + mask = 0xFFFF_FFFF mask = mask >> (ith + n) for i in range(n): mask = mask << 1 - + for i in range(ith): mask = mask << 1 mask |= 1 - + result = register & mask if result > 0xFFFF_FFFF: log_error_parser(f"bad output zero_n_bits_at_ith_bit_of_32bits(register={hex(register)}, n={n}, ith={ith}) = {hex(result)}") @@ -296,7 +296,7 @@ def pindata_to_register_values( # Fetch the bank value then zero out the bits that belong to this pad zeroed_regval = zero_n_bits_at_ith_bit_of_32bits(reg["value"], reg["bits_per_pin"], nth_bit) - + # Prepare mux setting value to be OR'ed into the zeroed out slot data_mask = mux_func << nth_bit @@ -325,7 +325,7 @@ def pindata_to_register_values( nth_pin = pad_idx - reg["first_pad"] nth_bit = nth_pin * reg["bits_per_pin"] - + if pindata.bias_enable: log_normal_parser(f"pad #{pad_idx} have bias enabled, prev reg is {hex(reg["value"])}, ") data_mask = 1 << nth_bit @@ -334,7 +334,7 @@ def pindata_to_register_values( else: log_normal_parser(f"pad #{pad_idx} have bias disabled, prev reg is {hex(reg["value"])}, ") reg["value"] = zero_n_bits_at_ith_bit_of_32bits(reg["value"], reg["bits_per_pin"], nth_bit) - + log_normal_parser(f"after reg is {hex(reg["value"])}\n") if not found: @@ -357,9 +357,9 @@ def pindata_to_register_values( else: log_normal_parser(f"pad #{pad_idx} have pull down, prev reg is {hex(reg["value"])}, ") reg["value"] = zero_n_bits_at_ith_bit_of_32bits(reg["value"], reg["bits_per_pin"], nth_bit) - + log_normal_parser(f"after reg is {hex(reg["value"])}\n") - + if not found: log_error_parser(f"cannot find the pin bank that the port {port} belongs in for bias direction\n") exit(1) @@ -378,8 +378,8 @@ def pindata_to_register_values( ds_val = 3 else: log_error_parser(f"unknown drive strength value of f{pindata.drive_strength} for pad #{pad_idx}\n") - exit(1) - + exit(1) + found = False for reg in ds_registers: if pad_idx >= reg["first_pad"] and pad_idx <= reg["last_pad"]: @@ -390,7 +390,7 @@ def pindata_to_register_values( # Fetch the bank value then zero out the bits that belong to this pad zeroed_regval = zero_n_bits_at_ith_bit_of_32bits(reg["value"], reg["bits_per_pin"], nth_bit) - + # Prepare mux setting value to be OR'ed into the zeroed out slot data_mask = ds_val << nth_bit @@ -491,13 +491,13 @@ def register_values_to_assembler(out_dir: str, peripherals_data: OrderedDict[int log_error_parser("Usage: ") log_error_parser("\tpython3 create_pinmux_setup.py ") exit(1) - + # Parse device tree file soc_name = sys.argv[1] devicetree = dtlib.DT(sys.argv[2], force=True) pinmux_node_name = "pinctrl@" out_dir = sys.argv[3] - + is_dts_compatible(devicetree) enabled_phandles: dict[int, str] = fetch_enabled_devices(devicetree) diff --git a/drivers/pinctrl/meson/odroidc4.py b/drivers/pinctrl/meson/odroidc4.py index f5336dd91..d0d232eaf 100644 --- a/drivers/pinctrl/meson/odroidc4.py +++ b/drivers/pinctrl/meson/odroidc4.py @@ -299,7 +299,7 @@ "pwm_f_x" : pad_to_idx["GPIOX_7"], "pwm_f_h" : pad_to_idx["GPIOH_5"], - # cec_ao + # cec_ao "cec_ao_a_h" : pad_to_idx["GPIOH_3"], "cec_ao_b_h" : pad_to_idx["GPIOH_3"], @@ -322,7 +322,7 @@ "bt565_a_din6" : pad_to_idx["GPIOZ_10"], "bt565_a_din7" : pad_to_idx["GPIOZ_11"], - # tsin_a + # tsin_a "tsin_a_valid" : pad_to_idx["GPIOX_2"], "tsin_a_sop" : pad_to_idx["GPIOX_1"], "tsin_a_din0" : pad_to_idx["GPIOX_0"], @@ -888,13 +888,13 @@ "nand_ce0", "nand_ale", "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_rb0", "emmc_nand_ds", "nand_ce1" ], - + "nor": [ "nor_d", "nor_q", "nor_c", "nor_cs", "nor_hold", "nor_wp" ], - + "sdio": [ "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", "sdio_cmd", "sdio_clk", "sdio_dummy" ], - + "sdcard": [ "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c", "sdcard_clk_c", "sdcard_cmd_c", "sdcard_d0_z", "sdcard_d1_z", "sdcard_d2_z", "sdcard_d3_z", @@ -902,7 +902,7 @@ "spi0": [ "spi0_mosi_c", "spi0_miso_c", "spi0_ss0_c", "spi0_clk_c", "spi0_mosi_x", "spi0_miso_x", "spi0_ss0_x", "spi0_clk_x" ], - + "spi1": [ "spi1_mosi", "spi1_miso", "spi1_ss0", "spi1_clk" ], "i2c0": [ "i2c0_sda_c", "i2c0_sck_c", @@ -912,13 +912,13 @@ "i2c1": [ "i2c1_sda_x", "i2c1_sck_x", "i2c1_sda_h2", "i2c1_sck_h3", "i2c1_sda_h6", "i2c1_sck_h7" ], - + "i2c2": [ "i2c2_sda_x", "i2c2_sck_x", "i2c2_sda_z", "i2c2_sck_z" ], - + "i2c3": [ "i2c3_sda_h", "i2c3_sck_h", "i2c3_sda_a", "i2c3_sck_a" ], - + "uart_a": [ "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts" ], "uart_b": [ "uart_b_tx", "uart_b_rx" ], @@ -937,7 +937,7 @@ "eth_txd0", "eth_txd1", "eth_txen", "eth_mdc", "eth_rxd0", "eth_rxd1", "eth_rx_dv", "eth_mdio", "eth_link_led", "eth_act_led" ], - + "pwm_a": [ "pwm_a" ], "pwm_b": [ "pwm_b_x7", "pwm_b_x19" ], @@ -965,7 +965,7 @@ "tsin_b_valid_z", "tsin_b_sop_z", "tsin_b_din0_z", "tsin_b_clk_z", "tsin_b_fail", "tsin_b_din1", "tsin_b_din2", "tsin_b_din3", "tsin_b_din4", "tsin_b_din5", "tsin_b_din6", "tsin_b_din7" ], - + "hdmitx": [ "hdmitx_sda", "hdmitx_sck", "hdmitx_hpd_in" ], "pdm": [ "pdm_din0_c", "pdm_din1_c", "pdm_din2_c", "pdm_din3_c", @@ -1021,7 +1021,7 @@ "i2c_ao": ["i2c_ao_sck", "i2c_ao_sda", "i2c_ao_sck_e", "i2c_ao_sda_e" ], - + "i2c_ao_slave": [ "i2c_ao_slave_sck", "i2c_ao_slave_sda" ], "remote_ao_input": [ "remote_ao_input" ], @@ -1076,7 +1076,7 @@ "offset": 0xB0 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_1 @@ -1085,7 +1085,7 @@ "offset": 0xB1 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_3 @@ -1094,7 +1094,7 @@ "offset": 0xB3 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_4 @@ -1103,7 +1103,7 @@ "offset": 0xB4 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_5 @@ -1112,7 +1112,7 @@ "offset": 0xB5 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_6 @@ -1121,8 +1121,8 @@ "offset": 0xB6 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 - }, + "value": 0 + }, { # PERIPHS_PIN_MUX_7 "first_pad": pad_to_idx["GPIOZ_8"], @@ -1130,7 +1130,7 @@ "offset": 0xB7 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_9 @@ -1139,7 +1139,7 @@ "offset": 0xB9 * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_B @@ -1148,7 +1148,7 @@ "offset": 0xBB * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_C @@ -1157,7 +1157,7 @@ "offset": 0xBC * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_D @@ -1166,7 +1166,7 @@ "offset": 0xBD * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, { # PERIPHS_PIN_MUX_E @@ -1175,7 +1175,7 @@ "offset": 0xBE * 4, "first_bit": 0, "bits_per_pin": 4, - "value": 0 + "value": 0 }, ] @@ -1462,7 +1462,7 @@ ] ao_bias_enable_registers = [ # These two pseudo registers are the same register, - # which need to be OR'ed together because their effective bits + # which need to be OR'ed together because their effective bits # are not contiguous like other registers... { # AO_RTI_PULL_UP_EN_REG _A diff --git a/drivers/pinctrl/meson/pinctrl.c b/drivers/pinctrl/meson/pinctrl.c index 519f1cef2..171a09595 100644 --- a/drivers/pinctrl/meson/pinctrl.c +++ b/drivers/pinctrl/meson/pinctrl.c @@ -95,7 +95,7 @@ void initialise_ao_chip(void) { uint32_t curr; read_mux(MUX_REG_ADDR(pinctrl_ao_base, ao_registers[i].offset), &curr); sddf_printf_("offset %x, curr = %x, dest = %x\n", ao_registers[i].offset, curr, ao_registers[i].value); - + set_mux(MUX_REG_ADDR(pinctrl_ao_base, ao_registers[i].offset), ao_registers[i].value); } } @@ -121,7 +121,7 @@ void initialise_peripherals_chip(void) { uint32_t curr; read_mux(MUX_REG_ADDR(pinctrl_periphs_base, peripheral_registers[i].offset), &curr); sddf_printf_("offset %x, curr = %x, dest = %x\n", peripheral_registers[i].offset, curr, peripheral_registers[i].value); - + set_mux(MUX_REG_ADDR(pinctrl_periphs_base, peripheral_registers[i].offset), peripheral_registers[i].value); } } @@ -152,8 +152,8 @@ microkit_msginfo protected(microkit_channel ch, microkit_msginfo msginfo) { case SDDF_PINCTRL_READ_MUX: { if (microkit_msginfo_get_count(msginfo) != READ_MUX_REQ_NUM_ARGS) { LOG_DRIVER_ERR( - "Read mux PPC from channel %u does not have the correct number of arguments %lu != %d\n", - ch, + "Read mux PPC from channel %u does not have the correct number of arguments %lu != %d\n", + ch, microkit_msginfo_get_count(msginfo), READ_MUX_REQ_NUM_ARGS ); return microkit_msginfo_new(SDDF_PINCTRL_INVALID_ARGS, 0); diff --git a/drivers/pinctrl/meson/pinctrl_driver.mk b/drivers/pinctrl/meson/pinctrl_driver.mk index 67ebb6a9e..5e74afdb2 100644 --- a/drivers/pinctrl/meson/pinctrl_driver.mk +++ b/drivers/pinctrl/meson/pinctrl_driver.mk @@ -8,7 +8,7 @@ # # NOTES # Generates pinctrl.elf -# Has 4 parameters: +# Has 4 parameters: # SDDF: path to sddf root # PYTHON # DTS_FILE: absolute path to the device tree source file. @@ -26,11 +26,11 @@ ifndef PYTHON $(error PYTHON is not set) endif -ifndef DTS_FILE +ifndef DTS_FILE $(error DTS_FILE is not set) endif -ifndef SOC +ifndef SOC $(error SOC is not set) endif @@ -57,7 +57,7 @@ pinctrl/pinctrl_config_data.o: pinctrl/pinctrl_config_data.s pinctrl/pinctrl_config_data.s: ${DTS_FILE} ${PINCTRL_DIR}/create_pinctrl_config.py ${PYTHON} ${PINCTRL_DIR}/create_pinctrl_config.py ${SOC} ${DTS_FILE} pinctrl -pinctrl: +pinctrl: mkdir -p pinctrl clean:: diff --git a/include/sddf/pinctrl/client.h b/include/sddf/pinctrl/client.h index b05440784..c11b15d5c 100644 --- a/include/sddf/pinctrl/client.h +++ b/include/sddf/pinctrl/client.h @@ -21,9 +21,9 @@ * @param ret_val if the return value is a success, the register value in the device is written to this pointer. */ static inline sddf_pinctrl_response_t sddf_pinctrl_read_mux( - microkit_channel channel, - uint32_t reg_offset, - sddf_pinctrl_chip_idx_t chip, + microkit_channel channel, + uint32_t reg_offset, + sddf_pinctrl_chip_idx_t chip, uint32_t *ret_val) { microkit_mr_set(READ_MUX_REQ_OFFSET, reg_offset);