-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathopcodes.c
1823 lines (1555 loc) · 43 KB
/
opcodes.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#include <opcodes.h>
#include <cb_opcodes.h>
// Operand Methodology Inspired by CTurt
const struct m_sharp_lr35902_instr m_gb_instr[256] = {
{"NOP", 0, m_nop}, // 0x00
{"LD BC, ", 2, m_ld_bc_d16}, // 0x01
{NULL, 0, NULL}, // 0x02
{NULL, 0, NULL}, // 0x03
{"INC B", 0, m_inc_b}, // 0x04
{"DEC B", 0, m_dec_b}, // 0x05
{"LD B, ", 1, m_ld_b_d8}, // 0x06
{NULL, 0, NULL}, // 0x07
{NULL, 0, NULL}, // 0x08
{NULL, 0, NULL}, // 0x09
{NULL, 0, NULL}, // 0x0A
{"DEC BC", 0, m_dec_bc}, // 0x0B
{"INC C", 0, m_inc_c}, // 0x0C
{"DEC C", 0, m_dec_c}, // 0x0D
{"LD C, ", 1, m_ld_c_d8}, // 0x0E
{NULL, 0, NULL}, // 0x0F
{NULL, 0, NULL}, // 0x10
{"LD DE, ", 2, m_ld_de_d16}, // 0x11
{"LD (DE), A", 0, m_ld_par_de_a}, // 0x12
{"INC DE", 0, m_inc_de}, // 0x13
{NULL, 0, NULL}, // 0x14
{"DEC D", 0, m_dec_d}, // 0x15
{"LD D, ", 1, m_ld_d_d8}, // 0x16
{"RLA", 0, m_rla}, // 0x17
{"JR ", 1, m_jr_s8}, // 0x18
{"ADD HL, DE", 0, m_add_hl_de}, // 0x19
{"LD A, (DE)", 0, m_ld_a_de}, // 0x1A
{NULL, 0, NULL}, // 0x1B
{NULL, 0, NULL}, // 0x1C
{"DEC E", 0, m_dec_e}, // 0x1D
{"LD E, ", 1, m_ld_e_d8}, // 0x1E
{NULL, 0, NULL}, // 0x1F
{"JR NZ, ", 1, m_jr_nz_s8}, // 0x20
{"LD HL, ", 2, m_ld_hl_d16}, // 0x21
{"LD (HL+), A", 0, m_ld_hlplus_a}, // 0x22
{"INC HL", 0, m_inc_hl}, // 0x23
{"INC H", 0, m_inc_h}, // 0x24
{NULL, 0, NULL}, // 0x25
{NULL, 0, NULL}, // 0x26
{NULL, 0, NULL}, // 0x27
{"JR Z, ", 1, m_jr_z_s8}, // 0x28
{NULL, 0, NULL}, // 0x29
{"LD A, (HL+)", 0, m_ld_a_hlplusp}, // 0x2A
{NULL, 0, NULL}, // 0x2B
{NULL, 0, NULL}, // 0x2C
{NULL, 0, NULL}, // 0x2D
{"LD L, ", 1, m_ld_l_d8}, // 0x2E
{"CPL", 0, m_cpl}, // 0x2F
{NULL, 0, NULL}, // 0x30
{"LD SP, ", 2, m_ld_sp_d16}, // 0x31
{"LD (HL-), A", 0, m_ld_hlminus_a}, // 0x32
{NULL, 0, NULL}, // 0x33
{NULL, 0, NULL}, // 0x34
{NULL, 0, NULL}, // 0x35
{"LD (HL), ", 1, m_ld_hlp_d8}, // 0x36
{NULL, 0, NULL}, // 0x37
{NULL, 0, NULL}, // 0x38
{NULL, 0, NULL}, // 0x39
{NULL, 0, NULL}, // 0x3A
{NULL, 0, NULL}, // 0x3B
{NULL, 0, NULL}, // 0x3C
{"DEC A", 0, m_dec_a}, // 0x3D
{"LD A, ", 1, m_ld_a_d8}, // 0x3E
{NULL, 0, NULL}, // 0x3F
{NULL, 0, NULL}, // 0x40
{NULL, 0, NULL}, // 0x41
{NULL, 0, NULL}, // 0x42
{NULL, 0, NULL}, // 0x43
{NULL, 0, NULL}, // 0x44
{NULL, 0, NULL}, // 0x45
{NULL, 0, NULL}, // 0x46
{"LD B, A", 0, m_ld_b_a}, // 0x47
{NULL, 0, NULL}, // 0x48
{NULL, 0, NULL}, // 0x49
{NULL, 0, NULL}, // 0x4A
{NULL, 0, NULL}, // 0x4B
{NULL, 0, NULL}, // 0x4C
{NULL, 0, NULL}, // 0x4D
{NULL, 0, NULL}, // 0x4E
{"LD C, A", 0, m_ld_c_a}, // 0x4F
{NULL, 0, NULL}, // 0x50
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"LD D, (HL)", 0, m_ld_d_parhl}, // 0x00
{"LD D, A", 0, m_ld_d_a}, // 0x57
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"LD E, (HL)", 0, m_ld_e_parhl}, // 0x5E
{"LD E, A", 0, m_ld_e_a}, // 0x5F
{NULL, 0, NULL}, // 0x60
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"LD H, A", 0, m_ld_h_a}, // 0x67
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x6F
{NULL, 0, NULL}, // 0x70
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"LD (HL), A", 0, m_ld_hl_a}, // 0x77
{"LD A, B", 0, m_ld_a_b}, // 0x78
{"LD A, C", 0, m_ld_a_c}, // 0x79
{NULL, 0, NULL}, // 0x00
{"LD A, E", 0, m_ld_a_e}, // 0x7B
{"LD A, H", 0, m_ld_a_h}, // 0x7C
{"LD A, L", 0, m_ld_a_l}, // 0x7D
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x7F
{NULL, 0, NULL}, // 0x80
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"ADD A, (HL)", 0, m_add_a_phl}, // 0x86
{"ADD A, A", 0, m_add_a_a}, // 0x87
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x8F
{"SUB B", 0, m_sub_b}, // 0x90
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x9F
{NULL, 0, NULL}, // 0xA0
{"AND C", 0, m_and_c}, // 0xA1
{NULL, 0, NULL}, // 0xA2
{NULL, 0, NULL}, // 0xA3
{NULL, 0, NULL}, // 0xA4
{NULL, 0, NULL}, // 0xA5
{NULL, 0, NULL}, // 0xA6
{NULL, 0, NULL}, // 0xA7
{NULL, 0, NULL}, // 0xA8
{"XOR C", 0, m_xor_c}, // 0xA9
{NULL, 0, NULL}, // 0xAB
{NULL, 0, NULL}, // 0xAC
{NULL, 0, NULL}, // 0xAD
{NULL, 0, NULL}, // 0xAF
{NULL, 0, NULL}, // 0x00
{"XOR A", 0, m_xor_a}, // 0xAF
{"OR B", 0, m_or_b}, // 0xB0
{"OR C", 0, m_or_c}, // 0xB1
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"CP (HL)", 0, m_cp_hl}, // 0xBE
{NULL, 0, NULL}, // 0xBF
{NULL, 0, NULL}, // 0xC0
{"POP BC", 0, m_pop_bc}, // 0xC1
{NULL, 0, NULL}, // 0xC2
{"JP ", 2, m_jp_a16}, // 0xC3
{"CALL NZ, a16", 2, m_call_nz_a16}, // 0xC4
{"PUSH BC", 0, m_push_bc}, // 0xC5
{NULL, 0, NULL}, // 0xC6
{NULL, 0, NULL}, // 0xC7
{NULL, 0, NULL}, // 0xC8
{"RET", 0, m_ret}, // 0xC9
{NULL, 0, NULL}, // 0xCA
{"CB ", 1, m_cb_ext}, // 0xCB
{NULL, 0, NULL}, // 0xCC
{"CALL ", 2, m_call}, // 0xCD
{NULL, 0, NULL}, // 0xCE
{NULL, 0, NULL}, // 0xCF
{NULL, 0, NULL}, // 0xD0
{NULL, 0, NULL}, // 0xD1
{NULL, 0, NULL}, // 0xD2
{NULL, 0, NULL}, // 0xD3
{NULL, 0, NULL}, // 0xD4
{"PUSH DE", 0, m_push_de}, // 0xD5
{NULL, 0, NULL}, // 0xD6
{NULL, 0, NULL}, // 0xD7
{NULL, 0, NULL}, // 0xD8
{NULL, 0, NULL}, // 0xD9
{NULL, 0, NULL}, // 0xDA
{NULL, 0, NULL}, // 0xDB
{NULL, 0, NULL}, // 0xDC
{NULL, 0, NULL}, // 0xDD
{NULL, 0, NULL}, // 0xDE
{NULL, 0, NULL}, // 0xDF
{"LD (a8), A -> a8: ", 1, m_ld_a8_a}, // 0xE0
{"POP HL", 0, m_pop_hl}, // 0xE1
{"LD (C), A", 0, m_ld_cpar_a}, // 0xE2
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"AND (d8) -> d8: ", 1, m_and_d8}, // 0xE6
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"JP HL", 0, m_jp_hl}, // 0xE9
{"LD (a16), A -> a16: ", 2, m_ld_a16_a}, // 0xEA
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"RST 5", 0, m_rst_5}, // 0xEF
{"LD A, (a8) -> a8: ", 1, m_ld_a_a8}, // 0xF0
{NULL, 0, NULL}, // 0xF1
{NULL, 0, NULL}, // 0xF2
{"DI", 0, m_di}, // 0xF3
{NULL, 0, NULL}, // 0x04
{NULL, 0, NULL}, // 0x05
{"OR d8 -> d8", 1, m_or_d8}, // 0xF6
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0xF9
{"LD A, (a16)", 2, m_ld_a_par_a16}, // 0xFA
{"EI", 0, m_ei}, // 0xFB
{NULL, 0, NULL}, // 0x00
{NULL, 0, NULL}, // 0x00
{"CP ", 1, m_cp_d8}, // 0xFE
{NULL, 0, NULL} // 0xFF
};
/*
NOP
Opcode: 0x00
Number of Bytes: 1
Number of Cycles: 1
Only advances the program counter by 1. Performs no other operations that would have an effect.
*/
void m_nop(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mNOP\033[1;0m\n");
#endif
PC += 1;
}
/*
LD BC, d16
Opcode: 0x01
Number of Bytes: 3
Number of Cycles: 3
Load the 2 bytes of immediate data into register pair BC.
The first byte of immediate data is the lower byte (i.e., bits 0-7),
and the second byte of immediate data is the higher byte (i.e., bits 8-15).
*/
void m_ld_bc_d16(m_dmg_t *m_dmg, uint16_t m_d16)
{
BC = m_d16;
PC += 3;
}
/*
INC B
Opcode: 0x04
Number of Bytes: 1
Number of Cycles: 1
Increment the contents of register B by 1.
*/
void m_inc_b(m_dmg_t *m_dmg)
{
// Increment B by 1
INC(B_REG);
// Increment program counter by 1 (Byte)
PC++;
}
/*
DEC B
Opcode: 0x05
Number of Bytes: 1
Number of Cycles: 1
Decrement the contents of register B by 1.
*/
void m_dec_b(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mDEC B\033[1;0m\n");
#endif
// Decrement B register by 1
B_REG = DEC(B_REG);
PC++;
}
/*
LD B, d8
Opcode: 0x06
Number of Bytes: 2
Number of Cycles: 2
Load the 8-bit immediate operand d8 into register B.
*/
void m_ld_b_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD B, $%04X\033[1;0m\n", m_d8);
#endif
B_REG = m_d8;
PC += 2;
}
/*
DEC BC
Opcode: 0x0B
Number of Bytes: 1
Number of Cycles: 2
Decrement the contents of register pair BC by 1.
*/
void m_dec_bc(m_dmg_t *m_dmg)
{
BC--;
PC++;
}
/*
INC C
Opcode: 0x0C
Number of Bytes: 1
Number of Cycles: 1
Increment the contents of register C by 1.
*/
void m_inc_c(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mINC C\033[1;0m\n");
#endif
// Increment C by 1
INC(C);
PC += 1;
}
/*
DEC C
Opcode: 0x0D
Number of Bytes: 1
Number of Cycles: 1
Increment the contents of register C by 1.
*/
void m_dec_c(m_dmg_t *m_dmg)
{
// Decrement C register by 1
DEC(C);
PC++;
}
/*
LD C, d8
Opcode: 0x0E
Number of Bytes: 2
Number of Cycles: 2
Load the 8-bit immediate operand d8 into register C.
*/
void m_ld_c_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD (C), $%04X\033[1;0m\n", m_d8);
#endif
C = m_d8;
PC += 2;
}
/*
LD DE, d16
Opcode: 0x11
Number of Bytes: 3
Number of Cycles: 3
Load the 2 bytes of immediate data into register pair DE.
The first byte of immediate data is the lower byte (i.e., bits 0-7),
and the second byte of immediate data is the higher byte (i.e., bits 8-15).
*/
void m_ld_de_d16(m_dmg_t *m_dmg, uint16_t m_d16)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD DE, $%04X\033[1;0m\n", m_d16);
#endif
DE = m_d16;
PC += 3;
}
/*
LD (DE), A
Number of Bytes: 1
Number of Cycles: 2
Store the contents of register A in the memory location specified by register pair DE.
*/
void m_ld_par_de_a(m_dmg_t *m_dmg)
{
WRITEB(DE, A_REG);
PC++;
}
/*
INC DE
Opcode: 0x13
Number of Bytes: 1
Number of Cycles: 2
Increment the contents of register pair DE by 1.
*/
void m_inc_de(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mINC DE\033[1;0m\n");
#endif
DE++;
PC++;
}
/*
DEC D
Opcode: 0x15
Number of Bytes: 1
Number of Cycles: 1
Decrement the contents of register D by 1.
*/
void m_dec_d(m_dmg_t *m_dmg)
{
// Decrement D register by 1
DEC(D);
PC++;
}
/*
LD D, d8
Opcode: 0x16
Number of Bytes: 2
Number of Cycles: 2
Load the 8-bit immediate operand d8 into register D.
*/
void m_ld_d_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
D = m_d8;
PC += 2;
}
/*
RLA
Opcode: 0x17
Number of Bytes: 1
Number of Cycles: 1
Rotate the contents of register A to the left, through the carry (CY) flag.
That is, the contents of bit 0 are copied to bit 1, and the previous contents
of bit 1 (before the copy operation) are copied to bit 2.
The same operation is repeated in sequence for the rest of the register.
The previous contents of the carry flag are copied to bit 0.
*/
void m_rla(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mRLA\033[1;0m\n");
#endif
uint8_t carry = (uint8_t) FLAG_CHECK(CRRY);
#ifdef PREC23
if (A_REG & 0x40)
#else
if (A_REG & 0b1000000)
#endif
{
FLAG_SET(CRRY);
} else {
FLAG_UNSET(CRRY);
}
A_REG <<= 1;
A_REG += carry;
FLAG_UNSET(NGTV);
FLAG_UNSET(ZERO);
FLAG_UNSET(HALF);;
PC += 1;
}
/*
JR s8
Opcode: 0x18
Number of Bytes: 2
Number of Cycles: 3
Jump s8 steps from the current address in the program counter (PC). (Jump relative.)
*/
void m_jr_s8(m_dmg_t *m_dmg, int8_t m_s8)
{
PC += 2;
PC += (int8_t) m_s8;
}
/*
ADD HL, DE
Opcode: 0x19
Number of Bytes: 1
Number of Cycles: 2
Add the contents of register pair DE to the contents of register pair HL, and
store the results in register pair HL.
*/
void m_add_hl_de(m_dmg_t *m_dmg)
{
word_addition(m_dmg, &HL, DE);
PC++;
}
/*
LD A, (DE)
Opcode: 0x1A
Number of Bytes: 1
Number of Cycles: 2
Load the 8-bit contents of memory specified by register pair DE into register A.
*/
void m_ld_a_de(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD A, (DE)\033[1;0m\n");
#endif
A_REG = READB(DE);
PC += 1;
}
/*
DEC E
Opcode: 0x1D
Number of Bytes: 1
Number of Cycles: 1
Decrement the contents of register E by 1.
*/
void m_dec_e(m_dmg_t *m_dmg)
{
// Decrement E register by 1
DEC(E);
PC++;
}
/*
LD E, d8
Opcode: 0x1E
Number of Bytes: 2
Number of Cycles: 2
Load the 8-bit immediate operand d8 into register E.
*/
void m_ld_e_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
E = m_d8;
PC += 2;
}
/*
JR NZ, s8
Opcode: 0x20
Number of Bytes: 2
Number of Cycles: 3/2
If the Z flag is 0, jump s8 steps from the current address stored in the program counter (PC).
If not, the instruction following the current JP instruction is executed (as usual).
*/
void m_jr_nz_s8(m_dmg_t *m_dmg, int8_t m_s8)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mJR NZ, $%04hhX\033[1;0m\n", m_s8);
printf("Operand: 0x%X\n", (uint8_t) m_s8);
#endif
if (FLAG_CHECK(ZERO))
{
PC += 2;
}
else
{
// Set the PC Offset at the end of the JR NZ, s8
PC += 2;
// Add m_operand as an int8_t (Can go forward or backward)
PC += (int8_t) m_s8;
}
}
/*
LD HL, d16
Opcode: 0x21
Number of Bytes: 3
Number of Cycles: 3
Load the 2 bytes of immediate data into register pair HL.
The first byte of immediate data is the lower byte (i.e., bits 0-7),
and the second byte of immediate data is the higher byte (i.e., bits 8-15).
*/
void m_ld_hl_d16(m_dmg_t *m_dmg, uint16_t m_d16)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD HL, $%04X\033[1;0m\n", m_d16);
#endif
#ifdef OPCODE_DEBUG
printf("Address: 0x%04X\n", m_d16);
#endif
L = (m_d16 & 0xFF);
H = (m_d16 >> 8);
PC += 3;
}
/*
LD (HL+), A
Opcode: 0x22
Number of Bytes: 1
Number of Cycles: 2
Store the contents of register A into the memory location specified
by register pair HL, and simultaneously increment the contents of HL.
*/
void m_ld_hlplus_a(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD (HL+), A\033[1;0m\n");
#endif
HL++;
WRITEB(HL, A_REG);
PC++;
}
/*
INC HL
Opcode: 0x23
Number of Bytes: 1
Number of Cycles: 2
Increment the contents of register pair HL by 1.
*/
void m_inc_hl(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mINC HL\033[1;0m\n");
#endif
HL++;
PC++;
}
/*
INC H
Opcode: 0x24
Number of Bytes: 1
Number of Cycles: 1
Increment the contents of register H by 1.
*/
void m_inc_h(m_dmg_t *m_dmg)
{
// Increment H by 1
INC(H);
PC++;
}
/*
JR Z, s8
Opcode: 0x28
Number of Bytes: 2
Number of Cycles: 3/2
If the Z flag is 1, jump s8 steps from the current address stored in the
program counter (PC). If not, the instruction following the current JP
instruction is executed (as usual).
*/
void m_jr_z_s8(m_dmg_t *m_dmg, int8_t m_s8)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mJR Z, $%04hhX\033[1;0m\n", m_s8);
printf("Operand: 0x%X\n", (uint8_t) m_s8);
#endif
if (FLAG_CHECK(ZERO))
{
// Add m_operand as an int8_t (Can go forward or backward)
PC += (int8_t) m_s8;
}
PC += 2;
}
/*
LD A, (HL+)
Opcode: 0x2A
Number of Bytes: 1
Number of Cycles: 2
Load the contents of memory specified by register pair HL into register A, and simultaneously increment the contents of HL.
*/
void m_ld_a_hlplusp(m_dmg_t *m_dmg)
{
HL++;
A_REG = READB(HL);
PC++;
}
/*
LD L, d8
Opcode: 0x2E
Number of Bytes: 2
Number of Cycles: 2
Load the 8-bit immediate operand d8 into register L.
*/
void m_ld_l_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
L = m_d8;
PC += 2;
}
/*
CPL
Opcode: 0x2F
Number of Bytes: 1
Number of Cycles: 1
Take the one's complement (i.e., flip all bits) of the contents of register A.
*/
void m_cpl(m_dmg_t *m_dmg)
{
A_REG = ~A_REG;
PC++;
}
/*
LD SP, d16
Opcode: 0x31
Number of Bytes: 3
Number of Cycles: 3
Load the 2 bytes of immediate data into register pair SP.
The first byte of immediate data is the lower byte (i.e., bits 0-7),
and the second byte of immediate data is the higher byte (i.e., bits 8-15).
*/
void m_ld_sp_d16(m_dmg_t *m_dmg, uint16_t m_d16)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD SP, $%04X\033[1;0m\n", m_d16);
#endif
SP = m_d16;
#ifdef OPCODE_DEBUG
printf("Obtained Address: 0x%X\n", m_d16);
#endif
PC += 3;
}
/*
LD (HL-), A
Opcode: 0x32
Number of Bytes: 1
Number of Cycles: 2
Store the contents of register A into the memory location specified
by register pair HL, and simultaneously decrement the contents of HL.
*/
void m_ld_hlminus_a(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD (HL-), A\033[1;0m\n");
#endif
WRITEB(HL, A_REG);
HL--;
PC += 1;
}
/*
LD (HL), d8
Opcode: 0x36
Number of Bytes: 2
Number of Cycles: 3
Store the contents of 8-bit immediate operand d8 in the memory location specified by register pair HL.
*/
void m_ld_hlp_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
WRITEB(HL, m_d8);
PC += 2;
}
/*
DEC A
Opcode: 0x3D
Number of Bytes: 1
Number of Cycles: 1
Decrement the contents of register A by
*/
void m_dec_a(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mDEC A\033[1;0m\n");
#endif
// Decrement A register by 1
DEC(A_REG);
PC++;
}
/*
LD A, d8
Opcode: 0x3E
Number of Bytes: 2
Number of Cycles: 2
Load the 8-bit immediate operand d8 into register A.
*/
void m_ld_a_d8(m_dmg_t *m_dmg, uint8_t m_d8)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD (A), $%04X\033[1;0m\n", m_d8);
#endif
A_REG = m_d8;
PC += 2;
}
/*
LD B, A
Opcode: 0x47
Number of Bytes: 1
Number of Cycles: 1
Load the contents of register A into register B.
*/
void m_ld_b_a(m_dmg_t *m_dmg)
{
B_REG = A_REG;
PC++;
}
/*
LD C, A
Opcode: 0x4F
Number of Bytes: 1
Number of Cycles: 1
Load the contents of register A into register C.
*/
void m_ld_c_a(m_dmg_t *m_dmg)
{
#ifdef OPCODE_DEBUG
printf("\033[1;31mLD C, A\033[1;0m\n");
#endif
C = A_REG;
PC += 1;
}
/*
LD D, (HL)
Opcode: 0x56
Number of Bytes: 1
Number of Cycles: 2
Load the 8-bit contents of memory specified by register pair HL into register D.
*/
void m_ld_d_parhl(m_dmg_t *m_dmg)
{
D = READB(HL);
PC++;
}
/*
LD D, A
Opcode: 0x57
Number of Bytes: 1
Number of Cycles: 1
Load the contents of register A into register D.
*/
void m_ld_d_a(m_dmg_t *m_dmg)
{
D = A_REG;
PC += 1;
}
/*
LD E, (HL)
Opcode: 0x5E
Number of Bytes: 1
Number of Cycles: 2
Load the 8-bit contents of memory specified by register pair HL into register E.
*/
void m_ld_e_parhl(m_dmg_t *m_dmg)
{
E = READB(HL);
PC++;
}
/*
LD E, A
Opcode: 0x5F
Number of Bytes: 1
Number of Cycles: 1
Load the contents of register A into register E.
*/
void m_ld_e_a(m_dmg_t *m_dmg)
{
E = A_REG;
PC += 1;
}
/*
LD H, A
Opcode: 0x67
Number of Bytes: 1
Number of Cycles: 1
Load the contents of register A into register H.
*/
void m_ld_h_a(m_dmg_t *m_dmg)
{
H = A_REG;
PC++;
}