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<code>comb-prop</code> pass incorrectly inlines and elides assignment

C: calyx-optOptimization or analysis passOptimization or analysis pass

good first issueGood issue to start contributing on CalyxGood issue to start contributing on Calyx

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2437 In calyxir/calyx;

· Demindiro opened on Mar 28, 2025

Static promotion doesn't preserve semantics for shared resource dones on consecutive groups

C: calyx-optOptimization or analysis passOptimization or analysis pass

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2349 In calyxir/calyx;

· ayakayorihiro opened on Nov 12, 2024

[YXI] YXI AXI Wrapper Does Not Copy Over Components Other Than Main

AMCNeeded for Andrew's memory compilerNeeded for Andrew's memory compiler

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2290 In calyxir/calyx;

· andrewb1999 opened on Sep 26, 2024

Combinational loops created when <code>invoke</code>d component has single group in control sequence

S: Discussion neededIssues blocked on discussionIssues blocked on discussion

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2198 In calyxir/calyx;

· nathanielnrn opened on Jul 5, 2024

Incomplete subtyping check on cells

C: CalyxExtension or change to the Calyx ILExtension or change to the Calyx IL

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2123 In calyxir/calyx;

· nathanielnrn opened on Jun 10, 2024

Unexpected behavior with reading from <code>seq_mem</code> reference and <code>invoke</code>

C: CalyxExtension or change to the Calyx ILExtension or change to the Calyx IL

C: calyx-pyItems that have to do with the builder libraryItems that have to do with the builder library

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2117 In calyxir/calyx;

· polybeandip opened on Jun 6, 2024

Produce separate AXI channels for every memory in a Calyx program

C: FPGAChanges for the FPGA backendChanges for the FPGA backend

Type: BugBug in the implementationBug in the implementation

Status: Open.

#2097 In calyxir/calyx;

· nathanielnrn opened on Jun 5, 2024

Components that do a single read/write to a <code>seq_mem</code> generate circular combinational logic

C: CalyxExtension or change to the Calyx ILExtension or change to the Calyx IL

Type: BugBug in the implementationBug in the implementation

Status: Open.

#1963 In calyxir/calyx;

· nathanielnrn opened on Mar 9, 2024

Toplevel <code>ref</code> cells interfere with static promotion

C: CalyxExtension or change to the Calyx ILExtension or change to the Calyx IL

Type: BugBug in the implementationBug in the implementation

Status: Open.

#1956 In calyxir/calyx;

· ayakayorihiro opened on Mar 4, 2024

<code>seq-mem</code> outputs <code>x</code>s when not explicitly assigning to <code>write_en</code>

Type: BugBug in the implementationBug in the implementation

Status: Open.

#1955 In calyxir/calyx;

· nathanielnrn opened on Mar 4, 2024

Fud changes current working directory to an invalid value

C: fudCalyx DriverCalyx Driver

Type: BugBug in the implementationBug in the implementation

Status: Open.

#1761 In calyxir/calyx;

· UnsignedByte opened on Nov 7, 2023

xclrun.py does not correctly handle fixedpoint programs.

C: FPGAChanges for the FPGA backendChanges for the FPGA backend

Type: BugBug in the implementationBug in the implementation

Status: Open.

#1721 In calyxir/calyx;

· nathanielnrn opened on Sep 9, 2023