From 73f3a406ad539128deffbc782b6112b3518e26e3 Mon Sep 17 00:00:00 2001 From: Mugundhan V Date: Tue, 24 Dec 2024 12:24:33 +0100 Subject: [PATCH] changes to bi_real_unscr_(2/4x)_init and coeff_gen_init.m to fix block generation errors --- casper_library/bi_real_unscr_2x_init.m | 2 +- casper_library/bi_real_unscr_4x_init.m | 2 +- casper_library/coeff_gen_init.m | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/casper_library/bi_real_unscr_2x_init.m b/casper_library/bi_real_unscr_2x_init.m index 5f3cf3d91..d76f0f9fa 100644 --- a/casper_library/bi_real_unscr_2x_init.m +++ b/casper_library/bi_real_unscr_2x_init.m @@ -188,7 +188,7 @@ function bi_real_unscr_2x_init(blk, varargin) 'load_pin', 'off', ... 'rst', 'on', ... 'en', async, ... - 'explicit_period', 'on', ... + 'explicit_period', 'explicit', ... 'period', '1', ... 'use_behavioral_HDL', 'on', ... 'implementation', 'Fabric');... diff --git a/casper_library/bi_real_unscr_4x_init.m b/casper_library/bi_real_unscr_4x_init.m index ce8d1d4fe..52c87bfc5 100644 --- a/casper_library/bi_real_unscr_4x_init.m +++ b/casper_library/bi_real_unscr_4x_init.m @@ -264,7 +264,7 @@ function bi_real_unscr_4x_init(blk, varargin) 'load_pin', 'off', ... 'rst', 'on', ... 'en', async, ... - 'explicit_period', 'on', ... + 'explicit_period', 'Explicit', ... 'period', '1', ... 'use_behavioral_HDL', 'on', ... 'implementation', 'Fabric');... diff --git a/casper_library/coeff_gen_init.m b/casper_library/coeff_gen_init.m index 3fa1ac89f..0802efcd2 100644 --- a/casper_library/coeff_gen_init.m +++ b/casper_library/coeff_gen_init.m @@ -581,8 +581,7 @@ function coeff_gen_init(blk, varargin) else, if strcmp(async, 'off'), %if StepPeriod 0 but no enable, then create constant to enable always - reuse_block(blk, 'en', 'xbsIndex_r4/Constant', ... - '',... + reuse_block(blk, 'en', 'xbsIndex_r4/Constant', ... 'gui_display_data_type', 'Boolean', 'arith_type', 'Boolean', ... 'const', '1', 'explicit_period', 'on', 'period', '1', ... 'Position', [205 44 260 66]);