diff --git a/verilog/analysis/symbol_table.cc b/verilog/analysis/symbol_table.cc
index 43228488d..5e547c83c 100644
--- a/verilog/analysis/symbol_table.cc
+++ b/verilog/analysis/symbol_table.cc
@@ -2017,7 +2017,12 @@ static void ResolveReferenceComponentNode(
   switch (component.ref_type) {
     case ReferenceType::kUnqualified: {
       // root node: lookup this symbol from its context upward
-      CHECK(node->Parent() == nullptr);
+      if (node->Parent() != nullptr) {
+        // TODO(hzeller): Is this a situation that should never happen thus
+        // be dealt with further up-stream ? (changed from a CHECK()).
+        LOG(WARNING) << *node << ": Parent exists " << *node->Parent() << "\n";
+        return;
+      }
       ResolveUnqualifiedName(&component, context, diagnostics);
       break;
     }