it6604.cccccccccccccccccccccc

/* it6604.c
 *
 * Copyright (c) 2009 Hisilicon Co., Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program;
 *
 * 2010-02-12  Modify value of SHARPNESS Control Register[0x03] from 0x19 to 0x11, Hisilicon BVT MPP.
 * 2010-03-01  Modify value of Vertical Delay Register to 0x17, And add some interface, Hisilicon BVT MPP.
 * 2010-04-16  Output ranges are limited to 16~235 for Y and 16~239 for CbCr,to fit Hi3520/Hi3515 VIU. Hisilicon BVT MPP.
 * 2010-07-23  Add function for setting audio format. Hisilicon BVT MPP.
 */


#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/fcntl.h>
#include <linux/mm.h>
#include <linux/miscdevice.h>
#include <linux/proc_fs.h>



#include <linux/kthread.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/mm.h>
#include <linux/major.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/cdev.h>
#include <linux/proc_fs.h> 
#include <asm/uaccess.h>



#include <linux/fs.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <asm/uaccess.h>
//#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/system.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/string.h>
#include <linux/list.h>
//#include <asm/semaphore.h>
#include <asm/delay.h>
#include <linux/timer.h>
#include <linux/delay.h>
#include <linux/proc_fs.h>
#include <linux/poll.h>
//#include <asm/hardware.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/irq.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>

#include "gpio_i2c.h"
//#include "gpio_i2c1.h"

//#include "it6604_def.h"
#include "it6604.h"


static int norm = IT6604_PAL;

static int chips = 2;

#define IT6604A_I2C_ADDR 	0x90
#define IT6604B_I2C_ADDR 	0x92
#define IT6604C_I2C_ADDR 	0x52
#define IT6604D_I2C_ADDR 	0x56

#ifdef hi3515
unsigned char it6604_i2c_addr[] = {0x50, 0x52};
#else
unsigned char it6604_i2c_addr[] = { IT6604A_I2C_ADDR, 
                                    IT6604B_I2C_ADDR,
									};
#endif
/************************************************************************
zhouhua add this
************************************************************************/
#include "hdmirx.h"

void zhou_hdmi_init()
{
	BOOL bOldSignal, bChangeMode ;
	hdmirx_clear_hpd();
	InitHDMIRX(TRUE);
	hdmirx_set_hpd();
	Check_HDMInterrupt();
	bSignal = CheckHDMIRX();
	start_vdin(getHDMIRXHorzActive(), getHDMIRXVertActive(), 10000, IsHDMIRXInterlace());
}
void zhou_hdmi_exit()
{
	PowerDownHDMI();
}
BYTE HDMIRX_ReadI2C_Byte(BYTE RegAddr);
SYS_STATUS HDMIRX_WriteI2C_Byte(BYTE RegAddr, BYTE Data);
SYS_STATUS HDMIRX_ReadI2C_ByteN(BYTE RegAddr, BYTE *pData, int N);
SYS_STATUS HDMIRX_WriteI2C_ByteN(BYTE RegAddr, BYTE *pData, int N);









/***********************************************************************
zhouhua end
***********************************************************************/
 
#define IT6604_I2C_ADDR(chip_id)    (it6604_i2c_addr[chip_id])
#define IT6604_INVALID_CHIPID(ChnNo) ((ChnNo) >= chips)

static unsigned char it6604_byte_write(unsigned char chip_addr,
										     unsigned char addr     , 
										     unsigned char data     ) 
{

#if 0

#ifndef HI_FPGA
    gpio_i2c_write(chip_addr,addr,data);
#else
   
    if (IT6604A_I2C_ADDR == chip_addr || IT6604B_I2C_ADDR == chip_addr)
    {
        gpio_i2c_write(chip_addr,addr,data);
    }
    else
    {
        gpio_i2c1_write(chip_addr,addr,data);
    }
    
#endif
#else
    gpio_i2c_write(chip_addr,addr,data);

#endif


	return 0;
}
SYS_STATUS HDMIRX_WriteI2C_Byte(BYTE RegAddr, BYTE Data)
{
	gpio_i2c_write(IT6604A_I2C_ADDR,RegAddr,Data);		
}
SYS_STATUS HDMIRX_WriteI2C_ByteN(BYTE RegAddr, BYTE *pData, int N)
{
	int i;
	for(i=0;i<N;i++){
		HDMIRX_WriteI2C_Byte(RegAddr+i, *(pData+i));
	}
	return 0;
}
static unsigned char it6604_byte_read(unsigned char chip_addr, unsigned char addr)
{

#if 0
#ifndef HI_FPGA
    return gpio_i2c_read(chip_addr,addr);
#else
    if (IT6604A_I2C_ADDR == chip_addr || IT6604B_I2C_ADDR == chip_addr)
    {
        return gpio_i2c_read(chip_addr,addr);
    }
    else
    {
        return gpio_i2c1_read(chip_addr,addr);
    }
#endif	

#else
    return gpio_i2c_read(chip_addr,addr);
#endif
}
BYTE HDMIRX_ReadI2C_Byte(BYTE RegAddr)
{
	return gpio_i2c_read(IT6604A_I2C_ADDR,RegAddr);
}
SYS_STATUS HDMIRX_ReadI2C_ByteN(BYTE RegAddr, BYTE *pData, int N)
{
	int i;
	for(i=0;i<N;i++){
		*(pData+i) = HDMIRX_ReadI2C_Byte(RegAddr+i);
	}
	return 0;
}
static void it6604_write_table(unsigned char chip_addr,
		unsigned char addr, unsigned char *tbl_ptr, unsigned char tbl_cnt)
{
	unsigned char i = 0;
	
	for(i = 0; i < tbl_cnt; i ++)
	{
		it6604_byte_write(chip_addr, (addr + i), *(tbl_ptr + i));
	}
}


#if 0
static void it6604_read_table(unsigned char chip_addr,
						unsigned char addr, unsigned char reg_num)
{
	unsigned char i = 0, temp = 0;
	
	for(i = 0; i < reg_num; i++ )
	{
		temp = it6604_byte_read(chip_addr, addr + i);
		printk("reg 0x%02x=0x%02x,", addr + i, temp);
		if(((i + 1) % 4) == 0)
		{
			printk("\n");
		}
	}
}
#endif


int it6604_open(struct inode * inode, struct file * file)
{
	return 0;
} 

int it6604_close(struct inode * inode, struct file * file)
{
	return 0;
}

static int it6604_set_work_mode_1d1(unsigned chip_addr, unsigned char ch)
{
    /* Video Channel Output Control*/
    /* One Channel ITU0R BT.656 */
    it6604_byte_write(chip_addr, 0xca, 0x00);    

    /* Output Enable Control and Clock Output Control */
    /* CLKN O1 27M */ 
    it6604_byte_write(chip_addr, 0xfa, 0x40);
    printk("it6604 0x%x set to 1d1 mode ok\n", chip_addr);
    return 0;
}

static int it6604_set_work_mode_4d1(unsigned chip_addr, unsigned char ch)
{
    /* Video Channel Output Control*/
    /* Four Channel ITU0R BT.656 Time-multiplexed format output*/
    it6604_byte_write(chip_addr, 0xca, 0xaa);    

    /* Output Enable Control and Clock Output Control */
    /* 108MHz clock output*/
    it6604_byte_write(chip_addr, 0xfa, 0x4a);
    
    printk("it6604 0x%x set to 4d1 mode ok\n", chip_addr);
    return 0;
}

static int it6604_set_work_mode_2d1(unsigned chip_addr, unsigned char ch)
{
    /* Video Channel Output Control*/
    /* Two Channel ITU0R BT.656 Time-multiplexed format output*/
    it6604_byte_write(chip_addr, 0xca, 0x55);

    /* Output Enable Control and Clock Output Control */
    /* 54MHz clock output*/
    it6604_byte_write(chip_addr, 0xfa, 0x45);/* CLKNO1 pin/CLKPO1 pin */
    it6604_byte_write(chip_addr, 0x6a, 0x05);/* CLKNO2 pin/CLKPO2 pin */

    printk("it6604 0x%x set to 2d1 mode ok\n", chip_addr);
    return 0;
}

static int it6604_set_video_norm(unsigned char addr, unsigned char mode)
{   
    int i;
    
    udelay(50);
    
    if (IT6604_PAL == mode)
	{
        for (i=0; i<4; i++)
        {
            it6604_byte_write(addr, 0x0e + 0x10*i, 0x01);/* PAL (B,D,G,H,I) */
            //it6604_byte_write(addr, 0x0e + 0x10*i, 0x07);/* Auto detection */
            
            it6604_byte_write(addr, 0x07 + 0x10*i, 0x12);/* Cropping Register         , High */
            it6604_byte_write(addr, 0x08 + 0x10*i, 0x17);/* Vertical Delay Register   , Low  */
            it6604_byte_write(addr, 0x09 + 0x10*i, 0x20);/* Vertical Active Register  , Low  */
            it6604_byte_write(addr, 0x0a + 0x10*i, 0x0c);/* Horizontal Delay Register , Low  */
            it6604_byte_write(addr, 0x0b + 0x10*i, 0xd0);/* Horizontal Active Register, Low  */                        
        }
        
		it6604_byte_write(addr, 0x41, 0xd4); /* PAL-B -->  HZ50:1 FSCSEL:1 PHALT:1 PED:0 */
        printk("it6604 0x%x set to PAL mode ok! \n", addr);
	}
	else if (IT6604_NTSC == mode)
	{
        for (i=0; i<4; i++)
        {
            it6604_byte_write(addr, 0x0e + 0x10*i, 0x00);/* NTSC(M) */
            //it6604_byte_write(addr, 0x0e + 0x10*i, 0x07);/* Auto detection */
            
            it6604_byte_write(addr, 0x07 + 0x10*i, 0x02);/* Cropping Register, High */
            it6604_byte_write(addr, 0x08 + 0x10*i, 0x15);/* Vertical Delay Register, Low  */
            it6604_byte_write(addr, 0x09 + 0x10*i, 0xf0);/* Vertical Active Register, Low */
            it6604_byte_write(addr, 0x0a + 0x10*i, 0x0c);/* Horizontal Delay Register, Low */
            it6604_byte_write(addr, 0x0b + 0x10*i, 0xd0);/* Horizontal Active Register, Low */                                    
        }
        
		it6604_byte_write(addr, 0x41, 0x40);/* NTSC-M -->  HZ50:0 FSCSEL:0 PHALT:0 PED:0 */
        printk("it6604 0x%x set to NTSC mode ok! \n", addr);
	}
    else 
    {
        printk("it6604 not support this video norm : %d\n", addr);
        return -1;
    }
    udelay(50);
    return 0;
}


//int it6604_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
long it6604_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
    unsigned int __user *argp = (unsigned int __user *)arg;
    int i2c_addr;
    int tmp     ;
    int ret = 0 ;
	it6604_image_adjust    analog_cfg;    
    it6604_video_norm      video_norm;
    it6604_work_mode       work_mode;
    it6604_video_loss      video_loss;    

	
	switch (_IOC_NR(cmd))
	{		
        case _IOC_NR(IT6604_SET_WORK_MODE):
        {            
            if (copy_from_user(&work_mode, argp, sizeof(it6604_work_mode)))
    			return -1;
            
            i2c_addr = IT6604_I2C_ADDR(work_mode.chip);
            
            if (IT6604_2D1_MODE == work_mode.mode)
            {
                ret = it6604_set_work_mode_2d1(i2c_addr, 0);
            }
            else if (IT6604_4D1_MODE == work_mode.mode)
            {
                ret = it6604_set_work_mode_4d1(i2c_addr, 0);
            }
            else if(IT6604_1D1_MODE == work_mode.mode)
            {
                ret = it6604_set_work_mode_1d1(i2c_addr, 0);
            }
            else 
            {
                printk("now not support this work mode:%d\n", work_mode.mode);
                return -1;
            }
            break;
        }
        
        case _IOC_NR(IT6604_SET_VIDEO_NORM):
        {
            if (copy_from_user(&video_norm, argp, sizeof(it6604_video_norm)))
    			return -1;
    	    if ((video_norm.mode != IT6604_NTSC) && (video_norm.mode != IT6604_PAL))
    	    {
    			printk("invalid video mode %d \n ",video_norm.mode);
    			return -1;
    	    }
            if (IT6604_INVALID_CHIPID(video_norm.chip))
            {
                printk("invalid chip id %d \n ",video_norm.chip);
    			return -1;
            }
            i2c_addr = IT6604_I2C_ADDR(video_norm.chip);
    	    ret = it6604_set_video_norm(i2c_addr, video_norm.mode);
    	    break;
        }

        case _IOC_NR(IT6604_GET_VIDEO_NORM):
        {
            if (copy_from_user(&video_norm, argp, sizeof(it6604_video_norm)))
    			return -1;
            i2c_addr = IT6604_I2C_ADDR(video_norm.chip);
            
            tmp = it6604_byte_read(i2c_addr, 0x0e);
            tmp = (tmp >> 6) & 0x7; /* [6:4]*/ 

            if (0==tmp || 3==tmp)
            {
                video_norm.mode = IT6604_NTSC;
            }
            else if (1==tmp || 4==tmp || 5==tmp || 6==tmp)
            {
                video_norm.mode = IT6604_PAL;
            }
            else
            {
                video_norm.mode = IT6604_INVALID_MODE;
            }
            if (copy_to_user(argp, &video_norm, sizeof(it6604_video_norm)))
                return -1;
    	    break;
        }    	  
        
        case _IOC_NR(IT6604_GET_VIDEO_LOSS):/*get video loss state */
        {
            if (copy_from_user(&video_loss, argp, sizeof(video_loss)))
    			return -1;
            if (IT6604_INVALID_CHIPID(video_loss.chip))
            {
                printk("invalid chip id %d \n ",video_loss.chip);
    			return -1;
            }
            i2c_addr = IT6604_I2C_ADDR(video_loss.chip);
            
            tmp = it6604_byte_read(i2c_addr, 0x00+video_loss.ch*0x10);
            video_loss.is_lost = (tmp >> 7) & 0x01;   /* [7] */

			if (copy_to_user(argp, &video_loss, sizeof(video_loss)))
                return -1;
			break;
		}
        
		case _IOC_NR(IT6604_SET_IMAGE_ADJUST):
        {            
			if (copy_from_user(&analog_cfg, argp, sizeof(analog_cfg)))
			{
				return -1;
			}
			if (IT6604_INVALID_CHIPID(analog_cfg.chip))
			{
				return -1;
			}
            i2c_addr = IT6604_I2C_ADDR(analog_cfg.chip);
			if (analog_cfg.item_sel & IT6604_SET_HUE)//hue
			{
				it6604_byte_write(i2c_addr, 0x06+analog_cfg.chn*0x10, analog_cfg.hue);
			}
			if (analog_cfg.item_sel & IT6604_SET_CONTRAST)//contrast
			{
                it6604_byte_write(i2c_addr, 0x02+analog_cfg.chn*0x10, analog_cfg.contrast);
			}
			if (analog_cfg.item_sel & IT6604_SET_BRIGHT)//brightness
			{
                it6604_byte_write(i2c_addr, 0x01+analog_cfg.chn*0x10, analog_cfg.brightness);
			}
			if (analog_cfg.item_sel & IT6604_SET_SATURATION)//saturation
			{
                it6604_byte_write(i2c_addr, 0x04+analog_cfg.chn*0x10, analog_cfg.saturation);
                it6604_byte_write(i2c_addr, 0x05+analog_cfg.chn*0x10, analog_cfg.saturation);
			}
			break;
		}
        
		case _IOC_NR(IT6604_GET_IMAGE_ADJUST):
        {
			if (copy_from_user(&analog_cfg, argp, sizeof(analog_cfg)))
				return -1;
			if(IT6604_INVALID_CHIPID(analog_cfg.chip))
			{
				return -1;
			}
            i2c_addr = IT6604_I2C_ADDR(analog_cfg.chip);
			if(analog_cfg.item_sel & IT6604_SET_HUE)//hue
			{
				analog_cfg.hue = it6604_byte_read(i2c_addr, 0x06+analog_cfg.chn*0x10);
			}
			if(analog_cfg.item_sel & IT6604_SET_CONTRAST)//contrast
			{
				analog_cfg.contrast = it6604_byte_read(i2c_addr, 0x02+analog_cfg.chn*0x10);
			}
			if(analog_cfg.item_sel & IT6604_SET_BRIGHT)//brightness
			{
				analog_cfg.brightness = it6604_byte_read(i2c_addr, 0x01+analog_cfg.chn*0x10);
			}
			if(analog_cfg.item_sel & IT6604_SET_SATURATION)//saturation
			{
				analog_cfg.saturation = it6604_byte_read(i2c_addr, 0x04+analog_cfg.chn*0x10);
			}
			if (copy_to_user(argp, &analog_cfg, sizeof(analog_cfg)))
                return -1;
			break;
		}
		default:
        {
            printk("invalid it6604 ioctl cmd\n");
            ret = -1;
			break;
		}		    
	}
	
	return ret;
}


static void it6604_video_init(unsigned char addr, unsigned char mode)
{
    int i;

    for (i=0; i<4; i++)
    {
//        it6604_byte_write(addr, 0x01 + 0x10*i, 0x00);/* brightness.             */
//        it6604_byte_write(addr, 0x02 + 0x10*i, 0x64);/* luminance contrast gain */
//        it6604_byte_write(addr, 0x03 + 0x10*i, 0x11);/* sharpness  */
//        it6604_byte_write(addr, 0x04 + 0x10*i, 0x80);/* Chroma (U) */
//        it6604_byte_write(addr, 0x05 + 0x10*i, 0x80);/* Chroma (V) */
//        it6604_byte_write(addr, 0x06 + 0x10*i, 0x00);/* hue        */

        #if 0
        it6604_byte_write(addr, 0x10 * i + 0x1, 0x8);
        it6604_byte_write(addr, 0x10 * i + 0x2, 0x50);
        it6604_byte_write(addr, 0x10 * i + 0x3, 0xb9);
        it6604_byte_write(addr, 0x10 * i + 0x4, 0x70);
        it6604_byte_write(addr, 0x10 * i + 0x5, 0x70);
        it6604_byte_write(addr, 0x10 * i + 0x6, 0x0);

        #else
        it6604_byte_write(addr, 0x10 * i + 0x1, 0xf8);
        it6604_byte_write(addr, 0x10 * i + 0x2, 0x64);
        it6604_byte_write(addr, 0x10 * i + 0x3, 0x11);
        it6604_byte_write(addr, 0x10 * i + 0x4, 0x80);
        it6604_byte_write(addr, 0x10 * i + 0x5, 0x80);
        it6604_byte_write(addr, 0x10 * i + 0x6, 0x00);
        #endif
    }    
    
    it6604_set_video_norm(addr, mode);

    it6604_byte_write(addr, 0x43, 0x08);/* YDEL = 8h */ 
    
	/* CLKPO,CLKPN, 4*/
    /* Output Enable Control and Clock Output Control */
	it6604_byte_write(addr, 0xfa, 0x40);/* CLKN O1 27M */ 
//	it6604_byte_write(addr, 0xfa, 0x4a);/* CLKN O1 108M */ 
    
	/* CHID*/
	it6604_byte_write(addr, 0x9e, 0x52);    
    
	/* Video Channel Output Control */
	it6604_byte_write(addr, 0xca, 0x0);/* One Channel ITU0R BT.656 */
//	it6604_byte_write(addr, 0xca, 0xaa);/* Four Channel ITU0R BT.656 Time-multiplexed */

    /* Video AGC Control */
    it6604_byte_write(addr, 0xaa, 0x02);/* */
    
    /* Enable Video and Audio Detection*/
    it6604_byte_write(addr, 0x73, 0x01);
    
    /* Video Miscellaneous Function Control*/
    it6604_byte_write(addr, 0xf9, 0x51);/* limit output ranges */

    /* 0xD0, 0xD1, 0x7F - Analog Audio Input Gain */
    it6604_byte_write(addr, 0x7f, 0x80);

    /* Miscellaneous Control II */
    it6604_byte_write(addr, 0x96, 0xe6);/* Blue color, else set to 0xe0 */
    
    /*2011.8.10 l00181524, Modify 0xaf value (0x22 -> 0x0), to close vertical peaking*/
    it6604_byte_write(addr, 0xaf, 0x0);
    it6604_byte_write(addr, 0xb0, 0x0);

    /* Enable video encoder  */
    it6604_byte_write(addr, 0x41, 0xd4);
    it6604_byte_write(addr, 0x43, 0x00);
    it6604_byte_write(addr, 0x4b, 0x00);

    /* For Hi3515 Demo board 2D1 mode */
    it6604_byte_write(addr, 0xcc, 0x0d);
    it6604_byte_write(addr, 0xcd, 0x00);
    
#if 1   /* ??????? */
	if (mode == IT6604_PAL)
	{
		//it6604_write_table(addr, 0xf0, tbl_pal_it6604_8KHz, 6);
	}
	else
	{
		//it6604_write_table(addr, 0xf0, tbl_ntsc_it6604_8KHz, 6);		
	}
#endif
}


static void it6604_comm_init(unsigned char addr)
{
    unsigned char id = 0;
	int i;
	/*
	Initial Progress
1. Set HPD (HDMI Connection Pin19) to low (if possible).
2. Reg06 = 0x00 to power on all modules.
3. Reg07[3:2] = ‘11’ to turn off the termination.
4. Reg05 = 0x81
5. Reg16 = 0x0F
6. Reg17 = 0x07
7. Reg18 = 0x07
8. Reg8C = 0x20 (5~8 is for initial interrupt mask setting)
9. Load the default value.
	reg08 = 0xAE
	reg1D = 0x20
	reg3B=0x40
	reg68=0x03
	reg6B=0x11
	Reg6C=0x00
	Reg93=0x43
	Reg94=0x4F
	Reg95=0x87
	Reg96=0x33
10. Reset the HDCP ROM.
11. Configure the HDCP repeater setting
i) Receiver mode, reg73[7:4] = ‘0000’
ii) Repeater mode, reg73[7:4] = ‘1000’
12. Delay about 500ms to make sure the HPD off enough.
13. Reg07[3:2] = ‘00’
14. Set HPD to high (if possible).

*/

	//读取deviceID
    id = it6604_byte_read(addr, 0x02);//zhouhua read deviceID Low byte,should be 0x23
    if (0xff == id || 0x00 == id)
    {
        printk("warning: it6604 0x%x i2c_read err, val:0x%x!!!\n", addr, id);
        return;
    }
	//zhouhua power on all device
	it6604_byte_write(addr, 0x06, 0x00);
	it6604_byte_write(addr, 0x07, 0x0C);
	it6604_byte_write(addr, 0x05, 0x81);
	it6604_byte_write(addr, 0x16, 0x0F);
	it6604_byte_write(addr, 0x17, 0x07);
	it6604_byte_write(addr, 0x18, 0x07);
	it6604_byte_write(addr, 0x8C, 0x20);
	it6604_byte_write(addr, 0x08, 0xAE);
	it6604_byte_write(addr, 0x1D, 0x20);
	it6604_byte_write(addr, 0x3B, 0x40);
	it6604_byte_write(addr, 0x68, 0x03);
	it6604_byte_write(addr, 0x6B, 0x11);
	it6604_byte_write(addr, 0x6C, 0x00);
	it6604_byte_write(addr, 0x93, 0x43);
	it6604_byte_write(addr, 0x94, 0x4F);
	it6604_byte_write(addr, 0x95, 0x87);
	it6604_byte_write(addr, 0x96, 0x33);
	
	id = it6604_byte_read(addr, 0x9B) & ~(0xC0);
	for(i=0;i<16;i++){
		it6604_byte_write(addr, 0x9B, 0x80|id) ;
		it6604_byte_write(addr, 0x9B, 0xC0|id) ;
	}
	it6604_byte_write(addr, 0x9B,id) ;
	
	it6604_byte_write(addr, 0x73, 0x00);
	mdelay(600);
	it6604_byte_write(addr, 0x07, 0x00);
}


static struct file_operations it6604_fops = {
	.owner      = THIS_MODULE,
    .unlocked_ioctl  = it6604_ioctl,//在kernel 2.6.36 中已经完全删除了struct file_operations 中的ioctl 函数指针
	.open       = it6604_open,
	.release    = it6604_close
};

static struct miscdevice it6604_dev = {
	.minor		= MISC_DYNAMIC_MINOR,
	.name		= "it6604dev",
	.fops  		= &it6604_fops,
};


module_param(norm, uint, S_IRUGO);
module_param(chips, uint, S_IRUGO);


static int __init it6604_module_init(void)
{
	int ret = 0, i = 0;
    unsigned char i2c_addr;

	/* first check the parameters*/
	if ((norm != IT6604_PAL) && (norm != IT6604_NTSC))
	{
		printk("module param norm must be PAL(%d) or NTSC(%d)\n", IT6604_PAL ,IT6604_NTSC);
		return -1;
	}
    if (chips <= 0 || chips > 4)
    {
        printk("module param chip invalid value:%d\n", chips);
		return -1;
    }

	/* register misc device*/
	ret = misc_register(&it6604_dev);
	if (ret)
	{
		printk("ERROR: could not register it6604 devices\n");
		return ret;
	}
    
	/* initize each it6604*/
	for (i = 0; i < chips; i ++)
	{
        i2c_addr = it6604_i2c_addr[i];
        
		it6604_comm_init(i2c_addr);
        
        it6604_video_init(i2c_addr, norm);
        
  //      it6604_audio_init(i2c_addr);
	}
    
    /* audio cascade */
  //  it6604_audio_cascade(chips);
	
	printk("it6604 driver init successful!\n");
	
	return 0;
}



static void __exit it6604_module_exit(void)
{
	misc_deregister(&it6604_dev);	
}

module_init(it6604_module_init);
module_exit(it6604_module_exit);

#ifdef MODULE
//#include <linux/compile.h>
#endif
MODULE_LICENSE("GPL");