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XT-IDE.sch
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XT-IDE.sch
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EESchema Schematic File Version 2
LIBS:XT-IDE-rescue
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:contrib
LIBS:valves
LIBS:dips-s
LIBS:XT-IDE-cache
EELAYER 25 0
EELAYER END
$Descr USLedger 17000 11000
encoding utf-8
Sheet 1 1
Title "XT-IDE 8-bit ISA IDE Controller"
Date "2016-05-14"
Rev "3B"
Comp "The Glitch Works"
Comment1 "J. Chapman"
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Notes 13450 3600 0 60 ~ 0
IDE/CF POWER SUPPLY OPTION JUMPER
Text Notes 11200 12350 0 60 ~ 0
IDE ACTIVITY LEDS\nOBSERVE POLARITY -- PIN 1 CATHODE
Text Notes 11000 1450 0 60 ~ 0
IDE INTERRUPT SELECTION JUMPERS
Text Label 8700 4800 0 60 ~ 0
A0-ISA
Text Label 8700 5000 0 60 ~ 0
A3
$Comp
L 74LS32 U5
U 4 1 4DC5A813
P 14550 6350
F 0 "U5" H 14550 6400 60 0000 C CNN
F 1 "74LS32" H 14550 6300 60 0000 C CNN
F 2 "gw_dips:DIP-14_300_OBROUND" H 14550 6400 60 0001 C CNN
F 3 "" H 14550 6350 60 0001 C CNN
4 14550 6350
1 0 0 -1
$EndComp
Text Notes 800 4650 0 60 ~ 0
IDE IO PORT ADDRESS
Text Notes 6900 4000 0 60 ~ 0
NOTE: FOR COMPATIBILITY MODE SET PINS 1-2 (DEFAULT) J2 AND J3\nFOR HI-SPEED ("CHUCK MOD") MODE SET PINS 2-3 (OPTION) J2 AND J3
Text Label 3200 3800 0 60 ~ 0
A0-ISA
Text Label 5550 5650 0 60 ~ 0
A0-ISA
Text Label 5550 5450 0 60 ~ 0
A3
Text Label 3200 3500 0 60 ~ 0
A3
$Comp
L CONN_3 J1
U 1 1 4DC59D37
P 6300 5550
F 0 "J1" V 6250 5550 50 0000 C CNN
F 1 "CONN_3" V 6350 5550 40 0000 C CNN
F 2 "headers_with_detent:1x3" V 6450 5550 40 0001 C CNN
F 3 "" H 6300 5550 60 0001 C CNN
1 6300 5550
1 0 0 -1
$EndComp
$Comp
L CONN_3 J2
U 1 1 4DC59D33
P 9450 4900
F 0 "J2" V 9400 4900 50 0000 C CNN
F 1 "CONN_3" V 9500 4900 40 0000 C CNN
F 2 "headers_with_detent:1x3" V 9600 4900 40 0001 C CNN
F 3 "" H 9450 4900 60 0001 C CNN
1 9450 4900
1 0 0 -1
$EndComp
Text Notes 7200 10400 0 60 ~ 0
NOTE: Only compatible with Atmel 28C64B revision 8K EEPROMs
Text Label 7500 9400 0 60 ~ 0
A14
Text Label 7450 9800 0 60 ~ 0
/CS_ROM
Text Label 5950 8250 0 60 ~ 0
/CS_ROM
$Comp
L 28C256-RESCUE-XT-IDE U9
U 1 1 4DC59AE4
P 8600 8900
F 0 "U9" H 8800 9900 70 0000 C CNN
F 1 "28C256" H 8900 7900 70 0000 C CNN
F 2 "gw_dips:DIP-28_600_OBROUND" H 8900 8000 70 0001 C CNN
F 3 "" H 8600 8900 60 0001 C CNN
1 8600 8900
1 0 0 -1
$EndComp
Text Label 14900 3400 0 60 ~ 0
VCC
$Comp
L CONN_2 J4
U 1 1 4DC59A7A
P 14500 3300
F 0 "J4" V 14450 3300 40 0000 C CNN
F 1 "CONN_2" V 14550 3300 40 0000 C CNN
F 2 "headers_with_detent:1x2" V 14650 3300 40 0001 C CNN
F 3 "" H 14500 3300 60 0001 C CNN
1 14500 3300
-1 0 0 1
$EndComp
$Comp
L 74LS04 U6
U 6 1 4DC598AA
P 11750 12550
F 0 "U6" H 11945 12665 60 0000 C CNN
F 1 "74LS04" H 11940 12425 60 0000 C CNN
F 2 "gw_dips:DIP-14_300_OBROUND" H 11940 12525 60 0001 C CNN
F 3 "" H 11750 12550 60 0001 C CNN
6 11750 12550
1 0 0 -1
$EndComp
Text Label 11100 9950 0 60 ~ 0
GND
Text Label 11100 9750 0 60 ~ 0
GND
$Comp
L CONN_1 P?
U 1 1 4B1C1393
P 11550 9950
AR Path="/23D9B04B1C1393" Ref="P?" Part="1"
AR Path="/394433324B1C1393" Ref="P?" Part="1"
AR Path="/4B1C1393" Ref="P7" Part="1"
AR Path="/94B1C1393" Ref="P7" Part="1"
AR Path="/FFFFFFF04B1C1393" Ref="P7" Part="1"
AR Path="/DCBAABCD4B1C1393" Ref="P7" Part="1"
AR Path="/6FE901F74B1C1393" Ref="P7" Part="1"
AR Path="/3D7E00004B1C1393" Ref="P7" Part="1"
AR Path="/23D9304B1C1393" Ref="P7" Part="1"
AR Path="/23D8D44B1C1393" Ref="P7" Part="1"
AR Path="/2600004B1C1393" Ref="P7" Part="1"
F 0 "P7" H 11630 9950 40 0000 L CNN
F 1 "CONN_1" H 11550 10005 30 0001 C CNN
F 2 "mounting:120mil_no_silkscreen" H 11550 10105 30 0001 C CNN
F 3 "" H 11550 9950 60 0001 C CNN
1 11550 9950
1 0 0 -1
$EndComp
$Comp
L CONN_1 P?
U 1 1 4B1C138F
P 11550 9750
AR Path="/23D9B04B1C138F" Ref="P?" Part="1"
AR Path="/394433324B1C138F" Ref="P?" Part="1"
AR Path="/4B1C138F" Ref="P6" Part="1"
AR Path="/94B1C138F" Ref="P6" Part="1"
AR Path="/FFFFFFF04B1C138F" Ref="P6" Part="1"
AR Path="/3D7E00004B1C138F" Ref="P6" Part="1"
AR Path="/23D9304B1C138F" Ref="P6" Part="1"
AR Path="/23D8D44B1C138F" Ref="P6" Part="1"
AR Path="/2600004B1C138F" Ref="P6" Part="1"
F 0 "P6" H 11630 9750 40 0000 L CNN
F 1 "CONN_1" H 11550 9805 30 0001 C CNN
F 2 "mounting:120mil_no_silkscreen" H 11550 9905 30 0001 C CNN
F 3 "" H 11550 9750 60 0001 C CNN
1 11550 9750
1 0 0 -1
$EndComp
$Comp
L BUSPC BUS1
U 1 1 4A0B6F02
P 2200 2300
AR Path="/4A0B6F02" Ref="BUS1" Part="1"
AR Path="/94A0B6F02" Ref="BUS1" Part="1"
AR Path="/FFFFFFF04A0B6F02" Ref="BUS1" Part="1"
AR Path="/3D7E00004A0B6F02" Ref="BUS1" Part="1"
AR Path="/23D9304A0B6F02" Ref="BUS1" Part="1"
AR Path="/23D8D44A0B6F02" Ref="BUS1" Part="1"
AR Path="/2600004A0B6F02" Ref="BUS1" Part="1"
F 0 "BUS1" H 2200 2400 70 0000 C CNN
F 1 "BUSPC" H 2200 2200 70 0000 C CNN
F 2 "edge_connectors:ISA-8BIT-XT-IDE" H 2200 2300 70 0001 C CNN
F 3 "" H 2200 2300 60 0001 C CNN
1 2200 2300
1 0 0 -1
$EndComp
Text Notes 650 10000 0 60 ~ 0
NOTE: ROM 0xC0000 - 0xDFFFF only
NoConn ~ 1300 2900
NoConn ~ 1300 1200
Text Label 950 2800 0 60 ~ 0
IRQ7
Text Label 950 3000 0 60 ~ 0
IRQ5
Text Label 950 3100 0 60 ~ 0
IRQ4
Text Label 950 3200 0 60 ~ 0
IRQ3
$Comp
L CONN_5X2 J5
U 1 1 49CAAD12
P 12100 1850
AR Path="/49CAAD12" Ref="J5" Part="1"
AR Path="/949CAAD12" Ref="P4" Part="1"
AR Path="/FFFFFFF049CAAD12" Ref="P4" Part="1"
AR Path="/3D7E000049CAAD12" Ref="P4" Part="1"
AR Path="/23D93049CAAD12" Ref="P4" Part="1"
AR Path="/23D8D449CAAD12" Ref="P4" Part="1"
AR Path="/26000049CAAD12" Ref="P4" Part="1"
F 0 "J5" H 12100 2150 60 0000 C CNN
F 1 "INTERRUPT" V 12100 1850 50 0000 C CNN
F 2 "headers_with_detent:5x2" V 12200 1850 50 0001 C CNN
F 3 "" H 12100 1850 60 0001 C CNN
1 12100 1850
1 0 0 -1
$EndComp
Text Label 11350 2050 0 60 ~ 0
IRQ7
Text Label 11350 1950 0 60 ~ 0
IRQ5
Text Label 11350 1850 0 60 ~ 0
IRQ4
Text Label 11350 1750 0 60 ~ 0
IRQ3
$Comp
L RR9 RP1
U 1 1 497D080B
P 2450 4200
AR Path="/497D080B" Ref="RP1" Part="1"
AR Path="/9497D080B" Ref="RR1" Part="1"
AR Path="/FFFFFFF0497D080B" Ref="RR1" Part="1"
AR Path="/3D7E0000497D080B" Ref="RR1" Part="1"
AR Path="/23D930497D080B" Ref="RR1" Part="1"
AR Path="/23D8D4497D080B" Ref="RR1" Part="1"
AR Path="/260000497D080B" Ref="RR1" Part="1"
F 0 "RP1" H 2500 4800 70 0000 C CNN
F 1 "10K" V 2480 4200 70 0000 C CNN
F 2 "gw_sips:SIP10" V 2580 4200 70 0001 C CNN
F 3 "" H 2450 4200 60 0001 C CNN
1 2450 4200
0 -1 -1 0
$EndComp
$Comp
L RR9 RP2
U 1 1 497D078C
P 2450 7400
AR Path="/497D078C" Ref="RP2" Part="1"
AR Path="/9497D078C" Ref="RR2" Part="1"
AR Path="/FFFFFFF0497D078C" Ref="RR2" Part="1"
AR Path="/3D7E0000497D078C" Ref="RR2" Part="1"
AR Path="/23D930497D078C" Ref="RR2" Part="1"
AR Path="/23D8D4497D078C" Ref="RR2" Part="1"
AR Path="/260000497D078C" Ref="RR2" Part="1"
F 0 "RP2" H 2500 8000 70 0000 C CNN
F 1 "10K" V 2480 7400 70 0000 C CNN
F 2 "gw_sips:SIP10" V 2580 7400 70 0001 C CNN
F 3 "" H 2450 7400 60 0001 C CNN
1 2450 7400
0 -1 -1 0
$EndComp
Text Label 600 1800 0 60 ~ 0
*MEMW
Text Label 600 1900 0 60 ~ 0
*MEMR
Text Label 7500 9700 0 60 ~ 0
*MEMR
Text Label 9350 8700 0 60 ~ 0
PC-DB7
Text Label 9350 8600 0 60 ~ 0
PC-DB6
Text Label 9350 8500 0 60 ~ 0
PC-DB5
Text Label 9350 8400 0 60 ~ 0
PC-DB4
Text Label 9350 8300 0 60 ~ 0
PC-DB3
Text Label 9350 8200 0 60 ~ 0
PC-DB2
Text Label 9350 8100 0 60 ~ 0
PC-DB1
Text Label 9350 8000 0 60 ~ 0
PC-DB0
Text Label 7500 9000 0 60 ~ 0
A10
Text Label 7500 9100 0 60 ~ 0
A11
Text Label 7500 9200 0 60 ~ 0
A12
Text Label 7500 8000 0 60 ~ 0
A0-ISA
Text Label 7500 8100 0 60 ~ 0
A1-ISA
Text Label 7500 8200 0 60 ~ 0
A2-ISA
Text Label 7500 8300 0 60 ~ 0
A3
Text Label 7500 8400 0 60 ~ 0
A4
Text Label 7500 8500 0 60 ~ 0
A5
Text Label 7500 8600 0 60 ~ 0
A6
Text Label 7500 8700 0 60 ~ 0
A7
Text Label 7500 8800 0 60 ~ 0
A8
Text Label 7500 8900 0 60 ~ 0
A9
Text Label 3200 2800 0 60 ~ 0
A10
Text Label 3200 2700 0 60 ~ 0
A11
Text Label 3200 2600 0 60 ~ 0
A12
Text Label 3200 2500 0 60 ~ 0
A13
Text Label 3200 2400 0 60 ~ 0
A14
Text Label 3200 2300 0 60 ~ 0
A15
Text Label 3200 2200 0 60 ~ 0
A16
Text Label 3200 2100 0 60 ~ 0
A17
Text Label 3200 2000 0 60 ~ 0
A18
Text Label 3200 1900 0 60 ~ 0
A19
$Comp
L 74LS688 U10
U 1 1 496D14B1
P 5200 9100
AR Path="/496D14B1" Ref="U10" Part="1"
AR Path="/9496D14B1" Ref="U9" Part="1"
AR Path="/FFFFFFF0496D14B1" Ref="U9" Part="1"
AR Path="/3D7E0000496D14B1" Ref="U9" Part="1"
AR Path="/23D930496D14B1" Ref="U9" Part="1"
AR Path="/23D8D4496D14B1" Ref="U9" Part="1"
AR Path="/260000496D14B1" Ref="U9" Part="1"
F 0 "U10" H 5200 10050 60 0000 C CNN
F 1 "74LS688" H 5200 8150 60 0000 C CNN
F 2 "gw_dips:DIP-20_300_OBROUND" H 5200 8250 60 0001 C CNN
F 3 "" H 5200 9100 60 0001 C CNN
1 5200 9100
1 0 0 -1
$EndComp
NoConn ~ 7450 6700
$Comp
L C C10
U 1 1 496D11A0
P 15600 8600
AR Path="/496D11A0" Ref="C10" Part="1"
AR Path="/9496D11A0" Ref="C10" Part="1"
AR Path="/FFFFFFF0496D11A0" Ref="C10" Part="1"
AR Path="/3D7E0000496D11A0" Ref="C10" Part="1"
AR Path="/23D930496D11A0" Ref="C10" Part="1"
AR Path="/23D8D4496D11A0" Ref="C10" Part="1"
AR Path="/260000496D11A0" Ref="C10" Part="1"
F 0 "C10" H 15650 8700 50 0000 L CNN
F 1 "C" H 15650 8500 50 0000 L CNN
F 2 "gw_axial_res_cap:AX_300" H 15650 8600 50 0001 C CNN
F 3 "" H 15600 8600 60 0001 C CNN
1 15600 8600
1 0 0 -1
$EndComp
$Comp
L C C8
U 1 1 496D118A
P 15000 8600
AR Path="/496D118A" Ref="C8" Part="1"
AR Path="/9496D118A" Ref="C9" Part="1"
AR Path="/FFFFFFF0496D118A" Ref="C9" Part="1"
AR Path="/3D7E0000496D118A" Ref="C9" Part="1"
AR Path="/23D930496D118A" Ref="C9" Part="1"
AR Path="/23D8D4496D118A" Ref="C9" Part="1"
AR Path="/260000496D118A" Ref="C9" Part="1"
F 0 "C8" H 15050 8700 50 0000 L CNN
F 1 "C" H 15050 8500 50 0000 L CNN
F 2 "gw_axial_res_cap:AX_300" H 15050 8600 50 0001 C CNN
F 3 "" H 15000 8600 60 0001 C CNN
1 15000 8600
1 0 0 -1
$EndComp
NoConn ~ 7450 6400
NoConn ~ 7450 6300
NoConn ~ 7450 6000
NoConn ~ 15050 2550
NoConn ~ 15050 2450
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$Comp
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L VCC #PWR02
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